From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oa1-f51.google.com (mail-oa1-f51.google.com [209.85.160.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 706962222CB for ; Thu, 19 Feb 2026 00:40:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.51 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771461624; cv=none; b=htvpn30LKo0F7reBlAZPTbPYPtHbp6tjdKQg5KuhNlzBH4vh8nH9Jg/GoSpZZuXPys3U6XVHzSb+rnXqOrMHpX8/22ezqcPwl7o/k+4D9lHShTDsSoCLqODkMqR91Hp57vFH15XWDa+jaj2RJk5YlrRFlXY7dnskVaEbOGsG1zw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771461624; c=relaxed/simple; bh=sK+HWgWTD9a4Ft2SnMeYOfB4EFwgujyl7bTTDTN0eHI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=S22IugSQJ+HIUqvlG6K5SlV+EFPDvzorg5fvMAuBNdet9u5E21vN2LnRhOZwwRwFhlXfG5u4GbJVUnFjKDPKqFgMYiAulXNb4iOr9MkNJUC7gt5SHoIq4WFJqoy+13gWSdzJE7k3clkK4QlIDnaF2FOjuEBrdBUNAqaO1ixF2tM= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=kernel.org; spf=pass smtp.mailfrom=gmail.com; arc=none smtp.client-ip=209.85.160.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=kernel.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Received: by mail-oa1-f51.google.com with SMTP id 586e51a60fabf-40f095f1036so257806fac.1 for ; Wed, 18 Feb 2026 16:40:23 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1771461622; x=1772066422; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=4z7lJJUQMglrP+sakMJrEsjC5MSnfldpiVMijPhZKlI=; b=OVzWC9mnKYgvWN59QZaG3xBzwHOuYJzFONFFVnp0dwRfXQus36ady8drjPsXWs5rvc h6Vg9KFnzc7Ijts1oR617VSLkrGmqiO2WtuPLb6zDcGjbQt2wl+b+M09tzKol+HfOUfU DZfv6h5dE5UUaUAeh82nkRLP5j6rIHTuJSKvt0mi2Q1ogJHlymzTPG5KO4cKVNj2f6XA L3i4Y5WBXqZwDw7uY05C334K7iZamOYp+2J5BJc1w4hpUXQtROMMgeg3GbXeTAEi0BBB x1SWunIKfzlIcSlZ2dxdv7qLLn21uP2gCHbH/cJxPSFxI3xVhlTt399FWzPLiHoww9bQ dL0w== X-Gm-Message-State: AOJu0Yz+Qtq99fphDsXBaIyusppVsVCCKRXhdBbJiJRLcGyj4BE3vOBl su4PvuGAwBnan3fxopyh7uWDaOFX2KFZ90DRObDzMKQ2cgQB2otUhyLS X-Gm-Gg: AZuq6aJXR9w+qDQ1+/zlMXd65xkLq37HNxFgHVWWjKruc4GNqDGAGL2Q5Op4us2BIcr 1iVZHjU1rFsKYzyPjwW5kjIO9B234ntWwU9JY1cZ4dnJ2bAdd35x4VYjWdLE8oh46iLTctsfXNP FF6j1cEVwpiwFJuiagQlt460/gAIpXpUZfBkyPyU4uRsphJOq+pshoim1VVcUS/OPdaUyq+Rv8S 39m9E/zjUGGEx2G0kSS+8r3+ZDrHI/J2fGuLxUUK7MKjjb1WBtWE7twqDq/c7ft/2MmFxG5A4iB SO76+SdiC11EgK/5+1NuXutzOu74j/J/3E4Ugy61yo+uZgjanZNgSYZqjfzTAPSbWIm+MbyZAA5 AfMgnOgeZdz50Htwp8dUTZLpplgFfXeMrwTZuDTRF0vKRr3YDKbykiPbCkakiZNepqAqJOpuj8I RnAXN7chQpQ96NYPs+gNqDK/46neWJNFirkFqCynbyfhju4/w= X-Received: by 2002:a05:6870:1405:b0:40e:9550:3242 with SMTP id 586e51a60fabf-40eeea800famr11337612fac.16.1771461622267; Wed, 18 Feb 2026 16:40:22 -0800 (PST) Received: from sean-HP-EliteBook-830-G6.lan ([207.191.35.252]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-40eaee45d12sm23477659fac.1.2026.02.18.16.40.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Feb 2026 16:40:21 -0800 (PST) From: sean.wang@kernel.org To: nbd@nbd.name, lorenzo.bianconi@redhat.com Cc: linux-wireless@vger.kernel.org, linux-mediatek@lists.infradead.org, Sean Wang , Xiong Huang Subject: [PATCH 06/11] wifi: mt76: mt792x: add PSE handling barrier for the large MCU cmd Date: Wed, 18 Feb 2026 18:40:02 -0600 Message-ID: <20260219004007.19733-6-sean.wang@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260219004007.19733-1-sean.wang@kernel.org> References: <20260219004007.19733-1-sean.wang@kernel.org> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Sean Wang Add a dummy register read in mt76_connac_mcu_rate_txpower_band() to act as a PSE barrier. This would release PSE pages and prevents buffer underflow issues when handling MCU commands with larger payloads without the response in mt76_connac_mcu_set_rate_txpower(). This is a prerequisite patch before enabling MT7902 PCIe and SDIO support. Co-developed-by: Xiong Huang Signed-off-by: Xiong Huang Signed-off-by: Sean Wang --- drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c | 4 ++++ drivers/net/wireless/mediatek/mt76/mt792x_regs.h | 2 ++ 2 files changed, 6 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c index d7fbf3454bb8..89bd52ea8bf7 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c +++ b/drivers/net/wireless/mediatek/mt76/mt76_connac_mcu.c @@ -4,6 +4,7 @@ #include #include "mt76_connac2_mac.h" #include "mt76_connac_mcu.h" +#include "mt792x_regs.h" int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option) { @@ -2246,6 +2247,9 @@ mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy, false); if (err < 0) goto out; + + /* read a CR to avoid PSE buffer underflow */ + mt76_connac_mcu_reg_rr(dev, MT_PSE_BASE); } out: diff --git a/drivers/net/wireless/mediatek/mt76/mt792x_regs.h b/drivers/net/wireless/mediatek/mt76/mt792x_regs.h index acf627aed609..7ddde9286861 100644 --- a/drivers/net/wireless/mediatek/mt76/mt792x_regs.h +++ b/drivers/net/wireless/mediatek/mt76/mt792x_regs.h @@ -25,6 +25,8 @@ #define MT_PLE_AC_QEMPTY(_n) MT_PLE(0x500 + 0x40 * (_n)) #define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2)) +#define MT_PSE_BASE 0x820c8000 + /* TMAC: band 0(0x21000), band 1(0xa1000) */ #define MT_WF_TMAC_BASE(_band) ((_band) ? 0x820f4000 : 0x820e4000) #define MT_WF_TMAC(_band, ofs) (MT_WF_TMAC_BASE(_band) + (ofs)) -- 2.43.0