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Thu, 10 Sep 2026 18:48:40 -0700 (PDT) Received: from nn ([2001:1ab8:1003:0:5454:f357:ba89:4e22]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c2966021ae8sm28097866b.22.2026.09.10.18.48.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Sep 2026 18:48:39 -0700 (PDT) Sender: N B From: =?UTF-8?q?Nerijus=20Bend=C5=BEi=C5=ABnas?= To: toke@toke.dk Cc: linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: [PATCH v3 2/2] wifi: ath9k: clear the PHY error filter when a spectral scan is disabled Date: Fri, 11 Sep 2026 04:46:53 +0300 Message-ID: <20260911014653.1566388-3-nerijus.bendziunas@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260911014653.1566388-1-nerijus.bendziunas@gmail.com> References: <20260911014653.1566388-1-nerijus.bendziunas@gmail.com> Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Triggering a spectral scan sets the PHY error bits in AR_RX_FILTER and AR_PHY_ERR and sets AR_RXCFG_ZLFDMA. Disabling it clears none of them, and ath9k_htc carries the hardware bits into every later filter update. An idle AR9271 in monitor mode then keeps forwarding every PHY error as a zero-length frame. Clear all three on SPECTRAL_DISABLED unless radar detection is enabled, which needs the same bits. AR_RXCFG_ZLFDMA must go too: with it set the frames keep coming after the PHY error mask is cleared. As with the enable path, firmware older than 1.4 still reads from the host. Fixes: e93d083f42a1 ("ath9k: add spectral scan feature") Cc: stable@vger.kernel.org Assisted-by: LLM Signed-off-by: Nerijus Bendžiūnas --- .../net/wireless/ath/ath9k/common-spectral.c | 6 +++++ drivers/net/wireless/ath/ath9k/hw.c | 23 +++++++++++++++++++ drivers/net/wireless/ath/ath9k/hw.h | 1 + 3 files changed, 30 insertions(+) diff --git a/drivers/net/wireless/ath/ath9k/common-spectral.c b/drivers/net/wireless/ath/ath9k/common-spectral.c index 73c1eb4ebe0e..841075d904f8 100644 --- a/drivers/net/wireless/ath/ath9k/common-spectral.c +++ b/drivers/net/wireless/ath/ath9k/common-spectral.c @@ -776,6 +776,12 @@ int ath9k_cmn_spectral_scan_config(struct ath_common *common, ath_ps_ops(common)->wakeup(common); ath9k_hw_ops(ah)->spectral_scan_config(ah, &spec_priv->spec_config); + + /* Radar detection needs the same bits. */ + if (spectral_mode == SPECTRAL_DISABLED && + !common->hw->conf.radar_enabled) + ath9k_hw_disable_rxfilter(ah, ATH9K_RX_FILTER_PHYRADAR | + ATH9K_RX_FILTER_PHYERR); ath_ps_ops(common)->restore(common); spec_priv->spectral_mode = spectral_mode; diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index d62b6ff00d41..6f86a8967548 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -2928,6 +2928,29 @@ void ath9k_hw_enable_rxfilter(struct ath_hw *ah, u32 bits) } EXPORT_SYMBOL(ath9k_hw_enable_rxfilter); +/* + * Counterpart of ath9k_hw_enable_rxfilter(). AR_RXCFG_ZLFDMA goes with the + * PHY error mask or the frames keep coming; callers clear all the PHY error + * bits together, as checking for a remaining one would need a read. + */ +void ath9k_hw_disable_rxfilter(struct ath_hw *ah, u32 bits) +{ + u32 phybits = 0; + + if (bits & ATH9K_RX_FILTER_PHYRADAR) + phybits |= AR_PHY_ERR_RADAR; + if (bits & ATH9K_RX_FILTER_PHYERR) + phybits |= AR_PHY_ERR_OFDM_TIMING | AR_PHY_ERR_CCK_TIMING; + + REG_CLR_BIT(ah, AR_RX_FILTER, bits); + + if (phybits) { + REG_CLR_BIT(ah, AR_PHY_ERR, phybits); + REG_CLR_BIT(ah, AR_RXCFG, AR_RXCFG_ZLFDMA); + } +} +EXPORT_SYMBOL(ath9k_hw_disable_rxfilter); + bool ath9k_hw_phy_disable(struct ath_hw *ah) { if (ath9k_hw_mci_is_enabled(ah)) diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index f102f73a0114..983146208f26 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -1056,6 +1056,7 @@ void ath9k_hw_get_channel_centers(struct ath_hw *ah, u32 ath9k_hw_getrxfilter(struct ath_hw *ah); void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits); void ath9k_hw_enable_rxfilter(struct ath_hw *ah, u32 bits); +void ath9k_hw_disable_rxfilter(struct ath_hw *ah, u32 bits); bool ath9k_hw_phy_disable(struct ath_hw *ah); bool ath9k_hw_disable(struct ath_hw *ah); void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit, bool test); -- 2.55.0