* [PATCH 2/4] ath9k: Fix programming SYNTH4 for AR9462
@ 2012-02-14 8:38 Sujith Manoharan
0 siblings, 0 replies; only message in thread
From: Sujith Manoharan @ 2012-02-14 8:38 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, ath9k-devel
The LONG_SHIFT_SELECT offset is different for AR9462 from
the other chip families. Fix this.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/ar9003_phy.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index aca24bf..81f3e85 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -625,8 +625,8 @@
#define AR_PHY_AIC_STAT_2_B0 (AR_SM_BASE + 0x4cc)
#define AR_PHY_65NM_CH0_SYNTH4 0x1608c
-#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT 0x00000002
-#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S 1
+#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT (AR_SREV_9462(ah) ? 0x00000001 : 0x00000002)
+#define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S (AR_SREV_9462(ah) ? 0 : 1)
#define AR_PHY_65NM_CH0_SYNTH7 0x16098
#define AR_PHY_65NM_CH0_BIAS1 0x160c0
#define AR_PHY_65NM_CH0_BIAS2 0x160c4
--
1.7.9
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2012-02-14 8:38 [PATCH 2/4] ath9k: Fix programming SYNTH4 for AR9462 Sujith Manoharan
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