Re: [RFC 6/7] ath9k_hw: Program correct PLL value for AR9565

[Sujith Manoharan <c_manoha@qualcomm.com>]

Felix Fietkau wrote:
> That looks messed up, how about just:
> 
> 	pll = ath9k_hw_compute_pll_control(ah, chan);
> 	if (AR_SREV_9565(ah))
> 		pll |= 0x40000;
> 	REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
> 
> Or alternatively move that OR mask into ath9k_hw_compute_pll_control

[RFC v2] ath9k_hw: Program correct PLL value for AR9565

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath9k/hw.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 063d724..47de1a9 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -918,7 +918,8 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
 	}
 
 	pll = ath9k_hw_compute_pll_control(ah, chan);
-
+	if (AR_SREV_9565(ah))
+		pll |= 0x40000;
 	REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
 
 	if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
-- 
1.7.12