Re: [ath5k-devel] [PATCH 5/5] ath5k: Update reset code

[Felix Fietkau <nbd@openwrt.org>]

Nick Kossifidis wrote:
> 2009/2/1 Felix Fietkau <nbd@openwrt.org>:
>> Nick Kossifidis wrote:
>>> 2009/2/1 Bob Copeland <me@bobcopeland.com>:
>>>> On Sat, Jan 31, 2009 at 08:48:02PM +0200, Nick Kossifidis wrote:
>>>>> > Heh, we should write a little tool to check the shifts and masks :)
>>>>> >
>>>>>
>>>>> Yup :P
>>>>
>>>> I just wrote one, I can post it later :)   It also found:
>>>>
>>>> AR5K_PHY_SIGMA_DELTA_ADC_CLIP 0x01ff3000 13
>>>>
>>>> Should be 12 or a different mask...
>>>>
>>>
>>> 13 is correct
>>>
>>> 0x01ff3000 -> 1111111111110000000000000
>> I think it's    1111111110011000000000000? :)
>>
>> This mask makes 12 seem more likely.
>>
>> - Felix
>>
> 
> Maybe it's in big endian format (we don't know anything about this reg
> anyway :P), both HALs have 13 plus it doesn't make sense to have a
> field split.
Ah, figured it out. It's a typo :)
Here are the settings from Sam's HAL:

#define   AR_PHY_SIGMA_DELTA_ADC_CLIP     0x01FFE000
#define   AR_PHY_SIGMA_DELTA_ADC_CLIP_S   13

Which does make a lot more sense than     0x01FF3000 :)

- Felix