Re: [ath5k-devel] [PATCH] ath5k: Fix 64 bits TSF reading.

[Benoit PAPILLAULT <benoit.papillault@free.fr>]

Derek Smithies a écrit :
>
> Hi,
>  No, canot support this.
>
> What happens if there is an interrupt immediately after the first two 
> reads - before the test on tsf_lower? - and thisinterrupt lasts longer 
> than 100us ? Most often, this is ok - until the interrupt happens at 
> the wrong time.
>
> OR, there is a TSF merge event after the tsf_upper has been read, but 
> before the tsf_lower has been read? The tsf merge (which is done by 
> the hardware), adjusted both the high and low registers.
>
> Derek.

Hi Derek,

You are indeed right. This was a first step, but like you mentioned, it  
does not handle every cases, so let's forget it.

Regards,
Benoit

> On Sun, 28 Feb 2010, Benoit Papillault wrote:
>
>> +
>> +    tsf_upper = ath5k_hw_reg_read(ah, AR5K_TSF_U32);
>> +    tsf_lower = ath5k_hw_reg_read(ah, AR5K_TSF_L32);
>> +
>> +    if (tsf_lower < 100)
>> +        tsf_upper = ath5k_hw_reg_read(ah, AR5K_TSF_U32);
>> +
>>     ATH5K_TRACE(ah->ah_sc);
>>
>> -    return ath5k_hw_reg_read(ah, AR5K_TSF_L32) | (tsf << 32);
>> +    return (((u64)tsf_upper << 32) | tsf_lower);
>> }
>>
>> /**
>>
>