From: Felix Fietkau <nbd@openwrt.org>
To: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Cc: Vasanth Thiagarajan <Vasanth.Thiagarajan@Atheros.com>,
"linville@tuxdriver.com" <linville@tuxdriver.com>,
"linux-wireless@vger.kernel.org" <linux-wireless@vger.kernel.org>
Subject: Re: [PATCH V2 12/27] ath9k_hw: Find chansel of AR_PHY_65NM_CH0_SYNTH7 from an array for AR9485
Date: Fri, 03 Dec 2010 13:48:24 +0100 [thread overview]
Message-ID: <4CF8E718.9070207@openwrt.org> (raw)
In-Reply-To: <20101203124050.GR12908@vasanth-laptop>
On 2010-12-03 1:40 PM, Vasanthakumar Thiagarajan wrote:
> On Fri, Dec 03, 2010 at 05:44:00PM +0530, Felix Fietkau wrote:
>> On 2010-12-03 5:50 AM, Vasanthakumar Thiagarajan wrote:
>> > On Fri, Dec 03, 2010 at 07:15:28AM +0530, Felix Fietkau wrote:
>> >> On 2010-12-02 12:06 PM, Vasanthakumar Thiagarajan wrote:
>> >> > Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
>> >> > ---
>> >> > drivers/net/wireless/ath/ath9k/ar9003_phy.c | 25 ++++++++++++++++++++++++-
>> >> > 1 files changed, 24 insertions(+), 1 deletions(-)
>> >> >
>> >> > diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
>> >> > index b34a9e9..136e64a 100644
>> >> > --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
>> >> > +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
>> >> > @@ -25,6 +25,24 @@ static const int cycpwrThr1_table[] =
>> >> > /* level: 0 1 2 3 4 5 6 7 8 */
>> >> > { -6, -4, -2, 0, 2, 4, 6, 8 }; /* lvl 0-7, default 3 */
>> >> >
>> >> > +/* Chansel table used by ar9485 */
>> >> > +static const u32 ar9003_chansel_xtal_40M[] = {
>> >> > + 0xa0ccbe,
>> >> > + 0xa12213,
>> >> > + 0xa17769,
>> >> > + 0xa1ccbe,
>> >> > + 0xa22213,
>> >> > + 0xa27769,
>> >> > + 0xa2ccbe,
>> >> > + 0xa32213,
>> >> > + 0xa37769,
>> >> > + 0xa3ccbe,
>> >> > + 0xa42213,
>> >> > + 0xa47769,
>> >> > + 0xa4ccbe,
>> >> > + 0xa5998b,
>> >> > +};
>> >> > +
>> >> > /*
>> >> > * register values to turn OFDM weak signal detection OFF
>> >> > */
>> >> > @@ -75,7 +93,12 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
>> >> > freq = centers.synth_center;
>> >> >
>> >> > if (freq < 4800) { /* 2 GHz, fractional mode */
>> >> > - channelSel = CHANSEL_2G(freq);
>> >> > + if (AR_SREV_9485(ah)) {
>> >> > + int ichan = ieee80211_frequency_to_channel(freq);
>> >> > +
>> >> > + channelSel = ar9003_chansel_xtal_40M[ichan - 1];
>> >> How about using this formula for AR9485:
>> >>
>> >> #define CHANSEL_2G_AR9485(_freq) (((_freq) * 0x10000 - 215) / CHANSEL_DIV)
>> >>
>> >> While I don't know where the 215 comes from (the calculation does not
>> >> appear to be documented anywhere and I found it by trial & error),
>> >> I do think it's better to have a simple formula than a long table
>> >> of hardcoded values.
>> >
>> > I don't know, having some arbitrary formula would
>> > complicate things especially if we want to integrate
>> > changes from internal code base. I prefer the table.
>> How would it complicate things? Right now the resulting values are
>> exactly the same. If we get a new table from the HAL, I'll either come
>> up with a new formula, or we switch to the table then. But in the mean
>> time we'll have better code.
>
> In that case, I'm not comfortable with the magic number. I'll try to
> ask people about the relation between the older one and the newer
> one.
Yeah, I asked around already and didn't get an answer yet, as the source
of these values does not seem to be documented internally.
But how exactly is *one* magic number (and it's even a very small one)
worse than 14 of them, especially since anybody can verify that the
generated raw values are exactly the same?
The main advantage of using the simple formula (IMHO) is that it clearly
shows that the frequency selection on the new chips is almost exactly
the same as on the old chips, but with a small offset to compensate for
a difference in the PLL design.
- Felix
next prev parent reply other threads:[~2010-12-03 12:48 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-12-02 11:06 [PATCH V2 00/27] Add support for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 01/27] ath9k_hw: Define hw version macros " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 02/27] ath9k_hw: Add initvals.h " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 03/27] ath9k_hw: Enable hw initialization " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 04/27] ath9k_hw: Initialize mode registers " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 05/27] ath9k_hw: Initialize tx/rx gain table from initvals.h " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 06/27] ath9k_hw: Eeeprom changes " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 07/27] ath9k_hw: Disable LDPC " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 08/27] ath9k: Disable TX STBC " Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 09/27] ath9k: Enable extended synch for AR9485 to fix L0s recovery issue Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 10/27] ath9k_hw: Find the maximum number of chains that hw supports Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 11/27] ath9k_hw: Configure pll control for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 12/27] ath9k_hw: Find chansel of AR_PHY_65NM_CH0_SYNTH7 from an array " Vasanthakumar Thiagarajan
2010-12-03 1:45 ` Felix Fietkau
2010-12-03 4:50 ` Vasanthakumar Thiagarajan
2010-12-03 12:14 ` Felix Fietkau
2010-12-03 12:40 ` Vasanthakumar Thiagarajan
2010-12-03 12:48 ` Felix Fietkau [this message]
2010-12-06 6:03 ` Vasanthakumar Thiagarajan
2010-12-06 10:42 ` Felix Fietkau
2010-12-06 11:44 ` Vasanthakumar Thiagarajan
2010-12-06 11:50 ` Felix Fietkau
2010-12-06 11:54 ` Vasanthakumar Thiagarajan
2010-12-06 11:51 ` Johannes Berg
2010-12-02 11:06 ` [PATCH V2 13/27] ath9k_hw: Add a helper function to get spur channel pointer from cal data for AR9003 family Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 14/27] ath9k_hw: Read spur channel information from eeprom for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:06 ` [PATCH V2 15/27] ath9k_hw: Configure xpa bias level " Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 16/27] ath9k_hw: Read and configure antenna diversity control " Vasanthakumar Thiagarajan
2010-12-02 11:22 ` Julian Calaby
2010-12-02 12:09 ` Vasanthakumar Thiagarajan
2010-12-02 12:16 ` Julian Calaby
2010-12-02 12:21 ` Vasanthakumar Thiagarajan
2010-12-02 12:29 ` Julian Calaby
2010-12-02 11:07 ` [PATCH V2 17/27] ath9k_hw: Configure attenuation control only for supported chains Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 18/27] ath9k_hw: Configure internal regulator for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 19/27] ath9k_hw: Read and configure turnning caps to regulate freq accuracy Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 20/27] ath9k_hw: Configure power control only for the supported chains Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 21/27] ath9k_hw: Program appropriate chianmask for AR9485 before starting AGC/IQ cal Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 22/27] ath9k_hw: Define IQcal correction coefficient registers using index Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 23/27] ath9k_hw: Add IQ cal changes for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 24/27] ath9k_hw: Program appropriate register for temperature compensation cal " Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 25/27] ath9k_hw: Setup paprd only for supported chains Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 26/27] ath9k_hw: Disable MRC CCK for AR9485 Vasanthakumar Thiagarajan
2010-12-02 11:07 ` [PATCH V2 27/27] ath9k: Add device id of AR9485 to pci table Vasanthakumar Thiagarajan
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