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From: Felix Fietkau <nbd@openwrt.org>
To: Adrian Chadd <adrian@freebsd.org>
Cc: Russell Senior <seniorr@aracnet.com>,
	ath5k-devel@lists.ath5k.org, linux-wireless@vger.kernel.org
Subject: Re: [ath5k-devel] kernel panic on MIPS + ath5k + Wistron CM9 radio
Date: Tue, 03 May 2011 21:19:18 +0200	[thread overview]
Message-ID: <4DC05536.4010303@openwrt.org> (raw)
In-Reply-To: <BANLkTi=mK9dh5AAQtqKVWvTjXfLS-y=7Ng@mail.gmail.com>

On 2011-05-03 8:18 AM, Adrian Chadd wrote:
> Well, I see the same on FreeBSD/MIPS whenever an Atheros device is
> fondled incorrectly. Either because the chip isn't yet fully awake or
> the register plainly doesn't exist.
>
> See if you can add some debugging in ath5k_hw_reset_tx_queue() to see
> which register is being read/written before the PCI bus error occurs.
If I read the trace correctly, the accessed register is 0x111c, which is
AR5K_QUEUE_DFS_MISC(7). If I remember correctly, queue 7 is the beacon 
queue. Access to this register should never fail unless the hardware is 
in sleep mode, or there is some other PCI related issue. Unfortunately, 
this issue might be caused by something entirely different that is not 
visible in the stack trace. I have observed that messing up the internal 
state of a PCI card can trigger an error that only shows up much later 
and thus can only be found by doing a thorough code review or by 
analyzing PCI traces.

- Felix

  parent reply	other threads:[~2011-05-03 19:19 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-05-01 19:39 kernel panic on MIPS + ath5k + Wistron CM9 radio Russell Senior
2011-05-03  6:18 ` Adrian Chadd
2011-05-03  6:56   ` [ath5k-devel] " Peizhao Hu
2011-05-03 19:19   ` Felix Fietkau [this message]
2011-05-04 19:55     ` Russell Senior
2011-05-06  1:57       ` Peizhao Hu
2011-05-04 14:39 ` Russell Senior
2011-05-04 14:47   ` Felix Fietkau
     [not found]     ` <86liyjjo0a.fsf@coulee.tdb.com>
2011-05-31 17:30       ` Russell Senior
2011-05-31 18:16         ` Sedat Dilek

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