Re: [PATCH v2] ssb: fix ssb clock rate according to broadcom source

[Larry Finger <Larry.Finger@lwfinger.net>]

On 06/21/2011 01:53 PM, Hauke Mehrtens wrote:
> This fix was done according to si_clock_rate function in broadcom siutils.c
>
> Signed-off-by: Hauke Mehrtens<hauke@hauke-m.de>
> ---
>   drivers/ssb/main.c |    4 ++--
>   1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/ssb/main.c b/drivers/ssb/main.c
> index e568664..57b7b64 100644
> --- a/drivers/ssb/main.c
> +++ b/drivers/ssb/main.c
> @@ -1002,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 n, u32 m)
>   	switch (plltype) {
>   	case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
>   		if (m&  SSB_CHIPCO_CLK_T6_MMASK)
> -			return SSB_CHIPCO_CLK_T6_M0;
> -		return SSB_CHIPCO_CLK_T6_M1;
> +			return SSB_CHIPCO_CLK_T6_M1;
> +		return SSB_CHIPCO_CLK_T6_M0;
>   	case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
>   	case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
>   	case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */

This patch sent me looking to find the public source for this routine. After 
finding it in the source section of Broadcom-wl, I noticed there is some 
additional code that is not implemented in the ssb version. Should this 
additional material be implemented, or is it not applicable?

Larry