[PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Felix Fietkau]

ADC calibrations cannot run on 5 GHz with fast clock enabled. They
need to be disabled, otherwise they'll hang and IQ mismatch calibration
will not be run either.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Reported-by: Adrian Chadd <adrian@freebsd.org>
Cc: stable@kernel.org
---
 drivers/net/wireless/ath/ath9k/ar9002_calib.c |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
index 2d4c091..2d394af 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
@@ -41,7 +41,8 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah,
 	case ADC_DC_CAL:
 		/* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */
 		if (!IS_CHAN_B(chan) &&
-		    !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan)))
+		    !((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
+		      IS_CHAN_HT20(chan)))
 			supported = true;
 		break;
 	}
-- 
1.7.3.2

Re: [PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Adrian Chadd]

Can we please hold off of this until we know if this is indeed the correct fix?

Ie, I'm not sure yet whether 5ghz fast clock (which clocks the mac/bb
like it was doing 2.4ghz) needs the dual ADCs enabled or not.
It may be that something is being incorrectly disabled when the
fastclock initvals are being written over the normal 5ghz values.

Thanks,


Adrian

On 29 August 2011 16:06, Felix Fietkau <nbd@openwrt.org> wrote:
> ADC calibrations cannot run on 5 GHz with fast clock enabled. They
> need to be disabled, otherwise they'll hang and IQ mismatch calibration
> will not be run either.
>
> Signed-off-by: Felix Fietkau <nbd@openwrt.org>
> Reported-by: Adrian Chadd <adrian@freebsd.org>
> Cc: stable@kernel.org
> ---
>  drivers/net/wireless/ath/ath9k/ar9002_calib.c |    3 ++-
>  1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
> index 2d4c091..2d394af 100644
> --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
> +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
> @@ -41,7 +41,8 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah,
>        case ADC_DC_CAL:
>                /* Run ADC Gain Cal for non-CCK & non 2GHz-HT20 only */
>                if (!IS_CHAN_B(chan) &&
> -                   !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan)))
> +                   !((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan)) &&
> +                     IS_CHAN_HT20(chan)))
>                        supported = true;
>                break;
>        }
> --
> 1.7.3.2
>
>

Re: [PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Jorge Boncompte [DTI2]]

El 29/08/2011 11:01, Adrian Chadd escribió:
> Can we please hold off of this until we know if this is indeed the correct fix?
> 
> Ie, I'm not sure yet whether 5ghz fast clock (which clocks the mac/bb
> like it was doing 2.4ghz) needs the dual ADCs enabled or not.
> It may be that something is being incorrectly disabled when the
> fastclock initvals are being written over the normal 5ghz values.
>uary
> Thanks,

	Hi, I reported this same problem on february, I was using Ubiquiti SR71-15
cards. I've been running them with the same "fix" that Felix has proposed. If
you need a tester for another solution just let me know.

	Regards,
		Jorge
-- 
==============================================================
Jorge Boncompte - Ingenieria y Gestion de RED
DTI2 - Desarrollo de la Tecnologia de las Comunicaciones
--------------------------------------------------------------
C/ Abogado Enriquez Barrios, 5   14004 CORDOBA (SPAIN)
Tlf: +34 957 761395 / FAX: +34 957 450380
==============================================================
- There is only so much duct tape you can put on something
  before it just becomes a giant ball of duct tape.
==============================================================

Re: [PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Rajkumar Manoharan]

On Mon, Aug 29, 2011 at 12:14:55PM +0200, Jorge Boncompte [DTI2] wrote:
> El 29/08/2011 11:01, Adrian Chadd escribió:
> > Can we please hold off of this until we know if this is indeed the correct fix?
> > 
> > Ie, I'm not sure yet whether 5ghz fast clock (which clocks the mac/bb
> > like it was doing 2.4ghz) needs the dual ADCs enabled or not.
> > It may be that something is being incorrectly disabled when the
> > fastclock initvals are being written over the normal 5ghz values.
> >uary
> > Thanks,
> 
> 	Hi, I reported this same problem on february, I was using Ubiquiti SR71-15
> cards. I've been running them with the same "fix" that Felix has proposed. If
> you need a tester for another solution just let me know.
> 
Hi Jorge,

Could you please test whether the below patch helps?

https://patchwork.kernel.org/patch/1112672/

Thanks,
Rajkumar

Re: [PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Adrian Chadd]

On 30 August 2011 18:44, Rajkumar Manoharan <rmanohar@qca.qualcomm.com> wrote:

> Could you please test whether the below patch helps?
>
> https://patchwork.kernel.org/patch/1112672/

FreeBSD does this. nbd disabled the EEPROM check a while ago in ath9k.
So it isn't this.



Adrian

Re: [PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Jorge Boncompte [DTI2]]

El 30/08/2011 12:47, Adrian Chadd escribió:
> On 30 August 2011 18:44, Rajkumar Manoharan <rmanohar@qca.qualcomm.com> wrote:
> 
>> Could you please test whether the below patch helps?
>>
>> https://patchwork.kernel.org/patch/1112672/
> 
> FreeBSD does this. nbd disabled the EEPROM check a while ago in ath9k.
> So it isn't this.
> 

	Yes, it is not.

-- 
==============================================================
Jorge Boncompte - Ingenieria y Gestion de RED
DTI2 - Desarrollo de la Tecnologia de las Comunicaciones
--------------------------------------------------------------
C/ Abogado Enriquez Barrios, 5   14004 CORDOBA (SPAIN)
Tlf: +34 957 761395 / FAX: +34 957 450380
==============================================================
- There is only so much duct tape you can put on something
  before it just becomes a giant ball of duct tape.
==============================================================

Re: [PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Rajkumar Manoharan]

On Tue, Aug 30, 2011 at 01:27:00PM +0200, Jorge Boncompte [DTI2] wrote:
> El 30/08/2011 12:47, Adrian Chadd escribió:
> > On 30 August 2011 18:44, Rajkumar Manoharan <rmanohar@qca.qualcomm.com> wrote:
> > 
> >> Could you please test whether the below patch helps?
> >>
> >> https://patchwork.kernel.org/patch/1112672/
> > 
> > FreeBSD does this. nbd disabled the EEPROM check a while ago in ath9k.
> > So it isn't this.
> > 
> 
> 	Yes, it is not.
> 

Thanks Jorge.

--
Rajkumar

Re: [PATCH 3.1] ath9k_hw: fix calibration on 5 ghz

[Felix Fietkau]

Got confirmation that this is indeed the correct fix.
John, please merge this patch

On 2011-08-29 11:01 AM, Adrian Chadd wrote:
> Can we please hold off of this until we know if this is indeed the correct fix?
>
> Ie, I'm not sure yet whether 5ghz fast clock (which clocks the mac/bb
> like it was doing 2.4ghz) needs the dual ADCs enabled or not.
> It may be that something is being incorrectly disabled when the
> fastclock initvals are being written over the normal 5ghz values.
>
> Thanks,
>
>
> Adrian
>
> On 29 August 2011 16:06, Felix Fietkau<nbd@openwrt.org>  wrote:
>>  ADC calibrations cannot run on 5 GHz with fast clock enabled. They
>>  need to be disabled, otherwise they'll hang and IQ mismatch calibration
>>  will not be run either.
>>
>>  Signed-off-by: Felix Fietkau<nbd@openwrt.org>
>>  Reported-by: Adrian Chadd<adrian@freebsd.org>
>>  Cc: stable@kernel.org
>>  ---
>>    drivers/net/wireless/ath/ath9k/ar9002_calib.c |    3 ++-
>>    1 files changed, 2 insertions(+), 1 deletions(-)
>>
>>  diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
>>  index 2d4c091..2d394af 100644
>>  --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
>>  +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
>>  @@ -41,7 +41,8 @@ static bool ar9002_hw_is_cal_supported(struct ath_hw *ah,
>>          case ADC_DC_CAL:
>>                  /* Run ADC Gain Cal for non-CCK&  non 2GHz-HT20 only */
>>                  if (!IS_CHAN_B(chan)&&
>>  -                   !(IS_CHAN_2GHZ(chan)&&  IS_CHAN_HT20(chan)))
>>  +                   !((IS_CHAN_2GHZ(chan) || IS_CHAN_A_FAST_CLOCK(ah, chan))&&
>>  +                     IS_CHAN_HT20(chan)))
>>                          supported = true;
>>                  break;
>>          }
>>  --
>>  1.7.3.2
>>
>>
> --
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