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Wed, 30 Sep 2026 14:27:29 -0700 (PDT) Received: from [192.168.1.50] ([81.196.40.70]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48b0691cdbesm1606033f8f.24.2026.09.30.14.27.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Sep 2026 14:27:29 -0700 (PDT) Message-ID: Date: Thu, 1 Oct 2026 00:27:26 +0300 Precedence: bulk X-Mailing-List: linux-wireless@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 rtw-next 2/7] wifi: rtw88: assign the RCR per chip in rtw_core_init To: Luka Gejak , Ping-Ke Shih Cc: linux-wireless@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Straube , Peter Robinson References: <20260930091604.52891-1-luka.gejak@linux.dev> <20260930091604.52891-3-luka.gejak@linux.dev> <3c53130d1d4738a9b3173806264fc1d0b5682072@linux.dev> Content-Language: en-US From: Bitterblue Smith In-Reply-To: <3c53130d1d4738a9b3173806264fc1d0b5682072@linux.dev> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 30/09/2026 23:36, Luka Gejak wrote: > September 30, 2026 at 20:03, "Bitterblue Smith" wrote: > > >> >> On 30/09/2026 12:15, Luka Gejak wrote: >> >>> >>> The receive control word is the same for every chip today. The generic >>> default is written in rtw_core_init(), so a chip that needs a different >>> value has to overwrite it afterwards, in its own init path, far away >>> from where the default is decided. >>> >> I still don't understand why RTL8723B(S) would need a different value. >> > > Because 0x700060ce is what the vendor driver leaves in REG_RCR for this > chip, and it is what rtw8723x_mac_init() already writes for it. I have > both from tracing this card: a register dump at the end of > rtl8723bs_hal_init prints RCR=0x700060ce, and the same dump in rtw88 > matched it field for field. > > The default is a different filter. It sets BIT_PKTCTL_DLEN, which the > 8723B vendor HAL and rtlwifi's rtl8723be never set, and it clears > BIT_AMF, BIT_CBSSID_DATA and BIT_CBSSID_BCN, which the vendor value > sets. Four bits in total. > It will work fine... > That value does not survive rtw_core_start(), which writes REG_RCR from > hal.rcr after power_on. The field is what keeps it. BIT_APP_FCS is the only > bit added on top, because rtw88 advertises RX_INCLUDES_FCS. > > Best regards, > Luka Gejak