* [PATCH] b43: Fix and update LP-PHY code
From: Gábor Stefanik @ 2009-08-26 18:51 UTC (permalink / raw)
To: John Linville, Michael Buesch, Larry Finger, Mark Huijgen
Cc: Broadcom Wireless, linux-wireless
In-Reply-To: <1251312686-32067-1-git-send-email-netrolller.3d@gmail.com>
-Fix a few nasty typos (b43_phy_* operations instead of b43_radio_*)
in the channel tune routines.
-Fix some typos & spec errors found by MMIO tracing.
-Optimize b43_phy_write & b43_phy_mask/set/maskset to use
only the minimal number of MMIO accesses. (Write is possible
using a single 32-bit MMIO write, while set/mask/maskset can
be done in 3 16-bit MMIOs).
-Set the default channel back to 1, as the bug forcing us to use
channel 7 is now fixed.
With this, the device comes up, scans, associates, transmits,
receives, monitors and injects on all channels - in other words,
it's fully functional. Sensitivity and TX power are still sub-optimal,
due to the lack of calibration (that's next on my list).
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
---
drivers/net/wireless/b43/phy_common.c | 27 +++++++--
drivers/net/wireless/b43/phy_common.h | 3 +
drivers/net/wireless/b43/phy_lp.c | 91 +++++++++++++++++--------------
drivers/net/wireless/b43/phy_lp.h | 3 +
drivers/net/wireless/b43/tables_lpphy.c | 79 +++++++++++++++------------
5 files changed, 122 insertions(+), 81 deletions(-)
diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c
index 51686ec..6e704be 100644
--- a/drivers/net/wireless/b43/phy_common.c
+++ b/drivers/net/wireless/b43/phy_common.c
@@ -249,20 +249,35 @@ void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask)
{
- b43_phy_write(dev, offset,
- b43_phy_read(dev, offset) & mask);
+ if (dev->phy.ops->phy_maskset) {
+ assert_mac_suspended(dev);
+ dev->phy.ops->phy_maskset(dev, offset, mask, 0);
+ } else {
+ b43_phy_write(dev, offset,
+ b43_phy_read(dev, offset) & mask);
+ }
}
void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set)
{
- b43_phy_write(dev, offset,
- b43_phy_read(dev, offset) | set);
+ if (dev->phy.ops->phy_maskset) {
+ assert_mac_suspended(dev);
+ dev->phy.ops->phy_maskset(dev, offset, 0xFFFF, set);
+ } else {
+ b43_phy_write(dev, offset,
+ b43_phy_read(dev, offset) | set);
+ }
}
void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
{
- b43_phy_write(dev, offset,
- (b43_phy_read(dev, offset) & mask) | set);
+ if (dev->phy.ops->phy_maskset) {
+ assert_mac_suspended(dev);
+ dev->phy.ops->phy_maskset(dev, offset, mask, set);
+ } else {
+ b43_phy_write(dev, offset,
+ (b43_phy_read(dev, offset) & mask) | set);
+ }
}
int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel)
diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h
index 9f9f23c..b47a0f5 100644
--- a/drivers/net/wireless/b43/phy_common.h
+++ b/drivers/net/wireless/b43/phy_common.h
@@ -95,6 +95,8 @@ enum b43_txpwr_result {
* Must not be NULL.
* @phy_write: Write to a PHY register.
* Must not be NULL.
+ * @phy_maskset: Maskset a PHY register, taking shortcuts.
+ * If it is NULL, a generic algorithm is used.
* @radio_read: Read from a Radio register.
* Must not be NULL.
* @radio_write: Write to a Radio register.
@@ -154,6 +156,7 @@ struct b43_phy_operations {
/* Register access */
u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
+ void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index 5306f2c..1a57d33 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -44,7 +44,7 @@ static inline u16 channel2freq_lp(u8 channel)
static unsigned int b43_lpphy_op_get_default_chan(struct b43_wldev *dev)
{
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
- return 7; //FIXME temporary - channel 1 is broken
+ return 1;
return 36;
}
@@ -182,8 +182,8 @@ static void lpphy_adjust_gain_table(struct b43_wldev *dev, u32 freq)
temp[1] = temp[0] + 0x1000;
temp[2] = temp[0] + 0x2000;
- b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp);
b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0), 3, temp);
+ b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp);
}
static void lpphy_table_init(struct b43_wldev *dev)
@@ -223,8 +223,8 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0x0006);
b43_phy_mask(dev, B43_LPPHY_RX_RADIO_CTL, 0xFFFE);
b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x0005);
- b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC10, 0x0180);
- b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3800);
+ b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0x0180);
+ b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3C00);
b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFFF0, 0x0005);
b43_phy_maskset(dev, B43_LPPHY_GAIN_MISMATCH_LIMIT, 0xFFC0, 0x001A);
b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0x00B3);
@@ -237,7 +237,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
/* TODO:
* Set the LDO voltage to 0x0028 - FIXME: What is this?
* Call sb_pmu_set_ldo_voltage with 4 and the LDO voltage
- * as arguments
+ * as arguments
* Call sb_pmu_paref_ldo_enable with argument TRUE
*/
if (dev->phy.rev == 0) {
@@ -340,11 +340,11 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
if (dev->phy.rev == 1) {
tmp = b43_phy_read(dev, B43_LPPHY_CLIPCTRTHRESH);
tmp2 = (tmp & 0x03E0) >> 5;
- tmp2 |= tmp << 5;
+ tmp2 |= tmp2 << 5;
b43_phy_write(dev, B43_LPPHY_4C3, tmp2);
- tmp = b43_phy_read(dev, B43_LPPHY_OFDMSYNCTHRESH0);
+ tmp = b43_phy_read(dev, B43_LPPHY_GAINDIRECTMISMATCH);
tmp2 = (tmp & 0x1F00) >> 8;
- tmp2 |= tmp << 5;
+ tmp2 |= tmp2 << 5;
b43_phy_write(dev, B43_LPPHY_4C4, tmp2);
tmp = b43_phy_read(dev, B43_LPPHY_VERYLOWGAINDB);
tmp2 = tmp & 0x00FF;
@@ -761,7 +761,7 @@ static void lpphy_disable_crs(struct b43_wldev *dev, bool user)
b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB);
b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4);
- b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFF7);
+ b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7);
b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x10);
b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
@@ -956,7 +956,7 @@ static void lpphy_run_ddfs(struct b43_wldev *dev, int i_on, int q_on,
b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFF9F, scale_idx << 5);
b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0xFFFB);
b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x2);
- b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x20);
+ b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x20);
}
static bool lpphy_rx_iq_est(struct b43_wldev *dev, u16 samples, u8 time,
@@ -968,7 +968,7 @@ static bool lpphy_rx_iq_est(struct b43_wldev *dev, u16 samples, u8 time,
b43_phy_write(dev, B43_LPPHY_IQ_NUM_SMPLS_ADDR, samples);
b43_phy_maskset(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFF00, time);
b43_phy_mask(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFEFF);
- b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFDFF);
+ b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);
for (i = 0; i < 500; i++) {
if (!(b43_phy_read(dev,
@@ -1135,9 +1135,9 @@ static void lpphy_set_tx_power_control(struct b43_wldev *dev,
}
if (dev->phy.rev >= 2) {
if (mode == B43_LPPHY_TXPCTL_HW)
- b43_phy_maskset(dev, B43_PHY_OFDM(0xD0), 0xFD, 0x2);
+ b43_phy_set(dev, B43_PHY_OFDM(0xD0), 0x2);
else
- b43_phy_maskset(dev, B43_PHY_OFDM(0xD0), 0xFD, 0);
+ b43_phy_mask(dev, B43_PHY_OFDM(0xD0), 0xFFFD);
}
lpphy_write_tx_pctl_mode_to_hardware(dev);
}
@@ -1169,7 +1169,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
err = b43_lpphy_op_switch_channel(dev, 7);
if (err) {
b43dbg(dev->wl,
- "RC calib: Failed to switch to channel 7, error = %d",
+ "RC calib: Failed to switch to channel 7, error = %d\n",
err);
}
old_txg_ovr = !!(b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40);
@@ -1500,8 +1500,15 @@ static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
+ b43_write32(dev, B43_MMIO_PHY_CONTROL, ((u32)value << 16) | reg);
+}
+
+static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
+ u16 set)
+{
b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
- b43_write16(dev, B43_MMIO_PHY_DATA, value);
+ b43_write16(dev, B43_MMIO_PHY_DATA,
+ (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
}
static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg)
@@ -1920,8 +1927,8 @@ static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev)
static void lpphy_b2062_vco_calib(struct b43_wldev *dev)
{
- b43_phy_write(dev, B2062_S_RFPLL_CTL21, 0x42);
- b43_phy_write(dev, B2062_S_RFPLL_CTL21, 0x62);
+ b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x42);
+ b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x62);
udelay(200);
}
@@ -1980,7 +1987,7 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
tmp6 = tmp5 / tmp4;
tmp7 = tmp5 % tmp4;
b43_radio_write(dev, B2062_S_RFPLL_CTL29, tmp6 + ((2 * tmp7) / tmp4));
- tmp8 = b43_phy_read(dev, B2062_S_RFPLL_CTL19);
+ tmp8 = b43_radio_read(dev, B2062_S_RFPLL_CTL19);
tmp9 = ((2 * tmp3 * (tmp8 + 1)) + (3 * tmp1)) / (6 * tmp1);
b43_radio_write(dev, B2062_S_RFPLL_CTL23, (tmp9 >> 8) + 16);
b43_radio_write(dev, B2062_S_RFPLL_CTL24, tmp9 & 0xFF);
@@ -2019,17 +2026,17 @@ static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
{
u16 tmp;
- b43_phy_mask(dev, B2063_PLL_SP1, ~0x40);
- tmp = b43_phy_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8;
- b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp);
+ b43_radio_mask(dev, B2063_PLL_SP1, ~0x40);
+ tmp = b43_radio_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8;
+ b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp);
udelay(1);
- b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x4);
+ b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x4);
udelay(1);
- b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x6);
+ b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x6);
udelay(1);
- b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x7);
+ b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x7);
udelay(300);
- b43_phy_set(dev, B2063_PLL_SP1, 0x40);
+ b43_radio_set(dev, B2063_PLL_SP1, 0x40);
}
static int lpphy_b2063_tune(struct b43_wldev *dev,
@@ -2124,31 +2131,31 @@ static int lpphy_b2063_tune(struct b43_wldev *dev,
scale = 0;
tmp5 = ((tmp4 + (tmp3 >> 1)) / tmp3) - 8;
}
- b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5);
- b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6);
+ b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5);
+ b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6);
tmp6 = lpphy_qdiv_roundup(100 * val1, val3, 16);
tmp6 *= (tmp5 * 8) * (scale + 1);
if (tmp6 > 150)
tmp6 = 0;
- b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6);
- b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5);
+ b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6);
+ b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5);
- b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4);
+ b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4);
if (crystal_freq > 26000000)
- b43_phy_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2);
+ b43_radio_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2);
else
- b43_phy_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD);
+ b43_radio_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD);
if (val1 == 45)
- b43_phy_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2);
+ b43_radio_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2);
else
- b43_phy_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD);
+ b43_radio_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD);
- b43_phy_set(dev, B2063_PLL_SP2, 0x3);
+ b43_radio_set(dev, B2063_PLL_SP2, 0x3);
udelay(1);
- b43_phy_mask(dev, B2063_PLL_SP2, 0xFFFC);
+ b43_radio_mask(dev, B2063_PLL_SP2, 0xFFFC);
lpphy_b2063_vco_calib(dev);
b43_radio_write(dev, B2063_COMM15, old_comm15);
@@ -2158,10 +2165,9 @@ static int lpphy_b2063_tune(struct b43_wldev *dev,
static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
unsigned int new_channel)
{
+ struct b43_phy_lp *lpphy = dev->phy.lp;
int err;
- b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
-
if (dev->phy.radio_ver == 0x2063) {
err = lpphy_b2063_tune(dev, new_channel);
if (err)
@@ -2174,6 +2180,9 @@ static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
lpphy_adjust_gain_table(dev, channel2freq_lp(new_channel));
}
+ lpphy->channel = new_channel;
+ b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
+
return 0;
}
@@ -2185,10 +2194,9 @@ static int b43_lpphy_op_init(struct b43_wldev *dev)
lpphy_baseband_init(dev);
lpphy_radio_init(dev);
lpphy_calibrate_rc(dev);
- err = b43_lpphy_op_switch_channel(dev,
- b43_lpphy_op_get_default_chan(dev));
+ err = b43_lpphy_op_switch_channel(dev, 7);
if (err) {
- b43dbg(dev->wl, "Switch to init channel failed, error = %d.\n",
+ b43dbg(dev->wl, "Switch to channel 7 failed, error = %d.\n",
err);
}
lpphy_tx_pctl_init(dev);
@@ -2222,6 +2230,7 @@ const struct b43_phy_operations b43_phyops_lp = {
.init = b43_lpphy_op_init,
.phy_read = b43_lpphy_op_read,
.phy_write = b43_lpphy_op_write,
+ .phy_maskset = b43_lpphy_op_maskset,
.radio_read = b43_lpphy_op_radio_read,
.radio_write = b43_lpphy_op_radio_write,
.software_rfkill = b43_lpphy_op_software_rfkill,
diff --git a/drivers/net/wireless/b43/phy_lp.h b/drivers/net/wireless/b43/phy_lp.h
index e158d1f..c3232c1 100644
--- a/drivers/net/wireless/b43/phy_lp.h
+++ b/drivers/net/wireless/b43/phy_lp.h
@@ -888,6 +888,9 @@ struct b43_phy_lp {
bool crs_usr_disable, crs_sys_disable;
unsigned int pdiv;
+
+ /* The channel we are tuned to */
+ u8 channel;
};
enum tssi_mux_mode {
diff --git a/drivers/net/wireless/b43/tables_lpphy.c b/drivers/net/wireless/b43/tables_lpphy.c
index 60d472f..c784def 100644
--- a/drivers/net/wireless/b43/tables_lpphy.c
+++ b/drivers/net/wireless/b43/tables_lpphy.c
@@ -624,30 +624,35 @@ u32 b43_lptab_read(struct b43_wldev *dev, u32 offset)
void b43_lptab_read_bulk(struct b43_wldev *dev, u32 offset,
unsigned int nr_elements, void *_data)
{
- u32 type, value;
+ u32 type;
u8 *data = _data;
unsigned int i;
type = offset & B43_LPTAB_TYPEMASK;
+ offset &= ~B43_LPTAB_TYPEMASK;
+ B43_WARN_ON(offset > 0xFFFF);
+
+ b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
+
for (i = 0; i < nr_elements; i++) {
- value = b43_lptab_read(dev, offset);
switch (type) {
case B43_LPTAB_8BIT:
- *data = value;
+ *data = b43_phy_read(dev, B43_LPPHY_TABLEDATALO) & 0xFF;
data++;
break;
case B43_LPTAB_16BIT:
- *((u16 *)data) = value;
+ *((u16 *)data) = b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
data += 2;
break;
case B43_LPTAB_32BIT:
- *((u32 *)data) = value;
+ *((u32 *)data) = b43_phy_read(dev, B43_LPPHY_TABLEDATAHI);
+ *((u32 *)data) <<= 16;
+ *((u32 *)data) |= b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
data += 4;
break;
default:
B43_WARN_ON(1);
}
- offset++;
}
}
@@ -688,26 +693,34 @@ void b43_lptab_write_bulk(struct b43_wldev *dev, u32 offset,
unsigned int i;
type = offset & B43_LPTAB_TYPEMASK;
+ offset &= ~B43_LPTAB_TYPEMASK;
+ B43_WARN_ON(offset > 0xFFFF);
+
+ b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
+
for (i = 0; i < nr_elements; i++) {
switch (type) {
case B43_LPTAB_8BIT:
value = *data;
data++;
+ B43_WARN_ON(value & ~0xFF);
+ b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
break;
case B43_LPTAB_16BIT:
value = *((u16 *)data);
data += 2;
+ B43_WARN_ON(value & ~0xFFFF);
+ b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
break;
case B43_LPTAB_32BIT:
value = *((u32 *)data);
data += 4;
+ b43_phy_write(dev, B43_LPPHY_TABLEDATAHI, value >> 16);
+ b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
break;
default:
B43_WARN_ON(1);
- value = 0;
}
- b43_lptab_write(dev, offset, value);
- offset++;
}
}
@@ -777,7 +790,7 @@ static const u8 lpphy_pll_fraction_table[] = {
0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
};
-static const u16 lpphy_iq_local_table[] = {
+static const u16 lpphy_iqlo_cal_table[] = {
0x0200, 0x0300, 0x0400, 0x0600, 0x0800, 0x0b00, 0x1000, 0x1001, 0x1002,
0x1003, 0x1004, 0x1005, 0x1006, 0x1007, 0x1707, 0x2007, 0x2d07, 0x4007,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
@@ -789,10 +802,17 @@ static const u16 lpphy_iq_local_table[] = {
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x4000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x0000, 0x0000,
+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
};
-static const u16 lpphy_ofdm_cck_gain_table[] = {
+static const u16 lpphy_rev0_ofdm_cck_gain_table[] = {
+ 0x0001, 0x0001, 0x0001, 0x0001, 0x1001, 0x2001, 0x3001, 0x4001, 0x5001,
+ 0x6001, 0x7001, 0x7011, 0x7021, 0x2035, 0x2045, 0x2055, 0x2065, 0x2075,
+ 0x006d, 0x007d, 0x014d, 0x015d, 0x115d, 0x035d, 0x135d, 0x055d, 0x155d,
+ 0x0d5d, 0x1d5d, 0x2d5d, 0x555d, 0x655d, 0x755d,
+};
+
+static const u16 lpphy_rev1_ofdm_cck_gain_table[] = {
0x5000, 0x6000, 0x7000, 0x0001, 0x1001, 0x2001, 0x3001, 0x4001, 0x5001,
0x6001, 0x7001, 0x7011, 0x7021, 0x2035, 0x2045, 0x2055, 0x2065, 0x2075,
0x006d, 0x007d, 0x014d, 0x015d, 0x115d, 0x035d, 0x135d, 0x055d, 0x155d,
@@ -2263,11 +2283,18 @@ void lpphy_rev0_1_table_init(struct b43_wldev *dev)
b43_lptab_write_bulk(dev, B43_LPTAB8(6, 0),
ARRAY_SIZE(lpphy_pll_fraction_table), lpphy_pll_fraction_table);
b43_lptab_write_bulk(dev, B43_LPTAB16(0, 0),
- ARRAY_SIZE(lpphy_iq_local_table), lpphy_iq_local_table);
- b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
- ARRAY_SIZE(lpphy_ofdm_cck_gain_table), lpphy_ofdm_cck_gain_table);
- b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
- ARRAY_SIZE(lpphy_ofdm_cck_gain_table), lpphy_ofdm_cck_gain_table);
+ ARRAY_SIZE(lpphy_iqlo_cal_table), lpphy_iqlo_cal_table);
+ if (dev->phy.rev == 0) {
+ b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
+ ARRAY_SIZE(lpphy_rev0_ofdm_cck_gain_table), lpphy_rev0_ofdm_cck_gain_table);
+ b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
+ ARRAY_SIZE(lpphy_rev0_ofdm_cck_gain_table), lpphy_rev0_ofdm_cck_gain_table);
+ } else {
+ b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
+ ARRAY_SIZE(lpphy_rev1_ofdm_cck_gain_table), lpphy_rev1_ofdm_cck_gain_table);
+ b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
+ ARRAY_SIZE(lpphy_rev1_ofdm_cck_gain_table), lpphy_rev1_ofdm_cck_gain_table);
+}
b43_lptab_write_bulk(dev, B43_LPTAB16(15, 0),
ARRAY_SIZE(lpphy_gain_delta_table), lpphy_gain_delta_table);
b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0),
@@ -2281,22 +2308,6 @@ void lpphy_rev2plus_table_init(struct b43_wldev *dev)
B43_WARN_ON(dev->phy.rev < 2);
- /*
- * FIXME This code follows the specs, but it looks wrong:
- * In each pass, it writes 4 bytes to an offset in table ID 7,
- * then increments the offset by 1 for the next pass. This results
- * in the first 3 bytes of each pass except the first one getting
- * written to a location that has already been zeroed in the previous
- * pass.
- * This is what the vendor driver does, but it still looks suspicious.
- *
- * This should probably suffice:
- *
- * for (i = 0; i < 704; i+=4)
- * b43_lptab_write(dev, B43_LPTAB32(7, i), 0)
- *
- * This should be tested once the code is functional.
- */
for (i = 0; i < 704; i++)
b43_lptab_write(dev, B43_LPTAB32(7, i), 0);
@@ -2323,7 +2334,7 @@ void lpphy_rev2plus_table_init(struct b43_wldev *dev)
b43_lptab_write_bulk(dev, B43_LPTAB8(6, 0),
ARRAY_SIZE(lpphy_pll_fraction_table), lpphy_pll_fraction_table);
b43_lptab_write_bulk(dev, B43_LPTAB16(0, 0),
- ARRAY_SIZE(lpphy_iq_local_table), lpphy_iq_local_table);
+ ARRAY_SIZE(lpphy_iqlo_cal_table), lpphy_iqlo_cal_table);
b43_lptab_write_bulk(dev, B43_LPTAB32(9, 0),
ARRAY_SIZE(lpphy_papd_eps_table), lpphy_papd_eps_table);
b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0),
--
1.5.6
^ permalink raw reply related
* [PATCH] ssb: Implement PMU LDO control and use it in b43
From: Gábor Stefanik @ 2009-08-26 18:51 UTC (permalink / raw)
To: John Linville, Michael Buesch, Larry Finger, Mark Huijgen
Cc: Broadcom Wireless, linux-wireless
In-Reply-To: <1251312686-32067-2-git-send-email-netrolller.3d@gmail.com>
Implement the "PMU LDO set voltage" and "PMU LDO PA ref enable"
functions, and use them during LP-PHY baseband init in b43.
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
---
drivers/net/wireless/b43/phy_lp.c | 10 +--
drivers/ssb/driver_chipcommon_pmu.c | 94 +++++++++++++++++++++++++++++
include/linux/ssb/ssb_driver_chipcommon.h | 10 +++
3 files changed, 107 insertions(+), 7 deletions(-)
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index 1a57d33..80f245c 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -234,19 +234,15 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
if ((bus->sprom.boardflags_lo & B43_BFL_FEM) &&
((b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
(bus->sprom.boardflags_hi & B43_BFH_PAREF))) {
- /* TODO:
- * Set the LDO voltage to 0x0028 - FIXME: What is this?
- * Call sb_pmu_set_ldo_voltage with 4 and the LDO voltage
- * as arguments
- * Call sb_pmu_paref_ldo_enable with argument TRUE
- */
+ ssb_pmu_set_ldo_voltage(&bus->chipco, LDO_PAREF, 0x28);
+ ssb_pmu_set_ldo_paref(&bus->chipco, true);
if (dev->phy.rev == 0) {
b43_phy_maskset(dev, B43_LPPHY_LP_RF_SIGNAL_LUT,
0xFFCF, 0x0010);
}
b43_lptab_write(dev, B43_LPTAB16(11, 7), 60);
} else {
- //TODO: Call ssb_pmu_paref_ldo_enable with argument FALSE
+ ssb_pmu_set_ldo_paref(&bus->chipco, false);
b43_phy_maskset(dev, B43_LPPHY_LP_RF_SIGNAL_LUT,
0xFFCF, 0x0020);
b43_lptab_write(dev, B43_LPTAB16(11, 7), 100);
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c
index 4aaddee..64abd11 100644
--- a/drivers/ssb/driver_chipcommon_pmu.c
+++ b/drivers/ssb/driver_chipcommon_pmu.c
@@ -28,6 +28,21 @@ static void ssb_chipco_pll_write(struct ssb_chipcommon *cc,
chipco_write32(cc, SSB_CHIPCO_PLLCTL_DATA, value);
}
+static void ssb_chipco_regctl_maskset(struct ssb_chipcommon *cc,
+ u32 offset, u32 mask, u32 set)
+{
+ u32 value;
+
+ chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR);
+ chipco_write32(cc, SSB_CHIPCO_REGCTL_ADDR, offset);
+ chipco_read32(cc, SSB_CHIPCO_REGCTL_ADDR);
+ value = chipco_read32(cc, SSB_CHIPCO_REGCTL_DATA);
+ value &= mask;
+ value |= set;
+ chipco_write32(cc, SSB_CHIPCO_REGCTL_DATA, value);
+ chipco_read32(cc, SSB_CHIPCO_REGCTL_DATA);
+}
+
struct pmu0_plltab_entry {
u16 freq; /* Crystal frequency in kHz.*/
u8 xf; /* Crystal frequency value for PMU control */
@@ -506,3 +521,82 @@ void ssb_pmu_init(struct ssb_chipcommon *cc)
ssb_pmu_pll_init(cc);
ssb_pmu_resources_init(cc);
}
+
+void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,
+ enum ssb_pmu_ldo_volt_id id, u32 voltage)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+ u32 addr, shift, mask;
+
+ switch (bus->chip_id) {
+ case 0x4328:
+ case 0x5354:
+ switch (id) {
+ case LDO_VOLT1:
+ addr = 2;
+ shift = 25;
+ mask = 0xF;
+ break;
+ case LDO_VOLT2:
+ addr = 3;
+ shift = 1;
+ mask = 0xF;
+ break;
+ case LDO_VOLT3:
+ addr = 3;
+ shift = 9;
+ mask = 0xF;
+ break;
+ case LDO_PAREF:
+ addr = 3;
+ shift = 17;
+ mask = 0x3F;
+ break;
+ default:
+ SSB_WARN_ON(1);
+ return;
+ }
+ break;
+ case 0x4312:
+ if (SSB_WARN_ON(id != LDO_PAREF))
+ return;
+ addr = 0;
+ shift = 21;
+ mask = 0x3F;
+ break;
+ default:
+ return;
+ }
+
+ ssb_chipco_regctl_maskset(cc, addr, ~(mask << shift),
+ (voltage & mask) << shift);
+}
+
+void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+ int ldo;
+
+ switch (bus->chip_id) {
+ case 0x4312:
+ ldo = SSB_PMURES_4312_PA_REF_LDO;
+ break;
+ case 0x4328:
+ ldo = SSB_PMURES_4328_PA_REF_LDO;
+ break;
+ case 0x5354:
+ ldo = SSB_PMURES_5354_PA_REF_LDO;
+ break;
+ default:
+ return;
+ }
+
+ if (on)
+ chipco_set32(cc, SSB_CHIPCO_PMU_MINRES_MSK, 1 << ldo);
+ else
+ chipco_mask32(cc, SSB_CHIPCO_PMU_MINRES_MSK, ~(1 << ldo));
+ chipco_read32(cc, SSB_CHIPCO_PMU_MINRES_MSK); //SPEC FIXME found via mmiotrace - dummy read?
+}
+
+EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage);
+EXPORT_SYMBOL(ssb_pmu_set_ldo_paref);
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h
index d3b1d18..4e27acf 100644
--- a/include/linux/ssb/ssb_driver_chipcommon.h
+++ b/include/linux/ssb/ssb_driver_chipcommon.h
@@ -629,5 +629,15 @@ extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
/* PMU support */
extern void ssb_pmu_init(struct ssb_chipcommon *cc);
+enum ssb_pmu_ldo_volt_id {
+ LDO_PAREF = 0,
+ LDO_VOLT1,
+ LDO_VOLT2,
+ LDO_VOLT3,
+};
+
+void ssb_pmu_set_ldo_voltage(struct ssb_chipcommon *cc,
+ enum ssb_pmu_ldo_volt_id id, u32 voltage);
+void ssb_pmu_set_ldo_paref(struct ssb_chipcommon *cc, bool on);
#endif /* LINUX_SSB_CHIPCO_H_ */
--
1.5.6
^ permalink raw reply related
* [PATCH] rt2x00: Cleanup rt2x00mac_bss_info_changed()
From: Ivo van Doorn @ 2009-08-26 19:04 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless, users
Since patch "rt2x00: bss_info_changed() callback is allowed to sleep" the
variable delayed wasn't used anymore. This means it can be removed
along with the call to schedule_work which depended on that variable.
Signed-off-by: Ivo van Doorn <IvDoorn@gmail.com>
---
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index a91f316..929b85f 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -582,7 +582,6 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
{
struct rt2x00_dev *rt2x00dev = hw->priv;
struct rt2x00_intf *intf = vif_to_intf(vif);
- unsigned int delayed = 0;
int update_bssid = 0;
/*
@@ -645,13 +644,6 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
*/
if (changes & ~(BSS_CHANGED_ASSOC | BSS_CHANGED_HT))
rt2x00lib_config_erp(rt2x00dev, intf, bss_conf);
-
- spin_lock(&intf->lock);
- if (delayed) {
- intf->delayed_flags |= delayed;
- schedule_work(&rt2x00dev->intf_work);
- }
- spin_unlock(&intf->lock);
}
EXPORT_SYMBOL_GPL(rt2x00mac_bss_info_changed);
^ permalink raw reply related
* libertas wext.c: IW_ENCODE_NOKEY for WEP keys [resend as plain text]
From: Bing Zhao @ 2009-08-26 19:11 UTC (permalink / raw)
To: libertas-dev@lists.infradead.org
Cc: dwmw2@infradead.org, Dan Williams, linux-wireless@vger.kernel.org
Hi all,
There was a commit to unset the IW_ENCODE_NOKEY flag for WEP keys.
"libertas: Don't set IW_ENCODE_NOKEY when returning WEP keys."
Without this change, the IW_ENCODE_NOKEY flag is set for WEP keys and then iwconfig command would display "****-****-**" as "Encryption key".
After this change, the IW_ENCODE_NOKEY flag is NOT set for WEP keys and then iwconfig command will display plain text of the WEP key ("1234-5678-90" in my case, below).
eth1 IEEE 802.11b/g ESSID:"Cisco1-G"
Mode:Managed Frequency:2.462 GHz Access Point: 00:1D:45:CE:20:D0
Bit Rate:54 Mb/s Tx-Power=15 dBm
Retry short limit:8 RTS thr=2347 B Fragment thr=2346 B
Encryption key:1234-5678-90 Security mode:open
Power Management:off
Link Quality=92/100 Signal level=-66 dBm Noise level=-94 dBm
Rx invalid nwid:0 Rx invalid crypt:0 Rx invalid frag:0
Tx excessive retries:0 Invalid misc:0 Missed beacon:0
Was there any reason to not set IW_ENCODE_NOKEY for WEP keys?
Is it feasible to set IW_ENCODE_NOKEY for WEP switch case?
--- a/drivers/net/wireless/libertas/wext.c
+++ b/drivers/net/wireless/libertas/wext.c
@@ -1165,6 +1165,7 @@ static int lbs_get_encode(struct net_device *dev,
dwrq->flags |= (index + 1);
/* Return WEP enabled */
dwrq->flags &= ~IW_ENCODE_DISABLED;
+ dwrq->flags |= IW_ENCODE_NOKEY;
} else if ((priv->secinfo.WPAenabled)
|| (priv->secinfo.WPA2enabled)) {
/* return WPA enabled */
Thanks for your help,
Bing
^ permalink raw reply
* ath9k DMA problems
From: Howard Chu @ 2009-08-26 19:38 UTC (permalink / raw)
To: linux-wireless@vger.kernel.org
Still seeing occasional hangs using the ath9k in 2.6.31-rc6, and even worse
using compat-wireless 2009-08-22. Today I got this which was even more
interesting:
[369014.776586] wlan0: associate with AP 00:12:17:26:56:10 (try 1)
[369014.779197] wlan0: RX ReassocResp from 00:12:17:26:56:10 (capab=0x411
status=0 aid=2)
[369014.779197] wlan0: associated
[369472.707961] ath9k: DMA failed to stop in 10 ms AR_CR=0xdeadbeef
AR_DIAG_SW=0xdeadbeef
This is on an HP dv5z laptop, it reports an AR9280 at boot.
--
-- Howard Chu
CTO, Symas Corp. http://www.symas.com
Director, Highland Sun http://highlandsun.com/hyc/
Chief Architect, OpenLDAP http://www.openldap.org/project/
^ permalink raw reply
* [PATCH] b43: Remove scary message from LP-PHY's Kconfig
From: Gábor Stefanik @ 2009-08-26 19:48 UTC (permalink / raw)
To: John Linville, Michael Buesch, Larry Finger, Mark Huijgen
Cc: Broadcom Wireless, linux-wireless
From: root Gábor Stefanik <netrolller.3d@gmail.com>
The most common LP-PHY device, BCM4312, is now fully functional.
So, no need to say "probably won't work for you" anymore.
It's also not "for debuggers and developers only", as it is
perfectly usable for end-users now (at least for BCM4312).
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
---
This should only be applied once the "Qdiv roundup" and the "Fix and update"
patches reach the tree, as those 2 patches are needed to make the BCM4312
really work.
drivers/net/wireless/b43/Kconfig | 3 ---
1 files changed, 0 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig
index 87d10c8..1c0999b 100644
--- a/drivers/net/wireless/b43/Kconfig
+++ b/drivers/net/wireless/b43/Kconfig
@@ -88,9 +88,6 @@ config B43_PHY_LP
and embedded devices. It supports 802.11a/g
(802.11a support is optional, and currently disabled).
- This is heavily experimental, and probably will not work for you.
- Say N unless you want to help debug the driver.
-
# This config option automatically enables b43 LEDS support,
# if it's possible.
config B43_LEDS
--
1.5.6
^ permalink raw reply related
* Re: 2.6.31-rc7-git2: Reported regressions 2.6.29 -> 2.6.30
From: Rafael J. Wysocki @ 2009-08-26 20:11 UTC (permalink / raw)
To: Rafał Miłecki
Cc: Linux Kernel Mailing List, DRI, Linux SCSI List,
Network Development, Linux Wireless List, Natalie Protasevich,
Linux ACPI, Andrew Morton, Kernel Testers List, Linus Torvalds,
Linux PM List, Len Brown
In-Reply-To: <b170af450908260147o60427997ne6b9872198893c41@mail.gmail.com>
On Wednesday 26 August 2009, Rafał Miłecki wrote:
> 2009/8/25 Rafael J. Wysocki <rjw@sisk.pl>:
> > Bug-Entry : http://bugzilla.kernel.org/show_bug.cgi?id=13514
> > Subject : acer_wmi causes stack corruption
> > Submitter : Rus <harbour@sfinx.od.ua>
> > Date : 2009-06-12 08:13 (75 days old)
>
> It has patch, just Len doesn't seem to... don't know, read the topic?
> http://patchwork.kernel.org/patch/29082/
>
> Can we ping Len somehow to push this patch directly to Linus's tree?
I have updated the bug entry, hopefully Len will notice it now.
Thanks,
Rafael
^ permalink raw reply
* [PATCH] iwlwifi: fix ICT irq table endianness
From: Johannes Berg @ 2009-08-26 20:15 UTC (permalink / raw)
To: John Linville; +Cc: Reinette Chatre, linux-wireless
The ICT IRQ table is a set of __le32 values, not u32 values,
so when reading it we need to take into account that it has
to be converted to CPU endianness. This was causing a lot of
trouble on my powerpc box where various things would simply
not work for no apparent reason with 5xxx cards, but worked
with 4965 -- which doesn't use the ICT table.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
---
Oddly, the __le32 pointer doesn't help one bit, sparse
doesn't warn. Oh well. This makes lots of things work
better for me :)
drivers/net/wireless/iwlwifi/iwl-core.c | 10 +++++-----
drivers/net/wireless/iwlwifi/iwl-dev.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
--- wireless-testing.orig/drivers/net/wireless/iwlwifi/iwl-dev.h 2009-08-26 20:37:01.000000000 +0200
+++ wireless-testing/drivers/net/wireless/iwlwifi/iwl-dev.h 2009-08-26 20:37:06.000000000 +0200
@@ -1170,7 +1170,7 @@ struct iwl_priv {
struct iwl_hw_params hw_params;
/* INT ICT Table */
- u32 *ict_tbl;
+ __le32 *ict_tbl;
dma_addr_t ict_tbl_dma;
dma_addr_t aligned_ict_tbl_dma;
int ict_index;
--- wireless-testing.orig/drivers/net/wireless/iwlwifi/iwl-core.c 2009-08-26 20:39:14.000000000 +0200
+++ wireless-testing/drivers/net/wireless/iwlwifi/iwl-core.c 2009-08-26 20:40:36.000000000 +0200
@@ -1823,7 +1823,7 @@ int iwl_reset_ict(struct iwl_priv *priv)
spin_lock_irqsave(&priv->lock, flags);
iwl_disable_interrupts(priv);
- memset(&priv->ict_tbl[0],0, sizeof(u32) * ICT_COUNT);
+ memset(&priv->ict_tbl[0], 0, sizeof(u32) * ICT_COUNT);
val = priv->aligned_ict_tbl_dma >> PAGE_SHIFT;
@@ -1901,13 +1901,13 @@ irqreturn_t iwl_isr_ict(int irq, void *d
/* read all entries that not 0 start with ict_index */
while (priv->ict_tbl[priv->ict_index]) {
- val |= priv->ict_tbl[priv->ict_index];
+ val |= le32_to_cpu(priv->ict_tbl[priv->ict_index]);
IWL_DEBUG_ISR(priv, "ICT index %d value 0x%08X\n",
- priv->ict_index,
- priv->ict_tbl[priv->ict_index]);
+ priv->ict_index,
+ le32_to_cpu(priv->ict_tbl[priv->ict_index]));
priv->ict_tbl[priv->ict_index] = 0;
priv->ict_index = iwl_queue_inc_wrap(priv->ict_index,
- ICT_COUNT);
+ ICT_COUNT);
}
^ permalink raw reply
* Re: [PATCH] ath5k: fix print on warning on ath5k_hw_to_driver_rix()
From: Luis R. Rodriguez @ 2009-08-26 20:20 UTC (permalink / raw)
To: Bob Copeland
Cc: Luis Rodriguez, linville@tuxdriver.com,
linux-wireless@vger.kernel.org, Johannes Berg, Jouni.Malinen
In-Reply-To: <b6c5339f0908261003g40ed910amc347305e4604ee4a@mail.gmail.com>
On Wed, Aug 26, 2009 at 10:03:09AM -0700, Bob Copeland wrote:
> On Wed, Aug 26, 2009 at 12:29 PM, Luis R.
> Rodriguez<lrodriguez@atheros.com> wrote:
>
> > Not sure I follow. Let me explain the logic here a little better.
> > ath5k_reset() had a check to see if we switched channels. The check
> > is above, and I moved it ath5k_chan_set() called by the config callback.
> > Reason for this is channel change *only* occurs through the config callback
> > so we can be certain no other path will call reset with a channel change
> > request.
>
> But previously we did all this stuff for _every_ reset except the first
> one,
Actually we did it in every ath5k_reset() if and only if chan was not NULL.
We called ath5k_reset() from 3 places:
* Init
* Channel change
* Reset tasklet for hw issues
chan was only null upon init as you point out, so you are right in that
I overlooked that we currently do this also upon hw issues.
> now we only do it for channel change resets. It may make sense your
> way, but I'd rather see that as a separate patch rather than part of a
> cleanup.
Absolutely, I overlooked this, thanks for picking that up.
> (Also, chan_change is used to skip a bunch of phy register writes
> that we only need to do once, not sure if that changes here).
Yeah since I also used ath5k_reset_init() on the reset hw issue tasklet and
that does pass false for channel_change this patch would have changed that
as well, so I'll fix that.
> >> There's just no synchronization of this stuff, not too surprising there
> >> are races.
> >
> > config calls for reset seem to be with sc->lock. ath9k uses a mutex to
> > protect races between mac80211 callback calls, ath5k seems to use the
> > sc->lock *sometimes*, a good review of that may help but for channel
> > change this seems protected unless I missed something. Since channel
> > change goes through the config callback and since the callback protects
> > through sc->lock I can't see how we'd race against changing channels.
>
> rx_tasklet doesn't (can't) take the mutex though. Here's the race:
>
> cpu 1 cpu 2
> 1mbit packet received, ack intr and queue it
> client changes to 5ghz band
> hw->conf.channel = 36
> ath5k_rx_tasklet runs
> hmm, we got 1mbit packet on channel 36, wtf
> ath5k_chan_change()
>
> This is still racy with curband variables of course, but IMO the
> proposed change actually makes the race wider (in current code, we only
> update the band after we disable the interrupts, but the tasklet can
> still run on queued packets).
I don't want to bother looking ath ath5k solutions to the race, I rather
we try to fix this if possible with a generic solution on mac80211. I suspect
ath5k is not the only one with this possible race.
> The right thing to do is either process or drop all of those packets
Would be nice if we did not have to, those packets can be very valuable
considering we now support spreading our scan over time.
> with interrupts disabled before updating the band/channel (rx_drainq),
That would be nice, so prior to channel change we need to ensure we:
* Disable interrupts
* Disable RX
* Process all pending frames in RX queue
It is the last part that it seems we are missing. Running tasklet_schedule()
will ensure we can schedule the tasklet but it does not ensure we will
wait until it has run at least once. Johill pointed out tasklet_disable()
followed by a tasklet_enable() would do it, but seems rather odd.
But do we need this?
In the rx tasklet we need band to access the right rate table -- this is
how we got into this conversation but if you think about it you also need
to ensure your harware hasn't already flipped to another band otherwise
you can start sending mac80211 frames for a different band. This certainly
matters for rate control but haven't reviewed all the details of where
inconsistancy between the hw->conf.channel and the skbs received by
mac80211 are.
Processing RXd frames prior to switching channels seems like a good idea
regardless.
>From what I see Atheros RX descriptors do not have the frequency on which the
frame was received on so you do need some sort of house keeping.
mac80211/cfg80211 does this for us so I'd like to try to avoid doing more
on drivers if possible.
Since cfg80211 modifies hw->conf.channel prior to calling drv_config() it
is possible for the driver to not reliably use this variable either right now.
So how about a generic rx_drain() callback for mac80211 drivers and document
that on it we need disable RXing frames, disable interrupts for RX,
and then either have the driver drop pending frames (worst case) or process them.
mac80211 could then use this prior to drv_config() if we are changing channels.
> or protect that channel info with a spinlock. Or perhaps we can
> figure it out directly from the rx descriptor -- I looked at this
> briefly and didn't think there was enough info there, but didn't spend
> much time on it.
I looked too and did not find it. I can't find a reason to have it in
hardware descriptors though, given that you could just drain rx prior to
a switch.
Only argument I can see which may affect draining RX prior to channel
change is it could delay the time it takes for you to switch. Either way
this seems just a lot cleaner to support.
Thoughts?
Luis
^ permalink raw reply
* Re: [PATCH] iwlwifi: fix ICT irq table endianness
From: reinette chatre @ 2009-08-26 20:25 UTC (permalink / raw)
To: Johannes Berg; +Cc: John Linville, linux-wireless
In-Reply-To: <1251317713.14690.0.camel@johannes.local>
On Wed, 2009-08-26 at 13:15 -0700, Johannes Berg wrote:
> The ICT IRQ table is a set of __le32 values, not u32 values,
> so when reading it we need to take into account that it has
> to be converted to CPU endianness. This was causing a lot of
> trouble on my powerpc box where various things would simply
> not work for no apparent reason with 5xxx cards, but worked
> with 4965 -- which doesn't use the ICT table.
>
> Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
Thank you very much
Acked-by: Reinette Chatre <reinette.chatre@intel.com>
Reinette
^ permalink raw reply
* Re: [RFC/RFT] rtl8187: Implement rfkill support
From: Luis R. Rodriguez @ 2009-08-26 20:33 UTC (permalink / raw)
To: Johannes Berg
Cc: htl10, Hin-Tak Leung, Larry Finger, Herton Ronaldo Krzesinski,
linux-wireless
In-Reply-To: <1251297273.15619.11.camel@johannes.local>
On Wed, Aug 26, 2009 at 7:34 AM, Johannes Berg<johannes@sipsolutions.net> wrote:
> On Wed, 2009-08-26 at 13:33 +0000, Hin-Tak Leung wrote:
>
>> > Or wait ... are you using compat-wireless?
>>
>> Yes, I am. I mentioned this and did wonder if the _backport/ part
>> in /sys/class is important.
>
> Sorry, didn't see.
>
> Anyway, that's pretty clearly the reason -- Luis added NETDEV_PRE_UP to
> some compat*.h but obviously the kernel won't ever call that notifier,
> so cfg80211 doesn't get a chance to reject the IFUP. No idea how to
> handle that -- it'll be working fine in a regular tree.
>
> Luis, the only way to handle that would be to manually call the PRE_UP
> notifier from mac80211's subif_open() and if that returns an error
> (warning: the calling convention is weird) return the error... that's
> weird but would work.
Neat, thanks. Not sure if I'll get to this this anytime soon, but if
someone is interested in it please give it a shot and send a patch.
That would be nice.
Luis
^ permalink raw reply
* Re: [PATCH] b43: Fix and update LP-PHY code
From: Michael Buesch @ 2009-08-26 20:42 UTC (permalink / raw)
To: Gábor Stefanik
Cc: John Linville, Larry Finger, Mark Huijgen, Broadcom Wireless,
linux-wireless
In-Reply-To: <1251312686-32067-2-git-send-email-netrolller.3d@gmail.com>
On Wednesday 26 August 2009 20:51:25 Gábor Stefanik wrote:
> -Fix a few nasty typos (b43_phy_* operations instead of b43_radio_*)
> in the channel tune routines.
> -Fix some typos & spec errors found by MMIO tracing.
> -Optimize b43_phy_write & b43_phy_mask/set/maskset to use
> only the minimal number of MMIO accesses. (Write is possible
> using a single 32-bit MMIO write, while set/mask/maskset can
> be done in 3 16-bit MMIOs).
Why does it matter? PHY access is not done in any hotpath. So why
not prefer simple code over optimized code?
> -Set the default channel back to 1, as the bug forcing us to use
> channel 7 is now fixed.
And, everything in its own patch, please. I don't see a reason for
patching unrelated things in one big patch.
>
> With this, the device comes up, scans, associates, transmits,
> receives, monitors and injects on all channels - in other words,
> it's fully functional. Sensitivity and TX power are still sub-optimal,
> due to the lack of calibration (that's next on my list).
>
> Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
> ---
> drivers/net/wireless/b43/phy_common.c | 27 +++++++--
> drivers/net/wireless/b43/phy_common.h | 3 +
> drivers/net/wireless/b43/phy_lp.c | 91 +++++++++++++++++--------------
> drivers/net/wireless/b43/phy_lp.h | 3 +
> drivers/net/wireless/b43/tables_lpphy.c | 79 +++++++++++++++------------
> 5 files changed, 122 insertions(+), 81 deletions(-)
>
> diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c
> index 51686ec..6e704be 100644
> --- a/drivers/net/wireless/b43/phy_common.c
> +++ b/drivers/net/wireless/b43/phy_common.c
> @@ -249,20 +249,35 @@ void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
>
> void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask)
> {
> - b43_phy_write(dev, offset,
> - b43_phy_read(dev, offset) & mask);
> + if (dev->phy.ops->phy_maskset) {
> + assert_mac_suspended(dev);
> + dev->phy.ops->phy_maskset(dev, offset, mask, 0);
> + } else {
> + b43_phy_write(dev, offset,
> + b43_phy_read(dev, offset) & mask);
> + }
> }
>
> void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set)
> {
> - b43_phy_write(dev, offset,
> - b43_phy_read(dev, offset) | set);
> + if (dev->phy.ops->phy_maskset) {
> + assert_mac_suspended(dev);
> + dev->phy.ops->phy_maskset(dev, offset, 0xFFFF, set);
> + } else {
> + b43_phy_write(dev, offset,
> + b43_phy_read(dev, offset) | set);
> + }
> }
>
> void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
> {
> - b43_phy_write(dev, offset,
> - (b43_phy_read(dev, offset) & mask) | set);
> + if (dev->phy.ops->phy_maskset) {
> + assert_mac_suspended(dev);
> + dev->phy.ops->phy_maskset(dev, offset, mask, set);
> + } else {
> + b43_phy_write(dev, offset,
> + (b43_phy_read(dev, offset) & mask) | set);
> + }
> }
>
> int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel)
> diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h
> index 9f9f23c..b47a0f5 100644
> --- a/drivers/net/wireless/b43/phy_common.h
> +++ b/drivers/net/wireless/b43/phy_common.h
> @@ -95,6 +95,8 @@ enum b43_txpwr_result {
> * Must not be NULL.
> * @phy_write: Write to a PHY register.
> * Must not be NULL.
> + * @phy_maskset: Maskset a PHY register, taking shortcuts.
> + * If it is NULL, a generic algorithm is used.
> * @radio_read: Read from a Radio register.
> * Must not be NULL.
> * @radio_write: Write to a Radio register.
> @@ -154,6 +156,7 @@ struct b43_phy_operations {
> /* Register access */
> u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
> void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
> + void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
> u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
> void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
>
> diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
> index 5306f2c..1a57d33 100644
> --- a/drivers/net/wireless/b43/phy_lp.c
> +++ b/drivers/net/wireless/b43/phy_lp.c
> @@ -44,7 +44,7 @@ static inline u16 channel2freq_lp(u8 channel)
> static unsigned int b43_lpphy_op_get_default_chan(struct b43_wldev *dev)
> {
> if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
> - return 7; //FIXME temporary - channel 1 is broken
> + return 1;
> return 36;
> }
>
> @@ -182,8 +182,8 @@ static void lpphy_adjust_gain_table(struct b43_wldev *dev, u32 freq)
> temp[1] = temp[0] + 0x1000;
> temp[2] = temp[0] + 0x2000;
>
> - b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp);
> b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0), 3, temp);
> + b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp);
> }
>
> static void lpphy_table_init(struct b43_wldev *dev)
> @@ -223,8 +223,8 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
> b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0x0006);
> b43_phy_mask(dev, B43_LPPHY_RX_RADIO_CTL, 0xFFFE);
> b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x0005);
> - b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC10, 0x0180);
> - b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3800);
> + b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0x0180);
> + b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3C00);
> b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFFF0, 0x0005);
> b43_phy_maskset(dev, B43_LPPHY_GAIN_MISMATCH_LIMIT, 0xFFC0, 0x001A);
> b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0x00B3);
> @@ -237,7 +237,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
> /* TODO:
> * Set the LDO voltage to 0x0028 - FIXME: What is this?
> * Call sb_pmu_set_ldo_voltage with 4 and the LDO voltage
> - * as arguments
> + * as arguments
> * Call sb_pmu_paref_ldo_enable with argument TRUE
> */
> if (dev->phy.rev == 0) {
> @@ -340,11 +340,11 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
> if (dev->phy.rev == 1) {
> tmp = b43_phy_read(dev, B43_LPPHY_CLIPCTRTHRESH);
> tmp2 = (tmp & 0x03E0) >> 5;
> - tmp2 |= tmp << 5;
> + tmp2 |= tmp2 << 5;
> b43_phy_write(dev, B43_LPPHY_4C3, tmp2);
> - tmp = b43_phy_read(dev, B43_LPPHY_OFDMSYNCTHRESH0);
> + tmp = b43_phy_read(dev, B43_LPPHY_GAINDIRECTMISMATCH);
> tmp2 = (tmp & 0x1F00) >> 8;
> - tmp2 |= tmp << 5;
> + tmp2 |= tmp2 << 5;
> b43_phy_write(dev, B43_LPPHY_4C4, tmp2);
> tmp = b43_phy_read(dev, B43_LPPHY_VERYLOWGAINDB);
> tmp2 = tmp & 0x00FF;
> @@ -761,7 +761,7 @@ static void lpphy_disable_crs(struct b43_wldev *dev, bool user)
> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
> b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB);
> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4);
> - b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFF7);
> + b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7);
> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x10);
> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
> @@ -956,7 +956,7 @@ static void lpphy_run_ddfs(struct b43_wldev *dev, int i_on, int q_on,
> b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFF9F, scale_idx << 5);
> b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0xFFFB);
> b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x2);
> - b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x20);
> + b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x20);
> }
>
> static bool lpphy_rx_iq_est(struct b43_wldev *dev, u16 samples, u8 time,
> @@ -968,7 +968,7 @@ static bool lpphy_rx_iq_est(struct b43_wldev *dev, u16 samples, u8 time,
> b43_phy_write(dev, B43_LPPHY_IQ_NUM_SMPLS_ADDR, samples);
> b43_phy_maskset(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFF00, time);
> b43_phy_mask(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFEFF);
> - b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFDFF);
> + b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);
>
> for (i = 0; i < 500; i++) {
> if (!(b43_phy_read(dev,
> @@ -1135,9 +1135,9 @@ static void lpphy_set_tx_power_control(struct b43_wldev *dev,
> }
> if (dev->phy.rev >= 2) {
> if (mode == B43_LPPHY_TXPCTL_HW)
> - b43_phy_maskset(dev, B43_PHY_OFDM(0xD0), 0xFD, 0x2);
> + b43_phy_set(dev, B43_PHY_OFDM(0xD0), 0x2);
> else
> - b43_phy_maskset(dev, B43_PHY_OFDM(0xD0), 0xFD, 0);
> + b43_phy_mask(dev, B43_PHY_OFDM(0xD0), 0xFFFD);
> }
> lpphy_write_tx_pctl_mode_to_hardware(dev);
> }
> @@ -1169,7 +1169,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
> err = b43_lpphy_op_switch_channel(dev, 7);
> if (err) {
> b43dbg(dev->wl,
> - "RC calib: Failed to switch to channel 7, error = %d",
> + "RC calib: Failed to switch to channel 7, error = %d\n",
> err);
> }
> old_txg_ovr = !!(b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40);
> @@ -1500,8 +1500,15 @@ static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
>
> static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
> {
> + b43_write32(dev, B43_MMIO_PHY_CONTROL, ((u32)value << 16) | reg);
> +}
> +
> +static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
> + u16 set)
> +{
> b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
> - b43_write16(dev, B43_MMIO_PHY_DATA, value);
> + b43_write16(dev, B43_MMIO_PHY_DATA,
> + (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
> }
>
> static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg)
> @@ -1920,8 +1927,8 @@ static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev)
>
> static void lpphy_b2062_vco_calib(struct b43_wldev *dev)
> {
> - b43_phy_write(dev, B2062_S_RFPLL_CTL21, 0x42);
> - b43_phy_write(dev, B2062_S_RFPLL_CTL21, 0x62);
> + b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x42);
> + b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x62);
> udelay(200);
> }
>
> @@ -1980,7 +1987,7 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
> tmp6 = tmp5 / tmp4;
> tmp7 = tmp5 % tmp4;
> b43_radio_write(dev, B2062_S_RFPLL_CTL29, tmp6 + ((2 * tmp7) / tmp4));
> - tmp8 = b43_phy_read(dev, B2062_S_RFPLL_CTL19);
> + tmp8 = b43_radio_read(dev, B2062_S_RFPLL_CTL19);
> tmp9 = ((2 * tmp3 * (tmp8 + 1)) + (3 * tmp1)) / (6 * tmp1);
> b43_radio_write(dev, B2062_S_RFPLL_CTL23, (tmp9 >> 8) + 16);
> b43_radio_write(dev, B2062_S_RFPLL_CTL24, tmp9 & 0xFF);
> @@ -2019,17 +2026,17 @@ static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
> {
> u16 tmp;
>
> - b43_phy_mask(dev, B2063_PLL_SP1, ~0x40);
> - tmp = b43_phy_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8;
> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp);
> + b43_radio_mask(dev, B2063_PLL_SP1, ~0x40);
> + tmp = b43_radio_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8;
> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp);
> udelay(1);
> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x4);
> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x4);
> udelay(1);
> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x6);
> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x6);
> udelay(1);
> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x7);
> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x7);
> udelay(300);
> - b43_phy_set(dev, B2063_PLL_SP1, 0x40);
> + b43_radio_set(dev, B2063_PLL_SP1, 0x40);
> }
>
> static int lpphy_b2063_tune(struct b43_wldev *dev,
> @@ -2124,31 +2131,31 @@ static int lpphy_b2063_tune(struct b43_wldev *dev,
> scale = 0;
> tmp5 = ((tmp4 + (tmp3 >> 1)) / tmp3) - 8;
> }
> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5);
> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6);
> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5);
> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6);
>
> tmp6 = lpphy_qdiv_roundup(100 * val1, val3, 16);
> tmp6 *= (tmp5 * 8) * (scale + 1);
> if (tmp6 > 150)
> tmp6 = 0;
>
> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6);
> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5);
> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6);
> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5);
>
> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4);
> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4);
> if (crystal_freq > 26000000)
> - b43_phy_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2);
> + b43_radio_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2);
> else
> - b43_phy_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD);
> + b43_radio_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD);
>
> if (val1 == 45)
> - b43_phy_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2);
> + b43_radio_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2);
> else
> - b43_phy_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD);
> + b43_radio_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD);
>
> - b43_phy_set(dev, B2063_PLL_SP2, 0x3);
> + b43_radio_set(dev, B2063_PLL_SP2, 0x3);
> udelay(1);
> - b43_phy_mask(dev, B2063_PLL_SP2, 0xFFFC);
> + b43_radio_mask(dev, B2063_PLL_SP2, 0xFFFC);
> lpphy_b2063_vco_calib(dev);
> b43_radio_write(dev, B2063_COMM15, old_comm15);
>
> @@ -2158,10 +2165,9 @@ static int lpphy_b2063_tune(struct b43_wldev *dev,
> static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
> unsigned int new_channel)
> {
> + struct b43_phy_lp *lpphy = dev->phy.lp;
> int err;
>
> - b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
> -
> if (dev->phy.radio_ver == 0x2063) {
> err = lpphy_b2063_tune(dev, new_channel);
> if (err)
> @@ -2174,6 +2180,9 @@ static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
> lpphy_adjust_gain_table(dev, channel2freq_lp(new_channel));
> }
>
> + lpphy->channel = new_channel;
> + b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
> +
> return 0;
> }
>
> @@ -2185,10 +2194,9 @@ static int b43_lpphy_op_init(struct b43_wldev *dev)
> lpphy_baseband_init(dev);
> lpphy_radio_init(dev);
> lpphy_calibrate_rc(dev);
> - err = b43_lpphy_op_switch_channel(dev,
> - b43_lpphy_op_get_default_chan(dev));
> + err = b43_lpphy_op_switch_channel(dev, 7);
> if (err) {
> - b43dbg(dev->wl, "Switch to init channel failed, error = %d.\n",
> + b43dbg(dev->wl, "Switch to channel 7 failed, error = %d.\n",
> err);
> }
> lpphy_tx_pctl_init(dev);
> @@ -2222,6 +2230,7 @@ const struct b43_phy_operations b43_phyops_lp = {
> .init = b43_lpphy_op_init,
> .phy_read = b43_lpphy_op_read,
> .phy_write = b43_lpphy_op_write,
> + .phy_maskset = b43_lpphy_op_maskset,
> .radio_read = b43_lpphy_op_radio_read,
> .radio_write = b43_lpphy_op_radio_write,
> .software_rfkill = b43_lpphy_op_software_rfkill,
> diff --git a/drivers/net/wireless/b43/phy_lp.h b/drivers/net/wireless/b43/phy_lp.h
> index e158d1f..c3232c1 100644
> --- a/drivers/net/wireless/b43/phy_lp.h
> +++ b/drivers/net/wireless/b43/phy_lp.h
> @@ -888,6 +888,9 @@ struct b43_phy_lp {
> bool crs_usr_disable, crs_sys_disable;
>
> unsigned int pdiv;
> +
> + /* The channel we are tuned to */
> + u8 channel;
> };
>
> enum tssi_mux_mode {
> diff --git a/drivers/net/wireless/b43/tables_lpphy.c b/drivers/net/wireless/b43/tables_lpphy.c
> index 60d472f..c784def 100644
> --- a/drivers/net/wireless/b43/tables_lpphy.c
> +++ b/drivers/net/wireless/b43/tables_lpphy.c
> @@ -624,30 +624,35 @@ u32 b43_lptab_read(struct b43_wldev *dev, u32 offset)
> void b43_lptab_read_bulk(struct b43_wldev *dev, u32 offset,
> unsigned int nr_elements, void *_data)
> {
> - u32 type, value;
> + u32 type;
> u8 *data = _data;
> unsigned int i;
>
> type = offset & B43_LPTAB_TYPEMASK;
> + offset &= ~B43_LPTAB_TYPEMASK;
> + B43_WARN_ON(offset > 0xFFFF);
> +
> + b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
> +
> for (i = 0; i < nr_elements; i++) {
> - value = b43_lptab_read(dev, offset);
> switch (type) {
> case B43_LPTAB_8BIT:
> - *data = value;
> + *data = b43_phy_read(dev, B43_LPPHY_TABLEDATALO) & 0xFF;
> data++;
> break;
> case B43_LPTAB_16BIT:
> - *((u16 *)data) = value;
> + *((u16 *)data) = b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
> data += 2;
> break;
> case B43_LPTAB_32BIT:
> - *((u32 *)data) = value;
> + *((u32 *)data) = b43_phy_read(dev, B43_LPPHY_TABLEDATAHI);
> + *((u32 *)data) <<= 16;
> + *((u32 *)data) |= b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
> data += 4;
> break;
> default:
> B43_WARN_ON(1);
> }
> - offset++;
> }
> }
>
> @@ -688,26 +693,34 @@ void b43_lptab_write_bulk(struct b43_wldev *dev, u32 offset,
> unsigned int i;
>
> type = offset & B43_LPTAB_TYPEMASK;
> + offset &= ~B43_LPTAB_TYPEMASK;
> + B43_WARN_ON(offset > 0xFFFF);
> +
> + b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
> +
> for (i = 0; i < nr_elements; i++) {
> switch (type) {
> case B43_LPTAB_8BIT:
> value = *data;
> data++;
> + B43_WARN_ON(value & ~0xFF);
> + b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
> break;
> case B43_LPTAB_16BIT:
> value = *((u16 *)data);
> data += 2;
> + B43_WARN_ON(value & ~0xFFFF);
> + b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
> break;
> case B43_LPTAB_32BIT:
> value = *((u32 *)data);
> data += 4;
> + b43_phy_write(dev, B43_LPPHY_TABLEDATAHI, value >> 16);
> + b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
> break;
> default:
> B43_WARN_ON(1);
> - value = 0;
> }
> - b43_lptab_write(dev, offset, value);
> - offset++;
> }
> }
>
> @@ -777,7 +790,7 @@ static const u8 lpphy_pll_fraction_table[] = {
> 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
> };
>
> -static const u16 lpphy_iq_local_table[] = {
> +static const u16 lpphy_iqlo_cal_table[] = {
> 0x0200, 0x0300, 0x0400, 0x0600, 0x0800, 0x0b00, 0x1000, 0x1001, 0x1002,
> 0x1003, 0x1004, 0x1005, 0x1006, 0x1007, 0x1707, 0x2007, 0x2d07, 0x4007,
> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
> @@ -789,10 +802,17 @@ static const u16 lpphy_iq_local_table[] = {
> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x4000, 0x0000, 0x0000,
> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
> - 0x0000, 0x0000,
> + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
> };
>
> -static const u16 lpphy_ofdm_cck_gain_table[] = {
> +static const u16 lpphy_rev0_ofdm_cck_gain_table[] = {
> + 0x0001, 0x0001, 0x0001, 0x0001, 0x1001, 0x2001, 0x3001, 0x4001, 0x5001,
> + 0x6001, 0x7001, 0x7011, 0x7021, 0x2035, 0x2045, 0x2055, 0x2065, 0x2075,
> + 0x006d, 0x007d, 0x014d, 0x015d, 0x115d, 0x035d, 0x135d, 0x055d, 0x155d,
> + 0x0d5d, 0x1d5d, 0x2d5d, 0x555d, 0x655d, 0x755d,
> +};
> +
> +static const u16 lpphy_rev1_ofdm_cck_gain_table[] = {
> 0x5000, 0x6000, 0x7000, 0x0001, 0x1001, 0x2001, 0x3001, 0x4001, 0x5001,
> 0x6001, 0x7001, 0x7011, 0x7021, 0x2035, 0x2045, 0x2055, 0x2065, 0x2075,
> 0x006d, 0x007d, 0x014d, 0x015d, 0x115d, 0x035d, 0x135d, 0x055d, 0x155d,
> @@ -2263,11 +2283,18 @@ void lpphy_rev0_1_table_init(struct b43_wldev *dev)
> b43_lptab_write_bulk(dev, B43_LPTAB8(6, 0),
> ARRAY_SIZE(lpphy_pll_fraction_table), lpphy_pll_fraction_table);
> b43_lptab_write_bulk(dev, B43_LPTAB16(0, 0),
> - ARRAY_SIZE(lpphy_iq_local_table), lpphy_iq_local_table);
> - b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
> - ARRAY_SIZE(lpphy_ofdm_cck_gain_table), lpphy_ofdm_cck_gain_table);
> - b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
> - ARRAY_SIZE(lpphy_ofdm_cck_gain_table), lpphy_ofdm_cck_gain_table);
> + ARRAY_SIZE(lpphy_iqlo_cal_table), lpphy_iqlo_cal_table);
> + if (dev->phy.rev == 0) {
> + b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
> + ARRAY_SIZE(lpphy_rev0_ofdm_cck_gain_table), lpphy_rev0_ofdm_cck_gain_table);
> + b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
> + ARRAY_SIZE(lpphy_rev0_ofdm_cck_gain_table), lpphy_rev0_ofdm_cck_gain_table);
> + } else {
> + b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
> + ARRAY_SIZE(lpphy_rev1_ofdm_cck_gain_table), lpphy_rev1_ofdm_cck_gain_table);
> + b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
> + ARRAY_SIZE(lpphy_rev1_ofdm_cck_gain_table), lpphy_rev1_ofdm_cck_gain_table);
> +}
> b43_lptab_write_bulk(dev, B43_LPTAB16(15, 0),
> ARRAY_SIZE(lpphy_gain_delta_table), lpphy_gain_delta_table);
> b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0),
> @@ -2281,22 +2308,6 @@ void lpphy_rev2plus_table_init(struct b43_wldev *dev)
>
> B43_WARN_ON(dev->phy.rev < 2);
>
> - /*
> - * FIXME This code follows the specs, but it looks wrong:
> - * In each pass, it writes 4 bytes to an offset in table ID 7,
> - * then increments the offset by 1 for the next pass. This results
> - * in the first 3 bytes of each pass except the first one getting
> - * written to a location that has already been zeroed in the previous
> - * pass.
> - * This is what the vendor driver does, but it still looks suspicious.
> - *
> - * This should probably suffice:
> - *
> - * for (i = 0; i < 704; i+=4)
> - * b43_lptab_write(dev, B43_LPTAB32(7, i), 0)
> - *
> - * This should be tested once the code is functional.
> - */
> for (i = 0; i < 704; i++)
> b43_lptab_write(dev, B43_LPTAB32(7, i), 0);
>
> @@ -2323,7 +2334,7 @@ void lpphy_rev2plus_table_init(struct b43_wldev *dev)
> b43_lptab_write_bulk(dev, B43_LPTAB8(6, 0),
> ARRAY_SIZE(lpphy_pll_fraction_table), lpphy_pll_fraction_table);
> b43_lptab_write_bulk(dev, B43_LPTAB16(0, 0),
> - ARRAY_SIZE(lpphy_iq_local_table), lpphy_iq_local_table);
> + ARRAY_SIZE(lpphy_iqlo_cal_table), lpphy_iqlo_cal_table);
> b43_lptab_write_bulk(dev, B43_LPTAB32(9, 0),
> ARRAY_SIZE(lpphy_papd_eps_table), lpphy_papd_eps_table);
> b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0),
--
Greetings, Michael.
^ permalink raw reply
* Re: [PATCH] rtl8187: Fix for kernel oops when unloading with LEDs enabled
From: Luis R. Rodriguez @ 2009-08-26 20:43 UTC (permalink / raw)
To: Larry Finger
Cc: John W. Linville, Richard Farina, Herton Ronaldo Krzesinski,
Hin-Tak Leung, linux-wireless
In-Reply-To: <4A955CD0.6040604@lwfinger.net>
On Wed, Aug 26, 2009 at 9:03 AM, Larry Finger<Larry.Finger@lwfinger.net> wrote:
> John W. Linville wrote:
>>
>> The above commit is in linux-2.6 since v2.6.31-rc2. If it isn't in
>> compat-wireless, I have no idea why.
>
> It is - I looked at the code.
Just a heads up -- I pull "stable" code for compat-wireless using
hpa's tree, not Linus:
git://git.kernel.org/pub/scm/linux/kernel/git/hpa/linux-2.6-allstable.git
Its convenient for me as I get to have branches for each kernel
release. Regardless though hpa seems to update this stable tree when
Linus updates his, so its at rc7 now for the master branch. The code
pulled into the stable compat-wireless stuff then is from the latest
stable code 2.6.2x.y or Linus' latest rc as on hpa's master branch.
Luis
^ permalink raw reply
* Re: [PATCH] ssb: Implement PMU LDO control and use it in b43
From: Michael Buesch @ 2009-08-26 20:46 UTC (permalink / raw)
To: Gábor Stefanik
Cc: John Linville, Larry Finger, Mark Huijgen, Broadcom Wireless,
linux-wireless
In-Reply-To: <1251312686-32067-3-git-send-email-netrolller.3d@gmail.com>
On Wednesday 26 August 2009 20:51:26 Gábor Stefanik wrote:
> Implement the "PMU LDO set voltage" and "PMU LDO PA ref enable"
> functions, and use them during LP-PHY baseband init in b43.
>
> Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
ack
--
Greetings, Michael.
^ permalink raw reply
* Re: [PATCH] b43: Remove scary message from LP-PHY's Kconfig
From: Michael Buesch @ 2009-08-26 20:47 UTC (permalink / raw)
To: Gábor Stefanik
Cc: John Linville, Larry Finger, Mark Huijgen, Broadcom Wireless,
linux-wireless
In-Reply-To: <1251316132-392-1-git-send-email-netrolller.3d@gmail.com>
On Wednesday 26 August 2009 21:48:52 Gábor Stefanik wrote:
> From: root Gábor Stefanik <netrolller.3d@gmail.com>
>
> The most common LP-PHY device, BCM4312, is now fully functional.
> So, no need to say "probably won't work for you" anymore.
> It's also not "for debuggers and developers only", as it is
> perfectly usable for end-users now (at least for BCM4312).
Please also add
default y
>
> Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
> ---
> This should only be applied once the "Qdiv roundup" and the "Fix and update"
> patches reach the tree, as those 2 patches are needed to make the BCM4312
> really work.
>
> drivers/net/wireless/b43/Kconfig | 3 ---
> 1 files changed, 0 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig
> index 87d10c8..1c0999b 100644
> --- a/drivers/net/wireless/b43/Kconfig
> +++ b/drivers/net/wireless/b43/Kconfig
> @@ -88,9 +88,6 @@ config B43_PHY_LP
> and embedded devices. It supports 802.11a/g
> (802.11a support is optional, and currently disabled).
>
> - This is heavily experimental, and probably will not work for you.
> - Say N unless you want to help debug the driver.
> -
> # This config option automatically enables b43 LEDS support,
> # if it's possible.
> config B43_LEDS
--
Greetings, Michael.
^ permalink raw reply
* Re: [PATCH] b43: Fix and update LP-PHY code
From: Gábor Stefanik @ 2009-08-26 20:47 UTC (permalink / raw)
To: Michael Buesch
Cc: John Linville, Larry Finger, Mark Huijgen, Broadcom Wireless,
linux-wireless
In-Reply-To: <200908262242.50729.mb@bu3sch.de>
2009/8/26 Michael Buesch <mb@bu3sch.de>:
> On Wednesday 26 August 2009 20:51:25 Gábor Stefanik wrote:
>> -Fix a few nasty typos (b43_phy_* operations instead of b43_radio_*)
>> in the channel tune routines.
>> -Fix some typos & spec errors found by MMIO tracing.
>> -Optimize b43_phy_write & b43_phy_mask/set/maskset to use
>> only the minimal number of MMIO accesses. (Write is possible
>> using a single 32-bit MMIO write, while set/mask/maskset can
>> be done in 3 16-bit MMIOs).
>
> Why does it matter? PHY access is not done in any hotpath. So why
> not prefer simple code over optimized code?
This is how the MIPS/hybrid driver does it, I simply updated the code
for parity.
>
>> -Set the default channel back to 1, as the bug forcing us to use
>> channel 7 is now fixed.
>
> And, everything in its own patch, please. I don't see a reason for
> patching unrelated things in one big patch.
Well, this patch is already in wireless-testing, so doing that would
now involve reverting this patch, applying a version without the
channel change, and applying the channel change - certainly more
confusing than the status quo.
>
>>
>> With this, the device comes up, scans, associates, transmits,
>> receives, monitors and injects on all channels - in other words,
>> it's fully functional. Sensitivity and TX power are still sub-optimal,
>> due to the lack of calibration (that's next on my list).
>>
>> Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
>> ---
>> drivers/net/wireless/b43/phy_common.c | 27 +++++++--
>> drivers/net/wireless/b43/phy_common.h | 3 +
>> drivers/net/wireless/b43/phy_lp.c | 91 +++++++++++++++++--------------
>> drivers/net/wireless/b43/phy_lp.h | 3 +
>> drivers/net/wireless/b43/tables_lpphy.c | 79 +++++++++++++++------------
>> 5 files changed, 122 insertions(+), 81 deletions(-)
>>
>> diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c
>> index 51686ec..6e704be 100644
>> --- a/drivers/net/wireless/b43/phy_common.c
>> +++ b/drivers/net/wireless/b43/phy_common.c
>> @@ -249,20 +249,35 @@ void b43_phy_copy(struct b43_wldev *dev, u16 destreg, u16 srcreg)
>>
>> void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask)
>> {
>> - b43_phy_write(dev, offset,
>> - b43_phy_read(dev, offset) & mask);
>> + if (dev->phy.ops->phy_maskset) {
>> + assert_mac_suspended(dev);
>> + dev->phy.ops->phy_maskset(dev, offset, mask, 0);
>> + } else {
>> + b43_phy_write(dev, offset,
>> + b43_phy_read(dev, offset) & mask);
>> + }
>> }
>>
>> void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set)
>> {
>> - b43_phy_write(dev, offset,
>> - b43_phy_read(dev, offset) | set);
>> + if (dev->phy.ops->phy_maskset) {
>> + assert_mac_suspended(dev);
>> + dev->phy.ops->phy_maskset(dev, offset, 0xFFFF, set);
>> + } else {
>> + b43_phy_write(dev, offset,
>> + b43_phy_read(dev, offset) | set);
>> + }
>> }
>>
>> void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set)
>> {
>> - b43_phy_write(dev, offset,
>> - (b43_phy_read(dev, offset) & mask) | set);
>> + if (dev->phy.ops->phy_maskset) {
>> + assert_mac_suspended(dev);
>> + dev->phy.ops->phy_maskset(dev, offset, mask, set);
>> + } else {
>> + b43_phy_write(dev, offset,
>> + (b43_phy_read(dev, offset) & mask) | set);
>> + }
>> }
>>
>> int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel)
>> diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h
>> index 9f9f23c..b47a0f5 100644
>> --- a/drivers/net/wireless/b43/phy_common.h
>> +++ b/drivers/net/wireless/b43/phy_common.h
>> @@ -95,6 +95,8 @@ enum b43_txpwr_result {
>> * Must not be NULL.
>> * @phy_write: Write to a PHY register.
>> * Must not be NULL.
>> + * @phy_maskset: Maskset a PHY register, taking shortcuts.
>> + * If it is NULL, a generic algorithm is used.
>> * @radio_read: Read from a Radio register.
>> * Must not be NULL.
>> * @radio_write: Write to a Radio register.
>> @@ -154,6 +156,7 @@ struct b43_phy_operations {
>> /* Register access */
>> u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
>> void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
>> + void (*phy_maskset)(struct b43_wldev *dev, u16 reg, u16 mask, u16 set);
>> u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
>> void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
>>
>> diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
>> index 5306f2c..1a57d33 100644
>> --- a/drivers/net/wireless/b43/phy_lp.c
>> +++ b/drivers/net/wireless/b43/phy_lp.c
>> @@ -44,7 +44,7 @@ static inline u16 channel2freq_lp(u8 channel)
>> static unsigned int b43_lpphy_op_get_default_chan(struct b43_wldev *dev)
>> {
>> if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
>> - return 7; //FIXME temporary - channel 1 is broken
>> + return 1;
>> return 36;
>> }
>>
>> @@ -182,8 +182,8 @@ static void lpphy_adjust_gain_table(struct b43_wldev *dev, u32 freq)
>> temp[1] = temp[0] + 0x1000;
>> temp[2] = temp[0] + 0x2000;
>>
>> - b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp);
>> b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0), 3, temp);
>> + b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp);
>> }
>>
>> static void lpphy_table_init(struct b43_wldev *dev)
>> @@ -223,8 +223,8 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
>> b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0x0006);
>> b43_phy_mask(dev, B43_LPPHY_RX_RADIO_CTL, 0xFFFE);
>> b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x0005);
>> - b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC10, 0x0180);
>> - b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3800);
>> + b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0x0180);
>> + b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3C00);
>> b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFFF0, 0x0005);
>> b43_phy_maskset(dev, B43_LPPHY_GAIN_MISMATCH_LIMIT, 0xFFC0, 0x001A);
>> b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0x00B3);
>> @@ -237,7 +237,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
>> /* TODO:
>> * Set the LDO voltage to 0x0028 - FIXME: What is this?
>> * Call sb_pmu_set_ldo_voltage with 4 and the LDO voltage
>> - * as arguments
>> + * as arguments
>> * Call sb_pmu_paref_ldo_enable with argument TRUE
>> */
>> if (dev->phy.rev == 0) {
>> @@ -340,11 +340,11 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
>> if (dev->phy.rev == 1) {
>> tmp = b43_phy_read(dev, B43_LPPHY_CLIPCTRTHRESH);
>> tmp2 = (tmp & 0x03E0) >> 5;
>> - tmp2 |= tmp << 5;
>> + tmp2 |= tmp2 << 5;
>> b43_phy_write(dev, B43_LPPHY_4C3, tmp2);
>> - tmp = b43_phy_read(dev, B43_LPPHY_OFDMSYNCTHRESH0);
>> + tmp = b43_phy_read(dev, B43_LPPHY_GAINDIRECTMISMATCH);
>> tmp2 = (tmp & 0x1F00) >> 8;
>> - tmp2 |= tmp << 5;
>> + tmp2 |= tmp2 << 5;
>> b43_phy_write(dev, B43_LPPHY_4C4, tmp2);
>> tmp = b43_phy_read(dev, B43_LPPHY_VERYLOWGAINDB);
>> tmp2 = tmp & 0x00FF;
>> @@ -761,7 +761,7 @@ static void lpphy_disable_crs(struct b43_wldev *dev, bool user)
>> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
>> b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB);
>> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4);
>> - b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFF7);
>> + b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7);
>> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
>> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x10);
>> b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
>> @@ -956,7 +956,7 @@ static void lpphy_run_ddfs(struct b43_wldev *dev, int i_on, int q_on,
>> b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFF9F, scale_idx << 5);
>> b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0xFFFB);
>> b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x2);
>> - b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x20);
>> + b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x20);
>> }
>>
>> static bool lpphy_rx_iq_est(struct b43_wldev *dev, u16 samples, u8 time,
>> @@ -968,7 +968,7 @@ static bool lpphy_rx_iq_est(struct b43_wldev *dev, u16 samples, u8 time,
>> b43_phy_write(dev, B43_LPPHY_IQ_NUM_SMPLS_ADDR, samples);
>> b43_phy_maskset(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFF00, time);
>> b43_phy_mask(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFEFF);
>> - b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFDFF);
>> + b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);
>>
>> for (i = 0; i < 500; i++) {
>> if (!(b43_phy_read(dev,
>> @@ -1135,9 +1135,9 @@ static void lpphy_set_tx_power_control(struct b43_wldev *dev,
>> }
>> if (dev->phy.rev >= 2) {
>> if (mode == B43_LPPHY_TXPCTL_HW)
>> - b43_phy_maskset(dev, B43_PHY_OFDM(0xD0), 0xFD, 0x2);
>> + b43_phy_set(dev, B43_PHY_OFDM(0xD0), 0x2);
>> else
>> - b43_phy_maskset(dev, B43_PHY_OFDM(0xD0), 0xFD, 0);
>> + b43_phy_mask(dev, B43_PHY_OFDM(0xD0), 0xFFFD);
>> }
>> lpphy_write_tx_pctl_mode_to_hardware(dev);
>> }
>> @@ -1169,7 +1169,7 @@ static void lpphy_rev0_1_rc_calib(struct b43_wldev *dev)
>> err = b43_lpphy_op_switch_channel(dev, 7);
>> if (err) {
>> b43dbg(dev->wl,
>> - "RC calib: Failed to switch to channel 7, error = %d",
>> + "RC calib: Failed to switch to channel 7, error = %d\n",
>> err);
>> }
>> old_txg_ovr = !!(b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40);
>> @@ -1500,8 +1500,15 @@ static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
>>
>> static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
>> {
>> + b43_write32(dev, B43_MMIO_PHY_CONTROL, ((u32)value << 16) | reg);
>> +}
>> +
>> +static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
>> + u16 set)
>> +{
>> b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
>> - b43_write16(dev, B43_MMIO_PHY_DATA, value);
>> + b43_write16(dev, B43_MMIO_PHY_DATA,
>> + (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
>> }
>>
>> static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg)
>> @@ -1920,8 +1927,8 @@ static void lpphy_b2062_reset_pll_bias(struct b43_wldev *dev)
>>
>> static void lpphy_b2062_vco_calib(struct b43_wldev *dev)
>> {
>> - b43_phy_write(dev, B2062_S_RFPLL_CTL21, 0x42);
>> - b43_phy_write(dev, B2062_S_RFPLL_CTL21, 0x62);
>> + b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x42);
>> + b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x62);
>> udelay(200);
>> }
>>
>> @@ -1980,7 +1987,7 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
>> tmp6 = tmp5 / tmp4;
>> tmp7 = tmp5 % tmp4;
>> b43_radio_write(dev, B2062_S_RFPLL_CTL29, tmp6 + ((2 * tmp7) / tmp4));
>> - tmp8 = b43_phy_read(dev, B2062_S_RFPLL_CTL19);
>> + tmp8 = b43_radio_read(dev, B2062_S_RFPLL_CTL19);
>> tmp9 = ((2 * tmp3 * (tmp8 + 1)) + (3 * tmp1)) / (6 * tmp1);
>> b43_radio_write(dev, B2062_S_RFPLL_CTL23, (tmp9 >> 8) + 16);
>> b43_radio_write(dev, B2062_S_RFPLL_CTL24, tmp9 & 0xFF);
>> @@ -2019,17 +2026,17 @@ static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
>> {
>> u16 tmp;
>>
>> - b43_phy_mask(dev, B2063_PLL_SP1, ~0x40);
>> - tmp = b43_phy_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8;
>> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp);
>> + b43_radio_mask(dev, B2063_PLL_SP1, ~0x40);
>> + tmp = b43_radio_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8;
>> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp);
>> udelay(1);
>> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x4);
>> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x4);
>> udelay(1);
>> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x6);
>> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x6);
>> udelay(1);
>> - b43_phy_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x7);
>> + b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp | 0x7);
>> udelay(300);
>> - b43_phy_set(dev, B2063_PLL_SP1, 0x40);
>> + b43_radio_set(dev, B2063_PLL_SP1, 0x40);
>> }
>>
>> static int lpphy_b2063_tune(struct b43_wldev *dev,
>> @@ -2124,31 +2131,31 @@ static int lpphy_b2063_tune(struct b43_wldev *dev,
>> scale = 0;
>> tmp5 = ((tmp4 + (tmp3 >> 1)) / tmp3) - 8;
>> }
>> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5);
>> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6);
>> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5);
>> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6);
>>
>> tmp6 = lpphy_qdiv_roundup(100 * val1, val3, 16);
>> tmp6 *= (tmp5 * 8) * (scale + 1);
>> if (tmp6 > 150)
>> tmp6 = 0;
>>
>> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6);
>> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5);
>> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6);
>> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5);
>>
>> - b43_phy_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4);
>> + b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4);
>> if (crystal_freq > 26000000)
>> - b43_phy_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2);
>> + b43_radio_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2);
>> else
>> - b43_phy_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD);
>> + b43_radio_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD);
>>
>> if (val1 == 45)
>> - b43_phy_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2);
>> + b43_radio_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2);
>> else
>> - b43_phy_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD);
>> + b43_radio_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD);
>>
>> - b43_phy_set(dev, B2063_PLL_SP2, 0x3);
>> + b43_radio_set(dev, B2063_PLL_SP2, 0x3);
>> udelay(1);
>> - b43_phy_mask(dev, B2063_PLL_SP2, 0xFFFC);
>> + b43_radio_mask(dev, B2063_PLL_SP2, 0xFFFC);
>> lpphy_b2063_vco_calib(dev);
>> b43_radio_write(dev, B2063_COMM15, old_comm15);
>>
>> @@ -2158,10 +2165,9 @@ static int lpphy_b2063_tune(struct b43_wldev *dev,
>> static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
>> unsigned int new_channel)
>> {
>> + struct b43_phy_lp *lpphy = dev->phy.lp;
>> int err;
>>
>> - b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
>> -
>> if (dev->phy.radio_ver == 0x2063) {
>> err = lpphy_b2063_tune(dev, new_channel);
>> if (err)
>> @@ -2174,6 +2180,9 @@ static int b43_lpphy_op_switch_channel(struct b43_wldev *dev,
>> lpphy_adjust_gain_table(dev, channel2freq_lp(new_channel));
>> }
>>
>> + lpphy->channel = new_channel;
>> + b43_write16(dev, B43_MMIO_CHANNEL, new_channel);
>> +
>> return 0;
>> }
>>
>> @@ -2185,10 +2194,9 @@ static int b43_lpphy_op_init(struct b43_wldev *dev)
>> lpphy_baseband_init(dev);
>> lpphy_radio_init(dev);
>> lpphy_calibrate_rc(dev);
>> - err = b43_lpphy_op_switch_channel(dev,
>> - b43_lpphy_op_get_default_chan(dev));
>> + err = b43_lpphy_op_switch_channel(dev, 7);
>> if (err) {
>> - b43dbg(dev->wl, "Switch to init channel failed, error = %d.\n",
>> + b43dbg(dev->wl, "Switch to channel 7 failed, error = %d.\n",
>> err);
>> }
>> lpphy_tx_pctl_init(dev);
>> @@ -2222,6 +2230,7 @@ const struct b43_phy_operations b43_phyops_lp = {
>> .init = b43_lpphy_op_init,
>> .phy_read = b43_lpphy_op_read,
>> .phy_write = b43_lpphy_op_write,
>> + .phy_maskset = b43_lpphy_op_maskset,
>> .radio_read = b43_lpphy_op_radio_read,
>> .radio_write = b43_lpphy_op_radio_write,
>> .software_rfkill = b43_lpphy_op_software_rfkill,
>> diff --git a/drivers/net/wireless/b43/phy_lp.h b/drivers/net/wireless/b43/phy_lp.h
>> index e158d1f..c3232c1 100644
>> --- a/drivers/net/wireless/b43/phy_lp.h
>> +++ b/drivers/net/wireless/b43/phy_lp.h
>> @@ -888,6 +888,9 @@ struct b43_phy_lp {
>> bool crs_usr_disable, crs_sys_disable;
>>
>> unsigned int pdiv;
>> +
>> + /* The channel we are tuned to */
>> + u8 channel;
>> };
>>
>> enum tssi_mux_mode {
>> diff --git a/drivers/net/wireless/b43/tables_lpphy.c b/drivers/net/wireless/b43/tables_lpphy.c
>> index 60d472f..c784def 100644
>> --- a/drivers/net/wireless/b43/tables_lpphy.c
>> +++ b/drivers/net/wireless/b43/tables_lpphy.c
>> @@ -624,30 +624,35 @@ u32 b43_lptab_read(struct b43_wldev *dev, u32 offset)
>> void b43_lptab_read_bulk(struct b43_wldev *dev, u32 offset,
>> unsigned int nr_elements, void *_data)
>> {
>> - u32 type, value;
>> + u32 type;
>> u8 *data = _data;
>> unsigned int i;
>>
>> type = offset & B43_LPTAB_TYPEMASK;
>> + offset &= ~B43_LPTAB_TYPEMASK;
>> + B43_WARN_ON(offset > 0xFFFF);
>> +
>> + b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
>> +
>> for (i = 0; i < nr_elements; i++) {
>> - value = b43_lptab_read(dev, offset);
>> switch (type) {
>> case B43_LPTAB_8BIT:
>> - *data = value;
>> + *data = b43_phy_read(dev, B43_LPPHY_TABLEDATALO) & 0xFF;
>> data++;
>> break;
>> case B43_LPTAB_16BIT:
>> - *((u16 *)data) = value;
>> + *((u16 *)data) = b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
>> data += 2;
>> break;
>> case B43_LPTAB_32BIT:
>> - *((u32 *)data) = value;
>> + *((u32 *)data) = b43_phy_read(dev, B43_LPPHY_TABLEDATAHI);
>> + *((u32 *)data) <<= 16;
>> + *((u32 *)data) |= b43_phy_read(dev, B43_LPPHY_TABLEDATALO);
>> data += 4;
>> break;
>> default:
>> B43_WARN_ON(1);
>> }
>> - offset++;
>> }
>> }
>>
>> @@ -688,26 +693,34 @@ void b43_lptab_write_bulk(struct b43_wldev *dev, u32 offset,
>> unsigned int i;
>>
>> type = offset & B43_LPTAB_TYPEMASK;
>> + offset &= ~B43_LPTAB_TYPEMASK;
>> + B43_WARN_ON(offset > 0xFFFF);
>> +
>> + b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset);
>> +
>> for (i = 0; i < nr_elements; i++) {
>> switch (type) {
>> case B43_LPTAB_8BIT:
>> value = *data;
>> data++;
>> + B43_WARN_ON(value & ~0xFF);
>> + b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
>> break;
>> case B43_LPTAB_16BIT:
>> value = *((u16 *)data);
>> data += 2;
>> + B43_WARN_ON(value & ~0xFFFF);
>> + b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
>> break;
>> case B43_LPTAB_32BIT:
>> value = *((u32 *)data);
>> data += 4;
>> + b43_phy_write(dev, B43_LPPHY_TABLEDATAHI, value >> 16);
>> + b43_phy_write(dev, B43_LPPHY_TABLEDATALO, value);
>> break;
>> default:
>> B43_WARN_ON(1);
>> - value = 0;
>> }
>> - b43_lptab_write(dev, offset, value);
>> - offset++;
>> }
>> }
>>
>> @@ -777,7 +790,7 @@ static const u8 lpphy_pll_fraction_table[] = {
>> 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
>> };
>>
>> -static const u16 lpphy_iq_local_table[] = {
>> +static const u16 lpphy_iqlo_cal_table[] = {
>> 0x0200, 0x0300, 0x0400, 0x0600, 0x0800, 0x0b00, 0x1000, 0x1001, 0x1002,
>> 0x1003, 0x1004, 0x1005, 0x1006, 0x1007, 0x1707, 0x2007, 0x2d07, 0x4007,
>> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
>> @@ -789,10 +802,17 @@ static const u16 lpphy_iq_local_table[] = {
>> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
>> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x4000, 0x0000, 0x0000,
>> 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
>> - 0x0000, 0x0000,
>> + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
>> };
>>
>> -static const u16 lpphy_ofdm_cck_gain_table[] = {
>> +static const u16 lpphy_rev0_ofdm_cck_gain_table[] = {
>> + 0x0001, 0x0001, 0x0001, 0x0001, 0x1001, 0x2001, 0x3001, 0x4001, 0x5001,
>> + 0x6001, 0x7001, 0x7011, 0x7021, 0x2035, 0x2045, 0x2055, 0x2065, 0x2075,
>> + 0x006d, 0x007d, 0x014d, 0x015d, 0x115d, 0x035d, 0x135d, 0x055d, 0x155d,
>> + 0x0d5d, 0x1d5d, 0x2d5d, 0x555d, 0x655d, 0x755d,
>> +};
>> +
>> +static const u16 lpphy_rev1_ofdm_cck_gain_table[] = {
>> 0x5000, 0x6000, 0x7000, 0x0001, 0x1001, 0x2001, 0x3001, 0x4001, 0x5001,
>> 0x6001, 0x7001, 0x7011, 0x7021, 0x2035, 0x2045, 0x2055, 0x2065, 0x2075,
>> 0x006d, 0x007d, 0x014d, 0x015d, 0x115d, 0x035d, 0x135d, 0x055d, 0x155d,
>> @@ -2263,11 +2283,18 @@ void lpphy_rev0_1_table_init(struct b43_wldev *dev)
>> b43_lptab_write_bulk(dev, B43_LPTAB8(6, 0),
>> ARRAY_SIZE(lpphy_pll_fraction_table), lpphy_pll_fraction_table);
>> b43_lptab_write_bulk(dev, B43_LPTAB16(0, 0),
>> - ARRAY_SIZE(lpphy_iq_local_table), lpphy_iq_local_table);
>> - b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
>> - ARRAY_SIZE(lpphy_ofdm_cck_gain_table), lpphy_ofdm_cck_gain_table);
>> - b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
>> - ARRAY_SIZE(lpphy_ofdm_cck_gain_table), lpphy_ofdm_cck_gain_table);
>> + ARRAY_SIZE(lpphy_iqlo_cal_table), lpphy_iqlo_cal_table);
>> + if (dev->phy.rev == 0) {
>> + b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
>> + ARRAY_SIZE(lpphy_rev0_ofdm_cck_gain_table), lpphy_rev0_ofdm_cck_gain_table);
>> + b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
>> + ARRAY_SIZE(lpphy_rev0_ofdm_cck_gain_table), lpphy_rev0_ofdm_cck_gain_table);
>> + } else {
>> + b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0),
>> + ARRAY_SIZE(lpphy_rev1_ofdm_cck_gain_table), lpphy_rev1_ofdm_cck_gain_table);
>> + b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0),
>> + ARRAY_SIZE(lpphy_rev1_ofdm_cck_gain_table), lpphy_rev1_ofdm_cck_gain_table);
>> +}
>> b43_lptab_write_bulk(dev, B43_LPTAB16(15, 0),
>> ARRAY_SIZE(lpphy_gain_delta_table), lpphy_gain_delta_table);
>> b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0),
>> @@ -2281,22 +2308,6 @@ void lpphy_rev2plus_table_init(struct b43_wldev *dev)
>>
>> B43_WARN_ON(dev->phy.rev < 2);
>>
>> - /*
>> - * FIXME This code follows the specs, but it looks wrong:
>> - * In each pass, it writes 4 bytes to an offset in table ID 7,
>> - * then increments the offset by 1 for the next pass. This results
>> - * in the first 3 bytes of each pass except the first one getting
>> - * written to a location that has already been zeroed in the previous
>> - * pass.
>> - * This is what the vendor driver does, but it still looks suspicious.
>> - *
>> - * This should probably suffice:
>> - *
>> - * for (i = 0; i < 704; i+=4)
>> - * b43_lptab_write(dev, B43_LPTAB32(7, i), 0)
>> - *
>> - * This should be tested once the code is functional.
>> - */
>> for (i = 0; i < 704; i++)
>> b43_lptab_write(dev, B43_LPTAB32(7, i), 0);
>>
>> @@ -2323,7 +2334,7 @@ void lpphy_rev2plus_table_init(struct b43_wldev *dev)
>> b43_lptab_write_bulk(dev, B43_LPTAB8(6, 0),
>> ARRAY_SIZE(lpphy_pll_fraction_table), lpphy_pll_fraction_table);
>> b43_lptab_write_bulk(dev, B43_LPTAB16(0, 0),
>> - ARRAY_SIZE(lpphy_iq_local_table), lpphy_iq_local_table);
>> + ARRAY_SIZE(lpphy_iqlo_cal_table), lpphy_iqlo_cal_table);
>> b43_lptab_write_bulk(dev, B43_LPTAB32(9, 0),
>> ARRAY_SIZE(lpphy_papd_eps_table), lpphy_papd_eps_table);
>> b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0),
>
>
>
> --
> Greetings, Michael.
>
--
Vista: [V]iruses, [I]ntruders, [S]pyware, [T]rojans and [A]dware. :-)
^ permalink raw reply
* Re: [PATCH] b43: Fix and update LP-PHY code
From: Michael Buesch @ 2009-08-26 20:49 UTC (permalink / raw)
To: Gábor Stefanik
Cc: John Linville, Larry Finger, Mark Huijgen, Broadcom Wireless,
linux-wireless
In-Reply-To: <69e28c910908261347u375f2f5cu74672b9f4b073738@mail.gmail.com>
On Wednesday 26 August 2009 22:47:12 Gábor Stefanik wrote:
> 2009/8/26 Michael Buesch <mb@bu3sch.de>:
> > On Wednesday 26 August 2009 20:51:25 Gábor Stefanik wrote:
> >> -Fix a few nasty typos (b43_phy_* operations instead of b43_radio_*)
> >> in the channel tune routines.
> >> -Fix some typos & spec errors found by MMIO tracing.
> >> -Optimize b43_phy_write & b43_phy_mask/set/maskset to use
> >> only the minimal number of MMIO accesses. (Write is possible
> >> using a single 32-bit MMIO write, while set/mask/maskset can
> >> be done in 3 16-bit MMIOs).
> >
> > Why does it matter? PHY access is not done in any hotpath. So why
> > not prefer simple code over optimized code?
>
> This is how the MIPS/hybrid driver does it, I simply updated the code
> for parity.
I think _if_ we do it (I'm not sure if it's worth it), we should certainly
do it in a completely separate patch.
>
> >
> >> -Set the default channel back to 1, as the bug forcing us to use
> >> channel 7 is now fixed.
> >
> > And, everything in its own patch, please. I don't see a reason for
> > patching unrelated things in one big patch.
>
> Well, this patch is already in wireless-testing, so doing that would
When did I ack it?
Note that I _do_ have a life and I was not able to check mail for the past 9 hours.
So please give me an ack latency of one day, at least.
--
Greetings, Michael.
^ permalink raw reply
* Re: [PATCH] b43: Fix and update LP-PHY code
From: John W. Linville @ 2009-08-26 20:54 UTC (permalink / raw)
To: Gábor Stefanik
Cc: Michael Buesch, Larry Finger, Mark Huijgen, Broadcom Wireless,
linux-wireless
In-Reply-To: <69e28c910908261347u375f2f5cu74672b9f4b073738@mail.gmail.com>
On Wed, Aug 26, 2009 at 10:47:12PM +0200, Gábor Stefanik wrote:
> 2009/8/26 Michael Buesch <mb@bu3sch.de>:
> > And, everything in its own patch, please. I don't see a reason for
> > patching unrelated things in one big patch.
>
> Well, this patch is already in wireless-testing, so doing that would
> now involve reverting this patch, applying a version without the
> channel change, and applying the channel change - certainly more
> confusing than the status quo.
But it is not in net-next-2.6. Please submit the patches as Michael
requested and I'll take care of the reorganization.
John
--
John W. Linville Someday the world will need a hero, and you
linville@tuxdriver.com might be all we have. Be ready.
^ permalink raw reply
* Re: [PATCH] b43: Fix and update LP-PHY code
From: Michael Buesch @ 2009-08-26 21:03 UTC (permalink / raw)
To: John W. Linville
Cc: Gábor Stefanik, Larry Finger, Mark Huijgen,
Broadcom Wireless, linux-wireless
In-Reply-To: <20090826205403.GA30119@tuxdriver.com>
On Wednesday 26 August 2009 22:54:03 John W. Linville wrote:
> On Wed, Aug 26, 2009 at 10:47:12PM +0200, Gábor Stefanik wrote:
> > 2009/8/26 Michael Buesch <mb@bu3sch.de>:
> > > And, everything in its own patch, please. I don't see a reason for
> > > patching unrelated things in one big patch.
> >
> > Well, this patch is already in wireless-testing, so doing that would
> > now involve reverting this patch, applying a version without the
> > channel change, and applying the channel change - certainly more
> > confusing than the status quo.
>
> But it is not in net-next-2.6. Please submit the patches as Michael
> requested and I'll take care of the reorganization.
You can leave it as-is. But for the future please make sure to submit
independent things in independent patches so they can be discussed
and merged independently.
--
Greetings, Michael.
^ permalink raw reply
* RE: [PATCH] rfkill: relicense header file
From: Winkler, Tomas @ 2009-08-26 21:36 UTC (permalink / raw)
To: Johannes Berg, John Linville
Cc: linux-wireless, Alan Jenkins, Henrique de Moraes Holschuh,
Perez-Gonzalez, Inaky, Ivo van Doorn, Jaswinder Singh Rajput,
Michael Buesch
In-Reply-To: <1251303197.15619.29.camel@johannes.local>
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ZGVsZXRlIGFsbCBjb3BpZXMuCg==
^ permalink raw reply
* [PATCH] b43: LP-PHY: Revert to the original PHY register write routine
From: Gábor Stefanik @ 2009-08-26 21:38 UTC (permalink / raw)
To: John Linville, Michael Buesch, Larry Finger, Mark Huijgen
Cc: Broadcom Wireless, linux-wireless
From: root <root@NR3DMain.NR3D>
After some discussion on IRC about the PHY register write change,
I am not sure anymore if this is the right thing to do.
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
---
drivers/net/wireless/b43/phy_lp.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index 80f245c..a57c40d 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -1496,7 +1496,8 @@ static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
- b43_write32(dev, B43_MMIO_PHY_CONTROL, ((u32)value << 16) | reg);
+ b43_write32(dev, B43_MMIO_PHY_CONTROL, reg);
+ b43_write32(dev, B43_MMIO_PHY_DATA, value);
}
static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
--
1.5.6
^ permalink raw reply related
* Re: [PATCH] rtl8187: Fix for kernel oops when unloading with LEDs enabled
From: Richard Farina @ 2009-08-26 21:34 UTC (permalink / raw)
To: Larry Finger
Cc: John W Linville, Herton Ronaldo Krzesinski, Hin-Tak Leung,
linux-wireless
In-Reply-To: <4A94C3E9.6070409@lwfinger.net>
Larry Finger wrote:
> Richard Farina wrote:
>
>> Larry Finger wrote:
>>
>>> When rtl8187 is unloaded and CONFIG_RTL8187_LEDS is set, the kernel
>>> may oops when the module is unloaded as the workqueue for led_on was
>>> not being cancelled.
>>>
>>> This patch fixes the problem reported in
>>> http://marc.info/?l=linux-wireless&m=124742957615781&w=2.
>>>
>>> Reported-by: Gábor Stefanik <netrolller.3d@gmail.com>
>>> Signed-off-by: Larry Finger <Larry.Finger@lwfinger>
>>> ---
>>>
>>> V2 - Do not create a new workqueue.
>>>
>>> John,
>>>
>>> This patch is 2.6.31 material. To the best of my knowledge, a formal bug
>>> report was never filed; however, it was reported in the reference
>>> given above.
>>>
>>>
>>>
>> Anyone know what happened here? This bug still seems very much alive in
>> compat-wireless-2.6.31-rc7. I know the window is closed and this really
>> isn't "earthshattering" but a kernel panick is kind of "a big deal". I
>> seems like it was tested doing a proper modprobe -r but not if you just
>> unplug the usb card.
>>
>
> This kind of accusation is not the best way to get your problem solved.
>
>
I apologize if you thought there was an accusation here, that certainly
was not my intention. With all due respect assuming that I'm
a jerk is neither safe nor polite. In your original patch for this I
find the following text:
"Gábor,
I hope this version of the patch fixes your problem. On my system
I ran more than 20 rmmod/insmod cycles without a problem.
Larry"
My assumption in your testing manner was based only on what you said and the kernel panick I still experience
>> When I unplug the usb I get instadeath, very uncool. If someone can
>> teach me how to get the kernel output from a non-functional system I am
>> happy to provide whatever.
>>
>
> This patch has been in wireless testing since August 3. I have no idea
> why it wouldn't be in compat-wireless since then. In addition, I have
> unplugged/plugged my RTL8187B device many times with no problem.
>
> I just downloaded compat-wireless-2009-08-26 - it has the patch
> included. You certainly could have checked your source to determine that.
>
>
Yes, I realize that, which is why I said the "bug is still alive" not
"the patch is not applied". I even went out of my way to describe how
the testing was different...
> To get something from a system that is crashing, you should switch to
> the logging console by pressing CTRL/ALT/F10 before you do whatever it
> takes to crash it. You will not get a full dump, but hopefully, there
> will be enough of the stack visible when the panic occurs. Either copy
> down the stack list, or take a picture of the screen and post a link
> to it. FYI, you can get back to the graphical screen with CTRL/ALT/F7.
>
> If you have a wired connection in addition to the wireless one, and
> you have a second Linux host, you can also capture the dump using
> netconsole. Using this facility is not easy, so we'll go the other
> route first.
>
> When you report what info you have, please tell what architecture you
> are running (i386, x86_64, ppc,...) and whether your device is an
> RTL8187L or RTL8187B. It may not matter, but who knows.
>
>
I will attempt to reproduce and take a picture with both x86 and x86_64,
and I'll look into netconsole because that sounds very useful.
Thanks for the assistance,
Rick Farina
> Larry
>
>
>
^ permalink raw reply
* Re: [PATCH] b43: LP-PHY: Revert to the original PHY register write routine
From: Gábor Stefanik @ 2009-08-26 21:42 UTC (permalink / raw)
To: John Linville, Michael Buesch, Larry Finger, Mark Huijgen
Cc: Broadcom Wireless, linux-wireless
In-Reply-To: <1251322728-7034-1-git-send-email-netrolller.3d@gmail.com>
2009/8/26 Gábor Stefanik <netrolller.3d@gmail.com>:
> From: root <root@NR3DMain.NR3D>
The joys of an accidental "sudo git format-patch"... :-)
>
> After some discussion on IRC about the PHY register write change,
> I am not sure anymore if this is the right thing to do.
>
> Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
> ---
> drivers/net/wireless/b43/phy_lp.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
> index 80f245c..a57c40d 100644
> --- a/drivers/net/wireless/b43/phy_lp.c
> +++ b/drivers/net/wireless/b43/phy_lp.c
> @@ -1496,7 +1496,8 @@ static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
>
> static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
> {
> - b43_write32(dev, B43_MMIO_PHY_CONTROL, ((u32)value << 16) | reg);
> + b43_write32(dev, B43_MMIO_PHY_CONTROL, reg);
> + b43_write32(dev, B43_MMIO_PHY_DATA, value);
> }
>
> static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
> --
> 1.5.6
>
>
--
Vista: [V]iruses, [I]ntruders, [S]pyware, [T]rojans and [A]dware. :-)
^ permalink raw reply
* Re: [PATCH] b43: LP-PHY: Revert to the original PHY register write routine
From: Michael Buesch @ 2009-08-26 21:44 UTC (permalink / raw)
To: Gábor Stefanik
Cc: John Linville, Larry Finger, Mark Huijgen, Broadcom Wireless,
linux-wireless
In-Reply-To: <1251322728-7034-1-git-send-email-netrolller.3d@gmail.com>
On Wednesday 26 August 2009 23:38:48 Gábor Stefanik wrote:
> From: root <root@NR3DMain.NR3D>
>
> After some discussion on IRC about the PHY register write change,
> I am not sure anymore if this is the right thing to do.
>
> Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
> ---
> drivers/net/wireless/b43/phy_lp.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
> index 80f245c..a57c40d 100644
> --- a/drivers/net/wireless/b43/phy_lp.c
> +++ b/drivers/net/wireless/b43/phy_lp.c
> @@ -1496,7 +1496,8 @@ static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
>
> static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
> {
> - b43_write32(dev, B43_MMIO_PHY_CONTROL, ((u32)value << 16) | reg);
> + b43_write32(dev, B43_MMIO_PHY_CONTROL, reg);
> + b43_write32(dev, B43_MMIO_PHY_DATA, value);
You just introduced a bug (need 16bit write).
As I said. I'm OK with it, if it works. Just submit it as separate patch in the future.
> }
>
> static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
--
Greetings, Michael.
^ permalink raw reply
* [PATCH v2] b43: LP-PHY: Revert to the original PHY register write routine
From: Gábor Stefanik @ 2009-08-26 21:45 UTC (permalink / raw)
To: John Linville, Michael Buesch, Larry Finger, Mark Huijgen
Cc: Broadcom Wireless, linux-wireless
After some discussion on IRC about the PHY register write change,
I am not sure anymore if this is the right thing to do.
Signed-off-by: Gábor Stefanik <netrolller.3d@gmail.com>
---
v2: No more "From: root".
drivers/net/wireless/b43/phy_lp.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index 80f245c..a57c40d 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -1496,7 +1496,8 @@ static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
static void b43_lpphy_op_write(struct b43_wldev *dev, u16 reg, u16 value)
{
- b43_write32(dev, B43_MMIO_PHY_CONTROL, ((u32)value << 16) | reg);
+ b43_write32(dev, B43_MMIO_PHY_CONTROL, reg);
+ b43_write32(dev, B43_MMIO_PHY_DATA, value);
}
static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
--
1.5.6
^ permalink raw reply related
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