* [PATCH 5/5] wifi: mt76: mt7996: fix queue pause after scan due to wrong channel switch reason
From: Shayne Chen @ 2026-02-02 7:53 UTC (permalink / raw)
To: Felix Fietkau
Cc: linux-wireless, Lorenzo Bianconi, Ryder Lee, Evelyn Tsai,
Money Wang, linux-mediatek, StanleyYP Wang, Shayne Chen
In-Reply-To: <20260202075311.365673-1-shayne.chen@mediatek.com>
From: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
Previously, we use the IEEE80211_CONF_IDLE flag to avoid setting the
parking channel with the CH_SWITCH_NORMAL reason, which could trigger TX
emission before bootup CAC.
However, we found that this flag can be set after triggering scanning on a
connected station interface, and the reason CH_SWITCH_SCAN_BYPASS_DPD will
be used when switching back to the operating channel, which makes the
firmware failed to resume paused AC queues.
Seems that we should avoid relying on this flag after switching to single
multi-radio architecture. Instead, replace it with MT76_STATE_RUNNING.
Signed-off-by: StanleyYP Wang <StanleyYP.Wang@mediatek.com>
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
---
drivers/net/wireless/mediatek/mt76/mt7996/mcu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c b/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c
index 68d698033e43..1d5ea28e7b9b 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7996/mcu.c
@@ -3925,7 +3925,7 @@ int mt7996_mcu_set_chan_info(struct mt7996_phy *phy, u16 tag)
if (phy->mt76->hw->conf.flags & IEEE80211_CONF_MONITOR)
req.switch_reason = CH_SWITCH_NORMAL;
else if (phy->mt76->offchannel ||
- phy->mt76->hw->conf.flags & IEEE80211_CONF_IDLE)
+ !test_bit(MT76_STATE_RUNNING, &phy->mt76->state))
req.switch_reason = CH_SWITCH_SCAN_BYPASS_DPD;
else if (!cfg80211_reg_can_beacon(phy->mt76->hw->wiphy, chandef,
NL80211_IFTYPE_AP))
--
2.51.0
^ permalink raw reply related
* [PATCH 1/5] wifi: mt76: fix potential deadlock caused by rx_lock
From: Shayne Chen @ 2026-02-02 7:53 UTC (permalink / raw)
To: Felix Fietkau
Cc: linux-wireless, Lorenzo Bianconi, Ryder Lee, Evelyn Tsai,
Money Wang, linux-mediatek, Shayne Chen
A deadlock will occur if both of the following conditions are met,
because they each attempt to acquire the rx_lock:
- mac80211 receives an unexpected BAR control frame, which triggers
a BA deletion
- A transmission failure happens due to an abnormality in DMA
Since ieee80211_tx_status_ext() is primarily used to address AQL issues,
avoid potential deadlocks by restricting calls to ieee80211_tx_status_ext
only for data frames.
Fixes: 94e4f5794627 ("mt76: dma: use ieee80211_tx_status_ext to free packets when tx fails")
Reviewed-by: Money Wang <money.wang@mediatek.com>
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
---
drivers/net/wireless/mediatek/mt76/dma.c | 15 ++++++++++++---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/mediatek/mt76/dma.c b/drivers/net/wireless/mediatek/mt76/dma.c
index 2d133ace7c33..928709f4a206 100644
--- a/drivers/net/wireless/mediatek/mt76/dma.c
+++ b/drivers/net/wireless/mediatek/mt76/dma.c
@@ -648,6 +648,8 @@ mt76_dma_tx_queue_skb(struct mt76_phy *phy, struct mt76_queue *q,
.skb = skb,
};
struct mt76_dev *dev = phy->dev;
+ struct ieee80211_tx_info *info;
+ struct ieee80211_hdr *hdr;
struct ieee80211_hw *hw;
int len, n = 0, ret = -ENOMEM;
struct mt76_txwi_cache *t;
@@ -736,9 +738,16 @@ mt76_dma_tx_queue_skb(struct mt76_phy *phy, struct mt76_queue *q,
free_skb:
status.skb = tx_info.skb;
hw = mt76_tx_status_get_hw(dev, tx_info.skb);
- spin_lock_bh(&dev->rx_lock);
- ieee80211_tx_status_ext(hw, &status);
- spin_unlock_bh(&dev->rx_lock);
+ hdr = (struct ieee80211_hdr *)tx_info.skb->data;
+ info = IEEE80211_SKB_CB(tx_info.skb);
+ if ((info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP) ||
+ ieee80211_is_data(hdr->frame_control)) {
+ spin_lock_bh(&dev->rx_lock);
+ ieee80211_tx_status_ext(hw, &status);
+ spin_unlock_bh(&dev->rx_lock);
+ } else {
+ ieee80211_free_txskb(hw, tx_info.skb);
+ }
return ret;
}
--
2.51.0
^ permalink raw reply related
* Re: [PATCH wireless-next] wifi: mac80211: Fix AAD/Nonce computation for management frames with MLO
From: Sai Pratyusha Magam @ 2026-02-02 5:40 UTC (permalink / raw)
To: Johannes Berg; +Cc: linux-wireless, Rohan Dutta
In-Reply-To: <6fbfb8b4f4a4a745b81cc8f81e01429ca90aa547.camel@sipsolutions.net>
Hi Johannes, Thanks for the elaborate response. I have been working
on your suggestions and will send out the next version with the changes
incorporated soon.
On 1/23/2026 6:04 PM, Johannes Berg wrote:
> Hi Sai,
>
> So I'll preface this saying (maybe again) I'm mostly thinking out loud,
> because adding 150+ lines of complex address munging code that reaches
> into a lot of different data structures for what's effectively a hwsim-
> only special case doesn't seem like a good trade-off right now... If we
> can avoid this in mac80211 and push something into hwsim, it seems like
> a win even if it were more complex there.
>
>>> Obviously we still want to have hwsim, but if this really is only for
>>> that then I feel we can still fairly easily implement TX encryption
>>> "offload"? After all, in RX we make decryption optional for every single
>>> frame - so if the device/driver didn't decrypt/validate the frame then
>>> mac80211 will. We also pass the key to the driver for each individual
>>> packet (struct ieee80211_tx_info::control::key). So doing the encryption
>>> in hwsim would be really simple if we export a function akin to
>>> ieee80211_tx_h_encrypt() that works on a single skb (which has the key
>>> pointer), sets up a single-frame struct ieee80211_tx_data and returns
>>> the skb from that [2].
>>>
>> "Implement TX encryption offload" - As I understand, your guidance is
>> towards implementing the Tx encryption in the mac80211_hwsim driver
>> Can you please kindly clarify if the understanding is correct?
>
> Not sure I'd say "guidance", but yes, that's what I was thinking of.
> Note that this is fairly limited, I'll elaborate below.
>
>> In order to let mac80211_hwsim driver do the Tx encryption:
>> (1)Add support for key install to hwsim driver, i.e,
>> mac80211_hwsim_ops::add_key, so mac80211 knows that the driver is going
>> to do the encryption.
>
> Yes. Note that due to the mac80211 SW crypto design, it doesn't really
> need to do _anything_, because:
> - on TX, mac80211 gives the key in the tx_info of every skb
> - on RX, mac80211 will happily do SW decryption if RX_FLAG_DECRYPTED
> isn't set on the skb
>
>> (2)A function similar to ieee80211_tx_h_encrypt() in the hwsim driver
>> that can do the actual encryption.
>
> Actually, the function I posted in my other mail was going to live in
> mac80211, but exported to be (only) called by hwsim. That way we can
> reuse all the existing mac80211 code without making it more complex.
> (We could even put it under a hwsim ifdef or hwsim-only export
> namespace, but not sure that has much value.)
>
>> Since mgmt frames need to use link
>> addresses for crypto computations, possibly I could call
>> ieee80211_encrypt_tx_skb() [2] after address translation to link
>> addresses in mac80211_hwsim_tx() and since data frames need to use the
>> MLD addresses, ieee80211_encrypt_tx_skb() can be called before the
>> address translation to link addresses.
>
> Right.
>
> Given the function I posted wasn't even 30 lines, and the key install
> function in hwsim can be basically "return 0", the RX part likely won't
> be _that_ much either, I'd tend to think that overall it could end up
> with even fewer lines of code than this solution, never mind the fact
> that it won't have to reach into all the vif/link/sta/link_sta data
> structures.
>
> Now I haven't actually written it, so I don't know for sure it'll be
> that simple, but at this point I'm fairly confident it should be? Do you
> see any holes in this?
>
> johannes
^ permalink raw reply
* Re: [PATCH] wireless-regdb: Update regulatory info for Canada (CA) for 2025
From: Ping-Ke Shih @ 2026-02-02 3:06 UTC (permalink / raw)
To: Chen-Yu Tsai
Cc: druth, Ping-Ke Shih, wireless-regdb, linux-wireless,
Johannes Berg
In-Reply-To: <20260128074236.965019-1-wens@kernel.org>
Chen-Yu Tsai <wens@kernel.org> wrote:
>
> Canada issued a new revision of its regulatory standards for 2.4 GHz
> and 5 GHz license-exempt local area network devices - RSS-247.
>
> Update the rules to match the new version. Fix up band boundaries and
> power limit values and units to match the text.
>
> Note: the database is supposed to have values for e.i.r.p.. Most
> regulatory documents specify e.i.r.p. as well, except for FCC ones and
> any regions that have rules based on FCC ones.
>
> Details about the changes and justification for them are as follows.
>
> - 2.4 GHz band boundary aligned to actual text instead of WiFi channels
>
> - 2.4 GHz band changed from 30 dBm (1W) to 4 W
> section 6.3.2 explicitly states e.i.r.p. limit at 4 W.
>
> - 5.15 ~ 5.25 GHz band power limit unit changed to mW
> section 7.3.1.2 explicitly states e.i.r.p. limit at 200 mW.
>
> - 5.25 ~ 5.35 GHz band power limit changed to 500 mW
> section 7.3.2.2 states e.i.r.p. limit at 1 W, but requires TPC for
> e.i.r.p. above 500 mW. As the database nor Linux implements TPC,
> the 500 mW limit is chosen.
>
> - 5.4 ~ 5.725 GHz band combined and power limit unit changed to mW
> the new revision removed the restriction 5.6 ~ 5.65 GHz usage.
> the two existing rules are combined to cover the whole band,
> and the upper boundary has been increased to 5.73 GHz to cover
> the whole WiFi channel and make it easier to write the rule,
> like how the US rules are written.
>
> section 7.3.3.2 states e.i.r.p. limit at 1 W, but requires TPC for
> e.i.r.p. above 500 mW. As the database nor Linux implements TPC,
> the 500 mW limit is chosen.
>
> - 5.725 ~ 5.85 GHz boundaries aligned and limit changed from 30 dBm (1W)
> to 4 W; AUTO-BW added for combined usage with next band.
>
> section 7.3.4.3 states maximum conducted power limit at 1 W, but no
> explicit e.i.r.p. limit is given.
>
> apply "e.i.r.p. = max conducted power + 6 dBi" conversion, arriving
> at roughly 4 W. This aligns with the ratio for the 2.4 GHz band.
>
> - 5.85 ~ 5.895 GHz band newly opened in this revision
> section 7.3.5.3 states maximum e.i.r.p. for indoor clients at 1 W or
> 30 dBm, with maximum e.i.r.p. spectral density at 14 dBm / MHz.
>
> Apply spectral density limit at 20 MHz channel width, arriving at
> roughly 27 dBm e.i.r.p. limit.
>
> While the limit comes from the "indoor clients" rule, it is the lowest
> limit of all the types, hence it should be applicable without any
> restrictions.
>
> Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
All content is consistent with the description in RSS-247.
Reviewed-by: Ping-Ke Shih <pkshih@realtek.com>
^ permalink raw reply
* RE: Problems building rtw89
From: Ping-Ke Shih @ 2026-02-02 1:52 UTC (permalink / raw)
To: Iohann Tachy; +Cc: linux-wireless@vger.kernel.org
In-Reply-To: <CAPVS0eLR5KCmBEkGHnSxwKQM0hwCSaL0TSaTMNT_GJQK1sT8hg@mail.gmail.com>
// sort posting as expected (avoid top posting)
Iohann Tachy <iohann.tachy@gmail.com> wrote:
> > On Thu, Jan 29, 2026 at 9:36 PM Ping-Ke Shih <pkshih@realtek.com> wrote:
> > >
> > > Iohann Tachy <iohann.tachy@gmail.com> wrote:
> > > > Good morning,
> > > >
> > > > Currently there's an issue where it's not possible to build the rtw89 driver.
> > > > The RTL8852BE card has a compatibility problem with Intel X99 chipset
> > > > and a hacked rtw89 driver is needed to make it work.
> > > >
> > > > I kindly request to read the Github issue:
> > > > https://github.com/lwfinger/rtw89/issues/396
> > >
> > > A fix in Github is to disable 36-bit DMA [1]. I'd like to collect platform
> > > info to add a quirk. Please share outputs of below commands
> > > - dmidecode
> > > - lspci -vt
> > > - lspci -x
> > >
> > > [1] https://github.com/a5a5aa555oo/rtw89-1/commit/629756ee0232089d298bb398790d4a745b950058
> > >
> > >
> On Fri, Jan 30, 2026 at 1:58 PM Iohann Tachy <iohann.tachy@gmail.com> wrote:
> >
> > Good afternoon!
> > I'll run the " - dmidecode
> > - lspci -vt
> > - lspci -x"
> > commands today evening.
> > and I'll let you know what's the output results.
> >
> > Regards,
> > Iohann
> >
> Good evening,
>
> I attached the results of the commands you requested.
>
I sent a patch to avoid 36-bit DMA as github did if the driver is running on
your motherboard X99. Please revert the patch you mentioned from github, and
apply this one to see if it can work to you.
I decide to not choose PCI bridge as a quirk rule, because the PCI bridge
"Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port"
is in common use, and I believe other boards using this bridge can work with
RTL8852BE.
Another, I assume you installed RTL8852BE on X99 personally, not pre-installed
on the board when you purchased, right?
[1] https://lore.kernel.org/linux-wireless/20260202014049.11783-1-pkshih@realtek.com/T/#u
^ permalink raw reply
* [PATCH rtw-next] wifi: rtw89: pci: add quirks to avoid using PCI DAC for X99 board across chips
From: Ping-Ke Shih @ 2026-02-02 1:40 UTC (permalink / raw)
To: linux-wireless; +Cc: iohann.tachy
RTL8852BE can't enable 36-bits DMA on Intel X99 motherboard, which isn't
a sold combination so add quirk across all chips, not only on specific chip
RTL8852BE,
Reported-by: Iohann Tachy <iohann.tachy@gmail.com>
Closes: https://lore.kernel.org/linux-wireless/CAPVS0eLR5KCmBEkGHnSxwKQM0hwCSaL0TSaTMNT_GJQK1sT8hg@mail.gmail.com/T/#m976028ea900ea6f2c5fbbd1ff14a92377227f555
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/core.h | 1 +
drivers/net/wireless/realtek/rtw89/pci.c | 16 ++++++++++++++++
2 files changed, 17 insertions(+)
diff --git a/drivers/net/wireless/realtek/rtw89/core.h b/drivers/net/wireless/realtek/rtw89/core.h
index 4778957d6b2d..0c894ba73a65 100644
--- a/drivers/net/wireless/realtek/rtw89/core.h
+++ b/drivers/net/wireless/realtek/rtw89/core.h
@@ -5205,6 +5205,7 @@ enum rtw89_flags {
enum rtw89_quirks {
RTW89_QUIRK_PCI_BER,
+ RTW89_QUIRK_PCI_NO_DAC,
RTW89_QUIRK_THERMAL_PROT_120C,
RTW89_QUIRK_THERMAL_PROT_110C,
diff --git a/drivers/net/wireless/realtek/rtw89/pci.c b/drivers/net/wireless/realtek/rtw89/pci.c
index 43c61b3dc969..fded15b2029f 100644
--- a/drivers/net/wireless/realtek/rtw89/pci.c
+++ b/drivers/net/wireless/realtek/rtw89/pci.c
@@ -19,6 +19,18 @@ MODULE_PARM_DESC(disable_clkreq, "Set Y to disable PCI clkreq support");
MODULE_PARM_DESC(disable_aspm_l1, "Set Y to disable PCI ASPM L1 support");
MODULE_PARM_DESC(disable_aspm_l1ss, "Set Y to disable PCI L1SS support");
+static const struct dmi_system_id rtw89_pci_quirks[] = {
+ {
+ .ident = "MACHINIST X99-RS9",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "MACHINIST"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "X99-RS9"),
+ },
+ .driver_data = (void *)RTW89_QUIRK_PCI_NO_DAC,
+ },
+ {},
+};
+
static int rtw89_pci_get_phy_offset_by_link_speed(struct rtw89_dev *rtwdev,
u32 *phy_offset)
{
@@ -3305,6 +3317,9 @@ static bool rtw89_pci_is_dac_compatible_bridge(struct rtw89_dev *rtwdev)
if (!bridge)
return false;
+ if (test_bit(RTW89_QUIRK_PCI_NO_DAC, rtwdev->quirks))
+ return false;
+
switch (bridge->vendor) {
case PCI_VENDOR_ID_INTEL:
return true;
@@ -4765,6 +4780,7 @@ int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
rtwdev->hci.cpwm_addr = pci_info->cpwm_addr;
rtw89_check_quirks(rtwdev, info->quirks);
+ rtw89_check_quirks(rtwdev, rtw89_pci_quirks);
rtw89_check_pci_ssid_quirks(rtwdev, pdev, pci_info->ssid_quirks);
SET_IEEE80211_DEV(rtwdev->hw, &pdev->dev);
base-commit: 4c1552473acf03cad828884b4e1c90b97a89b265
--
2.25.1
^ permalink raw reply related
* RE: [PATCH net-next] net: remove unnecessary module_init/exit functions
From: Ping-Ke Shih @ 2026-02-02 0:39 UTC (permalink / raw)
To: Ethan Nelson-Moore, netdev@vger.kernel.org,
linux-can@vger.kernel.org, linux-wireless@vger.kernel.org
Cc: Michael Grzeschik, Andrew Lunn, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Marc Kleine-Budde, Vincent Mailhol,
Ido Schimmel, Petr Machata, Sridhar Samudrala,
Toke Høiland-Jørgensen, Thomas Mühlbacher,
Oliver Hartkopp
In-Reply-To: <20260131004327.18112-1-enelsonmoore@gmail.com>
Ethan Nelson-Moore <enelsonmoore@gmail.com> wrote:
> Many network drivers have unnecessary empty module_init and module_exit
> functions. Remove them (including some that just print a message). Note
> that if a module_init function exists, a module_exit function must also
> exist; otherwise, the module cannot be unloaded.
>
> Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com>
> ---
> drivers/net/arcnet/com20020.c | 16 ----------
> drivers/net/can/sja1000/sja1000.c | 16 ----------
> drivers/net/ethernet/8390/8390.c | 14 ---------
> drivers/net/ethernet/8390/8390p.c | 11 -------
> drivers/net/ethernet/mellanox/mlxsw/pci.c | 12 --------
> drivers/net/hamradio/hdlcdrv.c | 20 -------------
> drivers/net/net_failover.c | 13 ---------
> drivers/net/wireless/ath/ath9k/common.c | 12 --------
> .../realtek/rtlwifi/btcoexist/rtl_btc.c | 13 ---------
For rtlwifi driver:
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
^ permalink raw reply
* [RFC v6 wireless-next 4/4] wifi: mac80211_hwsim: background CAC support
From: Janusz Dziedzic @ 2026-02-01 16:15 UTC (permalink / raw)
To: linux-wireless; +Cc: johannes, Janusz Dziedzic
In-Reply-To: <20260201161836.16506-1-janusz.dziedzic@gmail.com>
Report background CAC support and add allow
to cancel background CAC and simulate radar.
echo cancel > /sys/kernel/debug/ieee80211/phy2/hwsim/dfs_background_cac
echo radar > /sys/kernel/debug/ieee80211/phy2/hwsim/dfs_background_cac
Signed-off-by: Janusz Dziedzic <janusz.dziedzic@gmail.com>
---
drivers/net/wireless/virtual/mac80211_hwsim.c | 68 ++++++++++++++++++-
1 file changed, 67 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/virtual/mac80211_hwsim.c b/drivers/net/wireless/virtual/mac80211_hwsim.c
index 4d9f5f87e814..682cfc413c9b 100644
--- a/drivers/net/wireless/virtual/mac80211_hwsim.c
+++ b/drivers/net/wireless/virtual/mac80211_hwsim.c
@@ -73,6 +73,10 @@ static bool multi_radio;
module_param(multi_radio, bool, 0444);
MODULE_PARM_DESC(multi_radio, "Support Multiple Radios per wiphy");
+static bool background_radar = true;
+module_param(background_radar, bool, 0444);
+MODULE_PARM_DESC(background_radar, "Support background radar/CAC");
+
/**
* enum hwsim_regtest - the type of regulatory tests we offer
*
@@ -715,6 +719,7 @@ struct mac80211_hwsim_data {
} ps;
bool ps_poll_pending;
struct dentry *debugfs;
+ struct cfg80211_chan_def radar_background_chandef;
atomic_t pending_cookie;
struct sk_buff_head pending; /* packets pending */
@@ -1164,6 +1169,41 @@ static int hwsim_write_simulate_radar(void *dat, u64 val)
DEFINE_DEBUGFS_ATTRIBUTE(hwsim_simulate_radar, NULL,
hwsim_write_simulate_radar, "%llu\n");
+static ssize_t hwsim_background_cac_write(struct file *file,
+ const char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct mac80211_hwsim_data *data = file->private_data;
+ char buf[8] = {};
+
+ if (count >= sizeof(buf))
+ return -EINVAL;
+
+ if (copy_from_user(buf, user_buf, count))
+ return -EFAULT;
+
+ /* Check if background radar channel is configured */
+ if (!data->radar_background_chandef.chan)
+ return -ENOENT;
+
+ if (sysfs_streq(buf, "radar"))
+ cfg80211_background_radar_event(data->hw->wiphy,
+ &data->radar_background_chandef,
+ GFP_KERNEL);
+ else if (sysfs_streq(buf, "cancel"))
+ cfg80211_background_cac_abort(data->hw->wiphy);
+ else
+ return -EINVAL;
+
+ return count;
+}
+
+static const struct file_operations hwsim_background_cac_ops = {
+ .write = hwsim_background_cac_write,
+ .open = simple_open,
+ .llseek = default_llseek,
+};
+
static int hwsim_fops_group_read(void *dat, u64 *val)
{
struct mac80211_hwsim_data *data = dat;
@@ -4154,6 +4194,23 @@ static int mac80211_hwsim_change_nan_config(struct ieee80211_hw *hw,
return 0;
}
+static int mac80211_hwsim_set_radar_background(struct ieee80211_hw *hw,
+ struct cfg80211_chan_def *chan)
+{
+ struct mac80211_hwsim_data *data = hw->priv;
+
+ if (!background_radar)
+ return -EOPNOTSUPP;
+
+ if (chan)
+ data->radar_background_chandef = *chan;
+ else
+ memset(&data->radar_background_chandef, 0,
+ sizeof(data->radar_background_chandef));
+
+ return 0;
+}
+
#ifdef CONFIG_MAC80211_DEBUGFS
#define HWSIM_DEBUGFS_OPS \
.link_add_debugfs = mac80211_hwsim_link_add_debugfs,
@@ -4189,6 +4246,7 @@ static int mac80211_hwsim_change_nan_config(struct ieee80211_hw *hw,
.start_nan = mac80211_hwsim_start_nan, \
.stop_nan = mac80211_hwsim_stop_nan, \
.nan_change_conf = mac80211_hwsim_change_nan_config, \
+ .set_radar_background = mac80211_hwsim_set_radar_background, \
HWSIM_DEBUGFS_OPS
#define HWSIM_NON_MLO_OPS \
@@ -5794,6 +5852,9 @@ static int mac80211_hwsim_new_radio(struct genl_info *info,
wiphy_ext_feature_set(hw->wiphy,
NL80211_EXT_FEATURE_DFS_CONCURRENT);
+ if (background_radar)
+ wiphy_ext_feature_set(hw->wiphy,
+ NL80211_EXT_FEATURE_RADAR_BACKGROUND);
if (param->no_vif)
ieee80211_hw_set(hw, NO_AUTO_VIF);
@@ -5828,10 +5889,15 @@ static int mac80211_hwsim_new_radio(struct genl_info *info,
&hwsim_fops_group);
debugfs_create_file("rx_rssi", 0666, data->debugfs, data,
&hwsim_fops_rx_rssi);
- if (!data->use_chanctx)
+ if (!data->use_chanctx) {
debugfs_create_file("dfs_simulate_radar", 0222,
data->debugfs,
data, &hwsim_simulate_radar);
+ if (background_radar)
+ debugfs_create_file("dfs_background_cac", 0200,
+ data->debugfs,
+ data, &hwsim_background_cac_ops);
+ }
if (param->pmsr_capa) {
data->pmsr_capa = *param->pmsr_capa;
--
2.43.0
^ permalink raw reply related
* [RFC v6 wireless-next 3/4] wifi: cfg80211: events, report background radar
From: Janusz Dziedzic @ 2026-02-01 16:15 UTC (permalink / raw)
To: linux-wireless; +Cc: johannes, Janusz Dziedzic
In-Reply-To: <20260201161836.16506-1-janusz.dziedzic@gmail.com>
In case we report radar event add also information
this is connected with background one, so user mode
application like hostapd, could check it and behave
correctly.
Signed-off-by: Janusz Dziedzic <janusz.dziedzic@gmail.com>
---
net/wireless/mlme.c | 6 ++++--
net/wireless/nl80211.c | 7 +++++++
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/net/wireless/mlme.c b/net/wireless/mlme.c
index cafb39596a40..da3786417713 100644
--- a/net/wireless/mlme.c
+++ b/net/wireless/mlme.c
@@ -1226,11 +1226,12 @@ void cfg80211_background_cac_done_wk(struct work_struct *work)
guard(wiphy)(&rdev->wiphy);
rdev_set_radar_background(rdev, NULL);
- rdev->background_radar_wdev = NULL;
__cfg80211_background_cac_event(rdev, rdev->background_radar_wdev,
&rdev->background_radar_chandef,
NL80211_RADAR_CAC_FINISHED);
+
+ rdev->background_radar_wdev = NULL;
}
void cfg80211_background_cac_abort_wk(struct work_struct *work)
@@ -1330,11 +1331,12 @@ void cfg80211_stop_background_radar_detection(struct wireless_dev *wdev)
return;
rdev_set_radar_background(rdev, NULL);
- rdev->background_radar_wdev = NULL; /* Release offchain ownership */
__cfg80211_background_cac_event(rdev, wdev,
&rdev->background_radar_chandef,
NL80211_RADAR_CAC_ABORTED);
+
+ rdev->background_radar_wdev = NULL;
}
int cfg80211_assoc_ml_reconf(struct cfg80211_registered_device *rdev,
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 99b323528211..b85a9b36ec33 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -21144,6 +21144,13 @@ nl80211_radar_notify(struct cfg80211_registered_device *rdev,
goto nla_put_failure;
}
+ if (rdev->background_radar_wdev &&
+ cfg80211_chandef_identical(&rdev->background_radar_chandef,
+ chandef)) {
+ if (nla_put_flag(msg, NL80211_ATTR_RADAR_BACKGROUND))
+ goto nla_put_failure;
+ }
+
if (nla_put_u32(msg, NL80211_ATTR_RADAR_EVENT, event))
goto nla_put_failure;
--
2.43.0
^ permalink raw reply related
* [RFC v6 wireless-next 2/4] wifi: cfg80211: set and report chandef CAC ongoing
From: Janusz Dziedzic @ 2026-02-01 16:15 UTC (permalink / raw)
To: linux-wireless; +Cc: johannes, Janusz Dziedzic
In-Reply-To: <20260201161836.16506-1-janusz.dziedzic@gmail.com>
Allow to track and check CAC state from user mode by
simple check phy channels eg. using iw phy1 channels
command.
This is done for regular CAC and background CAC.
It is important for background CAC while we can start
it from any app (eg. iw or hostapd).
Signed-off-by: Janusz Dziedzic <janusz.dziedzic@gmail.com>
---
include/net/cfg80211.h | 3 +++
include/uapi/linux/nl80211.h | 6 ++++++
net/wireless/chan.c | 27 +++++++++++++++++++++++++++
net/wireless/core.h | 4 ++++
net/wireless/mlme.c | 7 +++++++
net/wireless/nl80211.c | 7 +++++++
6 files changed, 54 insertions(+)
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index 7911ed58abbb..82840040dc02 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -188,6 +188,8 @@ enum ieee80211_channel_flags {
* on this channel.
* @dfs_state_entered: timestamp (jiffies) when the dfs state was entered.
* @dfs_cac_ms: DFS CAC time in milliseconds, this is valid for DFS channels.
+ * @cac_start_time: timestamp (CLOCK_BOOTTIME, nanoseconds) when CAC was
+ * started on this channel. Zero when CAC is not in progress.
* @psd: power spectral density (in dBm)
*/
struct ieee80211_channel {
@@ -205,6 +207,7 @@ struct ieee80211_channel {
enum nl80211_dfs_state dfs_state;
unsigned long dfs_state_entered;
unsigned int dfs_cac_ms;
+ u64 cac_start_time;
s8 psd;
};
diff --git a/include/uapi/linux/nl80211.h b/include/uapi/linux/nl80211.h
index 706a98686068..c13c587e83cf 100644
--- a/include/uapi/linux/nl80211.h
+++ b/include/uapi/linux/nl80211.h
@@ -4453,6 +4453,10 @@ enum nl80211_wmm_rule {
* @NL80211_FREQUENCY_ATTR_S1G_NO_PRIMARY: Channel is not permitted for use
* as a primary channel. Does not prevent the channel from existing
* as a non-primary subchannel. Only applicable to S1G channels.
+ * @NL80211_FREQUENCY_ATTR_CAC_START_TIME: Channel Availability Check (CAC)
+ * start time (CLOCK_BOOTTIME, nanoseconds). Only present when CAC is
+ * currently in progress on this channel.
+ * @NL80211_FREQUENCY_ATTR_PAD: attribute used for padding for 64-bit alignment
* @NL80211_FREQUENCY_ATTR_MAX: highest frequency attribute number
* currently defined
* @__NL80211_FREQUENCY_ATTR_AFTER_LAST: internal use
@@ -4502,6 +4506,8 @@ enum nl80211_frequency_attr {
NL80211_FREQUENCY_ATTR_NO_8MHZ,
NL80211_FREQUENCY_ATTR_NO_16MHZ,
NL80211_FREQUENCY_ATTR_S1G_NO_PRIMARY,
+ NL80211_FREQUENCY_ATTR_CAC_START_TIME,
+ NL80211_FREQUENCY_ATTR_PAD,
/* keep last */
__NL80211_FREQUENCY_ATTR_AFTER_LAST,
diff --git a/net/wireless/chan.c b/net/wireless/chan.c
index 68221b1ab45e..dfe319565280 100644
--- a/net/wireless/chan.c
+++ b/net/wireless/chan.c
@@ -642,6 +642,33 @@ void cfg80211_set_dfs_state(struct wiphy *wiphy,
}
}
+void cfg80211_set_cac_state(struct wiphy *wiphy,
+ const struct cfg80211_chan_def *chandef,
+ bool cac_ongoing)
+{
+ struct ieee80211_channel *c;
+ int width;
+ u64 cac_time;
+
+ if (WARN_ON(!cfg80211_chandef_valid(chandef)))
+ return;
+
+ width = cfg80211_chandef_get_width(chandef);
+ if (width < 0)
+ return;
+
+ /* Get the same timestamp for all subchannels */
+ cac_time = cac_ongoing ? ktime_get_boottime_ns() : 0;
+
+ for_each_subchan(chandef, freq, cf) {
+ c = ieee80211_get_channel_khz(wiphy, freq);
+ if (!c)
+ continue;
+
+ c->cac_start_time = cac_time;
+ }
+}
+
static bool
cfg80211_dfs_permissive_check_wdev(struct cfg80211_registered_device *rdev,
enum nl80211_iftype iftype,
diff --git a/net/wireless/core.h b/net/wireless/core.h
index 6ac57b7b2615..6cace846d7a3 100644
--- a/net/wireless/core.h
+++ b/net/wireless/core.h
@@ -481,6 +481,10 @@ void cfg80211_set_dfs_state(struct wiphy *wiphy,
const struct cfg80211_chan_def *chandef,
enum nl80211_dfs_state dfs_state);
+void cfg80211_set_cac_state(struct wiphy *wiphy,
+ const struct cfg80211_chan_def *chandef,
+ bool cac_ongoing);
+
void cfg80211_dfs_channels_update_work(struct work_struct *work);
void cfg80211_sched_dfs_chan_update(struct cfg80211_registered_device *rdev);
diff --git a/net/wireless/mlme.c b/net/wireless/mlme.c
index 212178d04efa..cafb39596a40 100644
--- a/net/wireless/mlme.c
+++ b/net/wireless/mlme.c
@@ -1162,9 +1162,11 @@ void cfg80211_cac_event(struct net_device *netdev,
fallthrough;
case NL80211_RADAR_CAC_ABORTED:
wdev->links[link_id].cac_started = false;
+ cfg80211_set_cac_state(wiphy, chandef, false);
break;
case NL80211_RADAR_CAC_STARTED:
wdev->links[link_id].cac_started = true;
+ cfg80211_set_cac_state(wiphy, chandef, true);
break;
default:
WARN_ON(1);
@@ -1192,15 +1194,18 @@ __cfg80211_background_cac_event(struct cfg80211_registered_device *rdev,
switch (event) {
case NL80211_RADAR_CAC_FINISHED:
cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_AVAILABLE);
+ cfg80211_set_cac_state(wiphy, chandef, false);
memcpy(&rdev->cac_done_chandef, chandef, sizeof(*chandef));
queue_work(cfg80211_wq, &rdev->propagate_cac_done_wk);
cfg80211_sched_dfs_chan_update(rdev);
break;
case NL80211_RADAR_CAC_ABORTED:
+ cfg80211_set_cac_state(wiphy, chandef, false);
if (!cancel_delayed_work(&rdev->background_cac_done_wk))
return;
break;
case NL80211_RADAR_CAC_STARTED:
+ cfg80211_set_cac_state(wiphy, chandef, true);
break;
default:
return;
@@ -1306,7 +1311,9 @@ void cfg80211_stop_radar_detection(struct wireless_dev *wdev)
continue;
chandef = *wdev_chandef(wdev, link_id);
+ wdev->links[link_id].cac_started = false;
rdev_end_cac(rdev, wdev->netdev, link_id);
+ cfg80211_set_cac_state(wiphy, &chandef, false);
nl80211_radar_notify(rdev, &chandef, NL80211_RADAR_CAC_ABORTED,
wdev->netdev, GFP_KERNEL);
}
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index 9aa83a6943a2..99b323528211 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -1319,6 +1319,12 @@ static int nl80211_msg_put_channel(struct sk_buff *msg, struct wiphy *wiphy,
if ((chan->flags & IEEE80211_CHAN_S1G_NO_PRIMARY) &&
nla_put_flag(msg, NL80211_FREQUENCY_ATTR_S1G_NO_PRIMARY))
goto nla_put_failure;
+ if (chan->cac_start_time &&
+ nla_put_u64_64bit(msg,
+ NL80211_FREQUENCY_ATTR_CAC_START_TIME,
+ chan->cac_start_time,
+ NL80211_FREQUENCY_ATTR_PAD))
+ goto nla_put_failure;
}
if (nla_put_u32(msg, NL80211_FREQUENCY_ATTR_MAX_TX_POWER,
@@ -11276,6 +11282,7 @@ static int nl80211_start_radar_detection(struct sk_buff *skb,
wdev->links[link_id].cac_started = true;
wdev->links[link_id].cac_start_time = jiffies;
wdev->links[link_id].cac_time_ms = cac_time_ms;
+ cfg80211_set_cac_state(wiphy, &chandef, true);
return 0;
}
--
2.43.0
^ permalink raw reply related
* [RFC v6 wireless-next 1/4] wifi: cfg80211: fix background CAC
From: Janusz Dziedzic @ 2026-02-01 16:15 UTC (permalink / raw)
To: linux-wireless; +Cc: johannes, Janusz Dziedzic
In-Reply-To: <20260201161836.16506-1-janusz.dziedzic@gmail.com>
Fix:
- Send CAC_ABORT event when background CAC is canceled
- Cancel CAC done workqueue when radar is detected
- Release background wdev ownership when CAC is aborted or passed
- Clean lower layer background radar state when CAC is aborted or passed
- Prevent sending abort event when radar event is sent
Signed-off-by: Janusz Dziedzic <janusz.dziedzic@gmail.com>
---
net/wireless/mlme.c | 40 +++++++++++++++++++---------------------
1 file changed, 19 insertions(+), 21 deletions(-)
diff --git a/net/wireless/mlme.c b/net/wireless/mlme.c
index 3fc175f9f868..212178d04efa 100644
--- a/net/wireless/mlme.c
+++ b/net/wireless/mlme.c
@@ -1115,8 +1115,10 @@ void __cfg80211_radar_event(struct wiphy *wiphy,
*/
cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_UNAVAILABLE);
- if (offchan)
+ if (offchan) {
+ cancel_delayed_work(&rdev->background_cac_done_wk);
queue_work(cfg80211_wq, &rdev->background_cac_abort_wk);
+ }
cfg80211_sched_dfs_chan_update(rdev);
@@ -1187,21 +1189,16 @@ __cfg80211_background_cac_event(struct cfg80211_registered_device *rdev,
if (!cfg80211_chandef_valid(chandef))
return;
- if (!rdev->background_radar_wdev)
- return;
-
switch (event) {
case NL80211_RADAR_CAC_FINISHED:
cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_AVAILABLE);
memcpy(&rdev->cac_done_chandef, chandef, sizeof(*chandef));
queue_work(cfg80211_wq, &rdev->propagate_cac_done_wk);
cfg80211_sched_dfs_chan_update(rdev);
- wdev = rdev->background_radar_wdev;
break;
case NL80211_RADAR_CAC_ABORTED:
if (!cancel_delayed_work(&rdev->background_cac_done_wk))
return;
- wdev = rdev->background_radar_wdev;
break;
case NL80211_RADAR_CAC_STARTED:
break;
@@ -1213,17 +1210,6 @@ __cfg80211_background_cac_event(struct cfg80211_registered_device *rdev,
nl80211_radar_notify(rdev, chandef, event, netdev, GFP_KERNEL);
}
-static void
-cfg80211_background_cac_event(struct cfg80211_registered_device *rdev,
- const struct cfg80211_chan_def *chandef,
- enum nl80211_radar_event event)
-{
- guard(wiphy)(&rdev->wiphy);
-
- __cfg80211_background_cac_event(rdev, rdev->background_radar_wdev,
- chandef, event);
-}
-
void cfg80211_background_cac_done_wk(struct work_struct *work)
{
struct delayed_work *delayed_work = to_delayed_work(work);
@@ -1231,18 +1217,30 @@ void cfg80211_background_cac_done_wk(struct work_struct *work)
rdev = container_of(delayed_work, struct cfg80211_registered_device,
background_cac_done_wk);
- cfg80211_background_cac_event(rdev, &rdev->background_radar_chandef,
- NL80211_RADAR_CAC_FINISHED);
+
+ guard(wiphy)(&rdev->wiphy);
+
+ rdev_set_radar_background(rdev, NULL);
+ rdev->background_radar_wdev = NULL;
+
+ __cfg80211_background_cac_event(rdev, rdev->background_radar_wdev,
+ &rdev->background_radar_chandef,
+ NL80211_RADAR_CAC_FINISHED);
}
void cfg80211_background_cac_abort_wk(struct work_struct *work)
{
struct cfg80211_registered_device *rdev;
+ struct wireless_dev *wdev;
rdev = container_of(work, struct cfg80211_registered_device,
background_cac_abort_wk);
- cfg80211_background_cac_event(rdev, &rdev->background_radar_chandef,
- NL80211_RADAR_CAC_ABORTED);
+
+ guard(wiphy)(&rdev->wiphy);
+
+ wdev = rdev->background_radar_wdev;
+ if (wdev)
+ cfg80211_stop_background_radar_detection(wdev);
}
void cfg80211_background_cac_abort(struct wiphy *wiphy)
--
2.43.0
^ permalink raw reply related
* [RFC v6 wireless-next 0/4] background CAC fixes
From: Janusz Dziedzic @ 2026-02-01 16:15 UTC (permalink / raw)
To: linux-wireless; +Cc: johannes, Janusz Dziedzic
V6:
1) rename cac_ongoing_time to cac_start_time
2) hwsim add background_radar module param
V5:
1) tested with mt7915
2) fixed locking
3) rebase with latest wireless-next
V4:
1) added proper locking for work queues
2) Added Fix: description
3) checkpatch fix (--max-line-length=80)
V3:
1) extended bgCAC cancelation patch to cover more issues detected
when tested with hwsim, like skip CAC abort event when radar
detected, or clearing lower level bgCAC correctly
2) Set CAC ongoing, so user mode don't have to guess if CAC ongoing
For this one also have iw patch that will extend iw phyX channels
3) For test purpose extend mac80211_hwsim and report bgCAC support
Allow to cancel bgCAC from debugfs or simulater radar when bgCAC.
Janusz Dziedzic (4):
wifi: cfg80211: fix background CAC
wifi: cfg80211: set and report chandef CAC ongoing
wifi: cfg80211: events, report background radar
wifi: mac80211_hwsim: background CAC support
drivers/net/wireless/virtual/mac80211_hwsim.c | 68 ++++++++++++++++++-
include/net/cfg80211.h | 3 +
include/uapi/linux/nl80211.h | 6 ++
net/wireless/chan.c | 27 ++++++++
net/wireless/core.h | 4 ++
net/wireless/mlme.c | 51 ++++++++------
net/wireless/nl80211.c | 14 ++++
7 files changed, 150 insertions(+), 23 deletions(-)
--
2.43.0
^ permalink raw reply
* Re: [PATCH net-next] net: remove unnecessary module_init/exit functions
From: Ido Schimmel @ 2026-02-01 13:47 UTC (permalink / raw)
To: Ethan Nelson-Moore
Cc: netdev, linux-can, linux-wireless, Michael Grzeschik, Andrew Lunn,
David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Marc Kleine-Budde, Vincent Mailhol, Petr Machata,
Sridhar Samudrala, Toke Høiland-Jørgensen, Ping-Ke Shih,
Thomas Mühlbacher, Oliver Hartkopp
In-Reply-To: <20260131004327.18112-1-enelsonmoore@gmail.com>
On Fri, Jan 30, 2026 at 04:42:56PM -0800, Ethan Nelson-Moore wrote:
> Many network drivers have unnecessary empty module_init and module_exit
> functions. Remove them (including some that just print a message). Note
> that if a module_init function exists, a module_exit function must also
> exist; otherwise, the module cannot be unloaded.
>
> Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com>
For mlxsw:
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Thanks
^ permalink raw reply
* Re: [PATCH] wifi: brcmsmac: phy: Remove unreachable error handling code
From: Arend van Spriel @ 2026-02-01 9:37 UTC (permalink / raw)
To: Ingyu Jang, linux-wireless; +Cc: brcm80211, brcm80211-dev-list.pdl
In-Reply-To: <20260131172355.3367673-1-ingyujang25@korea.ac.kr>
On 31/01/2026 18:23, Ingyu Jang wrote:
> wlc_phy_txpwr_srom_read_lcnphy() in wlc_phy_attach_lcnphy() always
> returns true, making the error handling code unreachable. Change the
> function's return type to void and remove the dead code, similar to
> the cleanup done for wlc_phy_txpwr_srom_read_nphy() in commit
> 47f0e32ffe4e ("wifi: brcmsmac: phy: Remove unreachable code").
Acked-by: Arend van Spriel <arend.vanspriel@broadcom.com>
> Signed-off-by: Ingyu Jang <ingyujang25@korea.ac.kr>
> ---
> .../wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c | 9 ++-------
> 1 file changed, 2 insertions(+), 7 deletions(-)
^ permalink raw reply
* FYI: NM + Wi-Fi 7 MLO AP: boot-time association completes on 5 GHz only; MLO appears only after retrigger (reapply/clone)
From: Alexander Becker @ 2026-02-01 8:25 UTC (permalink / raw)
To: linux-wireless
In-Reply-To: <1769934236-25833-mlmmj-67d697bb@vger.kernel.org>
Hi linux-wireless,
FYI about a boot-time behavior affecting Wi-Fi 7 MLO (802.11be) on
Ubuntu with NetworkManager.
Observed behavior:
- On boot, NetworkManager associates successfully but ends up in a
single-link, non-MLO connection (observed as 5 GHz only).
- MLO (multi-link with 6 GHz + 5 GHz) forms reliably only after
retriggering the connection (e.g., device reapply) or switching to a
newly created “clone” profile.
Environment (redacted):
- Kernel: 6.18.7-061807-generic
- NetworkManager: 1.46.0
- Driver: iwlwifi
- Interface: wlp87s0f0
- AP: Wi-Fi 7 / 802.11be MLO-capable (SSID: <REDACTED_SSID>)
Evidence (journal, redacted):
- NM auto-activates the base profile and reaches “device activated”
quickly after DHCP.
- A workaround service forces a delete/re-add/activate of a cloned NM
profile and then logs: “SUCCESS: 6 GHz link detected”.
Hypothesis:
This looks like a connection orchestration timing issue (early
completion on first viable link) rather than a hard driver failure,
but I’m sharing here in case others have seen similar behavior in the
Wi-Fi 7 MLO stack or have guidance on the correct “ready/complete”
conditions for MLO.
I’m also filing with NetworkManager and hostap lists.
Thanks.
Alex
^ permalink raw reply
* Re: [PATCH 03/13] wifi: nl80211/cfg80211: add continuous ranging and PD request support
From: Jeff Johnson @ 2026-02-01 0:52 UTC (permalink / raw)
To: Peddolla Harshavardhan Reddy, johannes; +Cc: linux-wireless
In-Reply-To: <20260130160039.2823409-4-peddolla.reddy@oss.qualcomm.com>
On 1/30/2026 8:00 AM, Peddolla Harshavardhan Reddy wrote:
> Add support for NTB continuous ranging with new FTM attributes. These
> enable continuos non-trigger based ranging with configurable timing and
WARNING:TYPO_SPELLING: 'continuos' may be misspelled - perhaps 'continuous'?
> measurement parameters. Also add PD request flag to peer attrs for
> proximity detection support with device capability checks.
>
> Signed-off-by: Peddolla Harshavardhan Reddy <peddolla.reddy@oss.qualcomm.com>
^ permalink raw reply
* Re: [PATCH 12/13] wifi: nl80211/cfg80211: add LTF keyseed support for secure ranging
From: Jeff Johnson @ 2026-02-01 0:50 UTC (permalink / raw)
To: Peddolla Harshavardhan Reddy, johannes; +Cc: linux-wireless
In-Reply-To: <20260130160039.2823409-13-peddolla.reddy@oss.qualcomm.com>
On 1/30/2026 8:00 AM, Peddolla Harshavardhan Reddy wrote:
> diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
> index dd45dda7e619..ea6b9c994455 100644
> --- a/include/net/cfg80211.h
> +++ b/include/net/cfg80211.h
> @@ -800,6 +800,8 @@ struct key_params {
> u16 vlan_id;
> u32 cipher;
> enum nl80211_key_mode mode;
> + const u8 *ltf_keyseed;
> + int ltf_keyseed_len;
Warning: include/net/cfg80211.h:804 struct member 'ltf_keyseed' not described in 'key_params'
Warning: include/net/cfg80211.h:804 struct member 'ltf_keyseed_len' not described in 'key_params'
^ permalink raw reply
* Re: [PATCH net-next] net: remove unnecessary module_init/exit functions
From: Michael Grzeschik @ 2026-01-31 21:30 UTC (permalink / raw)
To: Ethan Nelson-Moore
Cc: netdev, linux-can, linux-wireless, Andrew Lunn, David S. Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Marc Kleine-Budde,
Vincent Mailhol, Ido Schimmel, Petr Machata, Sridhar Samudrala,
Toke Høiland-Jørgensen, Ping-Ke Shih,
Thomas Mühlbacher, Oliver Hartkopp
In-Reply-To: <20260131004327.18112-1-enelsonmoore@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 886 bytes --]
On Fri, Jan 30, 2026 at 04:42:56PM -0800, Ethan Nelson-Moore wrote:
>Many network drivers have unnecessary empty module_init and module_exit
>functions. Remove them (including some that just print a message). Note
>that if a module_init function exists, a module_exit function must also
>exist; otherwise, the module cannot be unloaded.
>
>Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com>
>---
> drivers/net/arcnet/com20020.c | 16 ----------
For drivers/net/arcnet:
Acked-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Michael
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
[-- Attachment #2: signature.asc --]
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^ permalink raw reply
* RE: [PATCH] Revert "wifi: iwlwifi: trans: remove STATUS_SUSPENDED"
From: Korenblit, Miriam Rachel @ 2026-01-31 19:16 UTC (permalink / raw)
To: Chris Bainbridge
Cc: kvalo@kernel.org, Berg, Johannes, benjamin@sipsolutions.net,
gustavoars@kernel.org, linux-intel-wifi@intel.com,
linux-wireless@vger.kernel.org, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
In-Reply-To: <aX1CQb1P7QA1JefK@debian.local>
> -----Original Message-----
> From: Chris Bainbridge <chris.bainbridge@gmail.com>
> Sent: Saturday, January 31, 2026 1:44 AM
> To: Korenblit, Miriam Rachel <miriam.rachel.korenblit@intel.com>
> Cc: kvalo@kernel.org; Berg, Johannes <johannes.berg@intel.com>;
> benjamin@sipsolutions.net; gustavoars@kernel.org; linux-intel-wifi@intel.com;
> linux-wireless@vger.kernel.org; netdev@vger.kernel.org; linux-
> kernel@vger.kernel.org; stable@vger.kernel.org
> Subject: Re: [PATCH] Revert "wifi: iwlwifi: trans: remove STATUS_SUSPENDED"
>
> Hi,
>
> I've been running a kernel with both of the suspend fixes (pause TCM on fast
> resume, cleanup IWL_MVM_STATUS_IN_HW_RESTART in resume) here for the
> last few days. I just experienced this fault - not from suspend/resume this time
> though, the laptop wasn't doing anything particular at the time, so no idea how to
> reproduce it.
> Maybe it's related though (?) as it has the same "Error sending
> SYSTEM_STATISTICS_CMD: time out after 2000ms."
> It recovered ok, wifi was functional afterwards.
>
> [37410.975565] iwlwifi 0000:01:00.0: Error sending SYSTEM_STATISTICS_CMD:
> time out after 2000ms.
> [37410.975741] iwlwifi 0000:01:00.0: Current CMD queue read_ptr 39088
> write_ptr 39089 [37410.977474] iwlwifi 0000:01:00.0: Start IWL Error Log Dump:
> [37410.977480] iwlwifi 0000:01:00.0: Transport status: 0x0000004A, valid: 6
> [37410.977486] iwlwifi 0000:01:00.0: Loaded firmware version: 89.7f71c7f4.0
> ty-a0-gf-a0-89.ucode [37410.977491] iwlwifi 0000:01:00.0: 0x00000084 |
> NMI_INTERRUPT_UNKNOWN [37410.977497] iwlwifi 0000:01:00.0:
> 0x00008210 | trm_hw_status0 [37410.977502] iwlwifi 0000:01:00.0:
> 0x00000000 | trm_hw_status1 [37410.977506] iwlwifi 0000:01:00.0:
> 0x004DAD04 | branchlink2 [37410.977511] iwlwifi 0000:01:00.0: 0x004D092A |
> interruptlink1 [37410.977515] iwlwifi 0000:01:00.0: 0x004D092A | interruptlink2
> [37410.977520] iwlwifi 0000:01:00.0: 0x00016AD2 | data1 [37410.977524]
> iwlwifi 0000:01:00.0: 0x01000000 | data2 [37410.977529] iwlwifi 0000:01:00.0:
> 0x00000000 | data3 [37410.977533] iwlwifi 0000:01:00.0: 0x70C01827 | beacon
> time [37410.977538] iwlwifi 0000:01:00.0: 0xAD47B7F5 | tsf low
> [37410.977542] iwlwifi 0000:01:00.0: 0x0000066B | tsf hi [37410.977547]
> iwlwifi 0000:01:00.0: 0x00000000 | time gp1 [37410.977551] iwlwifi
> 0000:01:00.0: 0xB3FD3A22 | time gp2 [37410.977555] iwlwifi 0000:01:00.0:
> 0x00000001 | uCode revision type [37410.977560] iwlwifi 0000:01:00.0:
> 0x00000059 | uCode version major [37410.977565] iwlwifi 0000:01:00.0:
> 0x7F71C7F4 | uCode version minor [37410.977569] iwlwifi 0000:01:00.0:
> 0x00000420 | hw version [37410.977574] iwlwifi 0000:01:00.0: 0x00C80002 |
> board version [37410.977578] iwlwifi 0000:01:00.0: 0x80F3FD26 | hcmd
> [37410.977583] iwlwifi 0000:01:00.0: 0x24020000 | isr0 [37410.977587] iwlwifi
> 0000:01:00.0: 0x00000000 | isr1 [37410.977591] iwlwifi 0000:01:00.0:
> 0x40F84002 | isr2 [37410.977596] iwlwifi 0000:01:00.0: 0x04C3081C | isr3
> [37410.977600] iwlwifi 0000:01:00.0: 0x00000000 | isr4 [37410.977604] iwlwifi
> 0000:01:00.0: 0x0326001C | last cmd Id [37410.977609] iwlwifi 0000:01:00.0:
> 0x00016AD2 | wait_event [37410.977613] iwlwifi 0000:01:00.0: 0x00000080 |
> l2p_control [37410.977618] iwlwifi 0000:01:00.0: 0x00010014 | l2p_duration
> [37410.977622] iwlwifi 0000:01:00.0: 0x0000003F | l2p_mhvalid
> [37410.977627] iwlwifi 0000:01:00.0: 0x00001800 | l2p_addr_match
> [37410.977631] iwlwifi 0000:01:00.0: 0x00000008 | lmpm_pmg_sel
> [37410.977635] iwlwifi 0000:01:00.0: 0x00000000 | timestamp [37410.977640]
> iwlwifi 0000:01:00.0: 0x06647878 | flow_handler [37410.977678] iwlwifi
> 0000:01:00.0: Start IWL Error Log Dump:
> [37410.977682] iwlwifi 0000:01:00.0: Transport status: 0x0000004A, valid: 7
> [37410.977687] iwlwifi 0000:01:00.0: 0x20000066 | NMI_INTERRUPT_HOST
> [37410.977692] iwlwifi 0000:01:00.0: 0x00000000 | umac branchlink1
> [37410.977697] iwlwifi 0000:01:00.0: 0x804838BE | umac branchlink2
> [37410.977701] iwlwifi 0000:01:00.0: 0x804A5D36 | umac interruptlink1
> [37410.977706] iwlwifi 0000:01:00.0: 0x804A5D36 | umac interruptlink2
> [37410.977710] iwlwifi 0000:01:00.0: 0x01000000 | umac data1 [37410.977715]
> iwlwifi 0000:01:00.0: 0x804A5D36 | umac data2 [37410.977719] iwlwifi
> 0000:01:00.0: 0x00000000 | umac data3 [37410.977723] iwlwifi 0000:01:00.0:
> 0x00000059 | umac major [37410.977728] iwlwifi 0000:01:00.0: 0x7F71C7F4 |
> umac minor [37410.977732] iwlwifi 0000:01:00.0: 0xB3FD3A20 | frame pointer
> [37410.977736] iwlwifi 0000:01:00.0: 0xC0886258 | stack pointer
> [37410.977741] iwlwifi 0000:01:00.0: 0x00B0020F | last host cmd
> [37410.977745] iwlwifi 0000:01:00.0: 0x00000400 | isr status reg
> [37410.977759] iwlwifi 0000:01:00.0: IML/ROM dump:
> [37410.977764] iwlwifi 0000:01:00.0: 0x00000B03 | IML/ROM error/state
> [37410.977778] iwlwifi 0000:01:00.0: 0x00008EBB | IML/ROM data1
> [37410.977792] iwlwifi 0000:01:00.0: 0x00000090 | IML/ROM
> WFPM_AUTH_KEY_0 [37410.977802] iwlwifi 0000:01:00.0: Fseq Registers:
> [37410.977868] iwlwifi 0000:01:00.0: 0x60000000 | FSEQ_ERROR_CODE
> [37410.977875] iwlwifi 0000:01:00.0: 0x80440007 | FSEQ_TOP_INIT_VERSION
> [37410.977882] iwlwifi 0000:01:00.0: 0x00080009 |
> FSEQ_CNVIO_INIT_VERSION [37410.977889] iwlwifi 0000:01:00.0: 0x0000A652
> | FSEQ_OTP_VERSION [37410.977896] iwlwifi 0000:01:00.0: 0x00000002 |
> FSEQ_TOP_CONTENT_VERSION [37410.977902] iwlwifi 0000:01:00.0:
> 0x4552414E | FSEQ_ALIVE_TOKEN [37410.977909] iwlwifi 0000:01:00.0:
> 0x00400410 | FSEQ_CNVI_ID [37410.977915] iwlwifi 0000:01:00.0: 0x00400410
> | FSEQ_CNVR_ID [37410.977922] iwlwifi 0000:01:00.0: 0x00400410 |
> CNVI_AUX_MISC_CHIP [37410.977930] iwlwifi 0000:01:00.0: 0x00400410 |
> CNVR_AUX_MISC_CHIP [37410.977939] iwlwifi 0000:01:00.0: 0x00009061 |
> CNVR_SCU_SD_REGS_SD_REG_DIG_DCDC_VTRIM
> [37410.977948] iwlwifi 0000:01:00.0: 0x00000061 |
> CNVR_SCU_SD_REGS_SD_REG_ACTIVE_VDIG_MIRROR
> [37410.977954] iwlwifi 0000:01:00.0: 0x00080009 |
> FSEQ_PREV_CNVIO_INIT_VERSION [37410.977961] iwlwifi 0000:01:00.0:
> 0x00440007 | FSEQ_WIFI_FSEQ_VERSION [37410.977968] iwlwifi 0000:01:00.0:
> 0x00440007 | FSEQ_BT_FSEQ_VERSION [37410.977974] iwlwifi 0000:01:00.0:
> 0x000000E6 | FSEQ_CLASS_TP_VERSION [37410.977988] iwlwifi 0000:01:00.0:
> UMAC CURRENT PC: 0x804a57fc [37410.977995] iwlwifi 0000:01:00.0: LMAC1
> CURRENT PC: 0xd0 [37410.978994] iwlwifi 0000:01:00.0: WRT: Collecting data:
> ini trigger 4 fired (delay=0ms).
> [37411.452630] iwlwifi 0000:01:00.0: Device error - SW reset [37411.452783]
> ieee80211 phy0: Hardware restart was requested [37411.699230] iwlwifi
> 0000:01:00.0: WFPM_UMAC_PD_NOTIFICATION: 0x20 [37411.699393] iwlwifi
> 0000:01:00.0: WFPM_LMAC2_PD_NOTIFICATION: 0x1f [37411.699479] iwlwifi
> 0000:01:00.0: WFPM_AUTH_KEY_0: 0x90 [37411.699553] iwlwifi 0000:01:00.0:
> CNVI_SCU_SEQ_DATA_DW9: 0x0 [37411.837813] iwlwifi 0000:01:00.0: restart
> completed
Not sure it is related.
Can you open a Bugzilla? With the fw dump and trace-cmd?
^ permalink raw reply
* [PATCH] wifi: brcmsmac: phy: Remove unreachable error handling code
From: Ingyu Jang @ 2026-01-31 17:23 UTC (permalink / raw)
To: linux-wireless
Cc: arend.vanspriel, brcm80211, brcm80211-dev-list.pdl, Ingyu Jang
wlc_phy_txpwr_srom_read_lcnphy() in wlc_phy_attach_lcnphy() always
returns true, making the error handling code unreachable. Change the
function's return type to void and remove the dead code, similar to
the cleanup done for wlc_phy_txpwr_srom_read_nphy() in commit
47f0e32ffe4e ("wifi: brcmsmac: phy: Remove unreachable code").
Signed-off-by: Ingyu Jang <ingyujang25@korea.ac.kr>
---
.../wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c
index b4bba67a45ec3..5258681218ea9 100644
--- a/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c
+++ b/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/phy_lcn.c
@@ -4790,7 +4790,7 @@ void wlc_phy_init_lcnphy(struct brcms_phy *pi)
wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT);
}
-static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
+static void wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
{
s8 txpwr = 0;
int i;
@@ -4879,8 +4879,6 @@ static bool wlc_phy_txpwr_srom_read_lcnphy(struct brcms_phy *pi)
sprom->ant_available_bg);
}
pi_lcn->lcnphy_cck_dig_filt_type = -1;
-
- return true;
}
void wlc_2064_vco_cal(struct brcms_phy *pi)
@@ -4992,10 +4990,7 @@ bool wlc_phy_attach_lcnphy(struct brcms_phy *pi)
pi->pi_fptr.radioloftget = wlc_lcnphy_get_radio_loft;
pi->pi_fptr.detach = wlc_phy_detach_lcnphy;
- if (!wlc_phy_txpwr_srom_read_lcnphy(pi)) {
- kfree(pi->u.pi_lcnphy);
- return false;
- }
+ wlc_phy_txpwr_srom_read_lcnphy(pi);
if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
if (pi_lcn->lcnphy_tempsense_option == 3) {
--
2.34.1
^ permalink raw reply related
* Re: [PATCH net-next] net: remove unnecessary module_init/exit functions
From: Marc Kleine-Budde @ 2026-01-31 15:11 UTC (permalink / raw)
To: Ethan Nelson-Moore
Cc: netdev, linux-can, linux-wireless, Michael Grzeschik, Andrew Lunn,
David S. Miller, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
Vincent Mailhol, Ido Schimmel, Petr Machata, Sridhar Samudrala,
Toke Høiland-Jørgensen, Ping-Ke Shih,
Thomas Mühlbacher, Oliver Hartkopp
In-Reply-To: <20260131004327.18112-1-enelsonmoore@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 827 bytes --]
On 30.01.2026 16:42:56, Ethan Nelson-Moore wrote:
> Many network drivers have unnecessary empty module_init and module_exit
> functions. Remove them (including some that just print a message). Note
> that if a module_init function exists, a module_exit function must also
> exist; otherwise, the module cannot be unloaded.
>
> Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com>
> ---
> drivers/net/can/sja1000/sja1000.c | 16 ----------
For drivers/net/can
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung Nürnberg | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-9 |
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply
* Re: [PULL linux-firmware] ath10k, ath11k and ath12k firmware ath-20260130
From: Dmitry Baryshkov @ 2026-01-31 6:39 UTC (permalink / raw)
To: Jeff Johnson
Cc: linux-firmware, linux-wireless, ath10k, ath11k, ath12k, jjohnson
In-Reply-To: <ecf412bd-7bd3-42ed-bea4-d7aa837ddcae@oss.qualcomm.com>
On Fri, Jan 30, 2026 at 12:29:48PM -0800, Jeff Johnson wrote:
> Hi,
> Here's a new pull request for ath10k, ath11k and ath12k.
>
> For ath12k:
>
> Update firmware for QCN9274/hw2.0.
>
> Update board file for WCN7850/hw2.0 to support:
> bus=pci,vendor=17cb,device=1107,subsystem-vendor=1eac,subsystem-device=8001,qmi-chip-id=2,qmi-board-id=255
> bus=pci,vendor=17cb,device=1107,subsystem-vendor=1eac,subsystem-device=8004,qmi-chip-id=2,qmi-board-id=255
These two were not a part of the previous upload, but... They again have
board-id of 255 (unprogrammed). Why is there no calibration variant?
>
>
> Please let me know if there are any problems.
--
With best wishes
Dmitry
^ permalink raw reply
* [PATCH v2] wifi: mt76: add missing lock protection in mt76_sta_state for sta_event callback
From: Ziyi Guo @ 2026-01-31 3:52 UTC (permalink / raw)
To: Felix Fietkau, Lorenzo Bianconi, Ryder Lee
Cc: Shayne Chen, Sean Wang, Matthias Brugger,
AngeloGioacchino Del Regno, linux-wireless, linux-kernel,
linux-mediatek, linux-arm-kernel, Ziyi Guo
mt76_sta_state() calls the sta_event callback without holding dev->mutex.
However, mt7915_mac_sta_event() (MT7915 implementation of this callback)
calls mt7915_mac_twt_teardown_flow() which has
lockdep_assert_held(&dev->mt76.mutex) indicating that callers must
hold this lock.
The locking pattern in mt76_sta_state() is inconsistent:
- mt76_sta_add() acquires dev->mutex before calling dev->drv->sta_add
- mt76_sta_remove() acquires dev->mutex before calling __mt76_sta_remove
- But sta_event callback is called without acquiring the lock
Add mutex_lock()/mutex_unlock() around the mt7915_mac_twt_teardown_flow
invocation to fix the missing lock protection and maintain consistency
with the existing locking pattern.
Signed-off-by: Ziyi Guo <n7l8m4@u.northwestern.edu>
---
v2:
- Move the locking to MT7915 driver to avoid deadlock in other drivers
drivers/net/wireless/mediatek/mt76/mt7915/main.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/main.c b/drivers/net/wireless/mediatek/mt76/mt7915/main.c
index 90d5e79fbf74..e212e964fda0 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7915/main.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7915/main.c
@@ -851,8 +851,10 @@ int mt7915_mac_sta_event(struct mt76_dev *mdev, struct ieee80211_vif *vif,
return mt7915_mcu_add_sta(dev, vif, sta, CONN_STATE_PORT_SECURE, false);
case MT76_STA_EVENT_DISASSOC:
+ mutex_lock(&dev->mt76.mutex);
for (i = 0; i < ARRAY_SIZE(msta->twt.flow); i++)
mt7915_mac_twt_teardown_flow(dev, msta, i);
+ mutex_unlock(&dev->mt76.mutex);
mt7915_mcu_add_sta(dev, vif, sta, CONN_STATE_DISCONNECT, false);
msta->wcid.sta_disabled = 1;
--
2.34.1
^ permalink raw reply related
* [PATCH] wifi: mt76: mt7996: fix use-after-free bugs in mt7996_mac_dump_work()
From: Duoming Zhou @ 2026-01-31 2:47 UTC (permalink / raw)
To: linux-wireless
Cc: linux-kernel, linux-arm-kernel, linux-mediatek, nbd, lorenzo,
ryder.lee, shayne.chen, sean.wang, matthias.bgg,
angelogioacchino.delregno, kuba, rex.lu, Duoming Zhou
When the mt7996 pci chip is detaching, the mt7996_crash_data is
released in mt7996_coredump_unregister(). However, the work item
dump_work may still be running or pending, leading to UAF bugs
when the already freed crash_data is dereferenced again in
mt7996_mac_dump_work().
The race condition can occur as follows:
CPU 0 (removal path) | CPU 1 (workqueue)
mt7996_pci_remove() | mt7996_sys_recovery_set()
mt7996_unregister_device() | mt7996_reset()
mt7996_coredump_unregister() | queue_work()
vfree(dev->coredump.crash_data) | mt7996_mac_dump_work()
| crash_data-> // UAF
Fix this by ensuring dump_work is properly canceled before
the crash_data is deallocated. Add cancel_work_sync() in
mt7996_unregister_device() to synchronize with any pending
or executing dump work.
Fixes: 878161d5d4a4 ("wifi: mt76: mt7996: enable coredump support")
Signed-off-by: Duoming Zhou <duoming@zju.edu.cn>
---
drivers/net/wireless/mediatek/mt76/mt7996/init.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/wireless/mediatek/mt76/mt7996/init.c b/drivers/net/wireless/mediatek/mt76/mt7996/init.c
index 00a8286bd13..0ccaa5dce19 100644
--- a/drivers/net/wireless/mediatek/mt76/mt7996/init.c
+++ b/drivers/net/wireless/mediatek/mt76/mt7996/init.c
@@ -1726,6 +1726,7 @@ int mt7996_register_device(struct mt7996_dev *dev)
void mt7996_unregister_device(struct mt7996_dev *dev)
{
+ cancel_work_sync(&dev->dump_work);
cancel_work_sync(&dev->wed_rro.work);
mt7996_unregister_phy(mt7996_phy3(dev));
mt7996_unregister_phy(mt7996_phy2(dev));
--
2.34.1
^ permalink raw reply related
* Re: Problems building rtw89
From: Iohann Tachy @ 2026-01-31 2:19 UTC (permalink / raw)
To: Ping-Ke Shih; +Cc: linux-wireless@vger.kernel.org
In-Reply-To: <CAPVS0eKLicu1Y+MUpLcuwqTU0agEn9m7zyOO_5rgB3vA+gM9Bg@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1171 bytes --]
Good evening,
I attached the results of the commands you requested.
Regards,
Iohann
On Fri, Jan 30, 2026 at 1:58 PM Iohann Tachy <iohann.tachy@gmail.com> wrote:
>
> Good afternoon!
> I'll run the " - dmidecode
> - lspci -vt
> - lspci -x"
> commands today evening.
> and I'll let you know what's the output results.
>
> Regards,
> Iohann
>
> On Thu, Jan 29, 2026 at 9:36 PM Ping-Ke Shih <pkshih@realtek.com> wrote:
> >
> > Iohann Tachy <iohann.tachy@gmail.com> wrote:
> > > Good morning,
> > >
> > > Currently there's an issue where it's not possible to build the rtw89 driver.
> > > The RTL8852BE card has a compatibility problem with Intel X99 chipset
> > > and a hacked rtw89 driver is needed to make it work.
> > >
> > > I kindly request to read the Github issue:
> > > https://github.com/lwfinger/rtw89/issues/396
> >
> > A fix in Github is to disable 36-bit DMA [1]. I'd like to collect platform
> > info to add a quirk. Please share outputs of below commands
> > - dmidecode
> > - lspci -vt
> > - lspci -x
> >
> > [1] https://github.com/a5a5aa555oo/rtw89-1/commit/629756ee0232089d298bb398790d4a745b950058
> >
> >
[-- Attachment #2: dmidecode.txt --]
[-- Type: text/plain, Size: 26791 bytes --]
# dmidecode 3.5
Getting SMBIOS data from sysfs.
SMBIOS 3.0.0 present.
Table at 0x773AF000.
Handle 0x0000, DMI type 0, 24 bytes
BIOS Information
Vendor: American Megatrends Inc.
Version: 5.11
Release Date: 12/21/2021
Address: 0xF0000
Runtime Size: 64 kB
ROM Size: 8 MB
Characteristics:
PCI is supported
BIOS is upgradeable
BIOS shadowing is allowed
Boot from CD is supported
Selectable boot is supported
BIOS ROM is socketed
EDD is supported
5.25"/1.2 MB floppy services are supported (int 13h)
3.5"/720 kB floppy services are supported (int 13h)
3.5"/2.88 MB floppy services are supported (int 13h)
Print screen service is supported (int 5h)
8042 keyboard services are supported (int 9h)
Serial services are supported (int 14h)
Printer services are supported (int 17h)
ACPI is supported
USB legacy is supported
BIOS boot specification is supported
Targeted content distribution is supported
UEFI is supported
BIOS Revision: 5.11
Handle 0x0001, DMI type 1, 27 bytes
System Information
Manufacturer: Default string
Product Name: Default string
Version: Default string
Serial Number: Default string
UUID: 03000200-0400-0500-0006-000700080009
Wake-up Type: Power Switch
SKU Number: Default string
Family: Default string
Handle 0x0002, DMI type 2, 15 bytes
Base Board Information
Manufacturer: MACHINIST
Product Name: X99-RS9
Version: V2.0
Serial Number: MB-202112242021
Asset Tag: Default string
Features:
Board is a hosting board
Board is replaceable
Location In Chassis: Default string
Chassis Handle: 0x0003
Type: Motherboard
Contained Object Handles: 0
Handle 0x0003, DMI type 3, 22 bytes
Chassis Information
Manufacturer: Default string
Type: Desktop
Lock: Not Present
Version: Default string
Serial Number: Default string
Asset Tag: Default string
Boot-up State: Safe
Power Supply State: Safe
Thermal State: Safe
Security Status: None
OEM Information: 0x00000000
Height: Unspecified
Number Of Power Cords: 1
Contained Elements: 0
SKU Number: Default string
Handle 0x0004, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J1A1
Internal Connector Type: None
External Reference Designator: PS2Mouse
External Connector Type: PS/2
Port Type: Mouse Port
Handle 0x0005, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J1A1
Internal Connector Type: None
External Reference Designator: Keyboard
External Connector Type: PS/2
Port Type: Keyboard Port
Handle 0x0006, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J2A1
Internal Connector Type: None
External Reference Designator: TV Out
External Connector Type: Mini Centronics Type-14
Port Type: Other
Handle 0x0007, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J2A2A
Internal Connector Type: None
External Reference Designator: COM A
External Connector Type: DB-9 male
Port Type: Serial Port 16550A Compatible
Handle 0x0008, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J2A2B
Internal Connector Type: None
External Reference Designator: Video
External Connector Type: DB-15 female
Port Type: Video Port
Handle 0x0009, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J3A1
Internal Connector Type: None
External Reference Designator: USB1
External Connector Type: Access Bus (USB)
Port Type: USB
Handle 0x000A, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J3A1
Internal Connector Type: None
External Reference Designator: USB2
External Connector Type: Access Bus (USB)
Port Type: USB
Handle 0x000B, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J3A1
Internal Connector Type: None
External Reference Designator: USB3
External Connector Type: Access Bus (USB)
Port Type: USB
Handle 0x000C, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J9A1 - TPM HDR
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x000D, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J9C1 - PCIE DOCKING CONN
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x000E, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J2B3 - CPU FAN
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x000F, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J6C2 - EXT HDMI
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0010, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J3C1 - GMCH FAN
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0011, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J1D1 - ITP
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0012, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J9E2 - MDC INTPSR
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0013, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J9E4 - MDC INTPSR
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0014, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J9E3 - LPC HOT DOCKING
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0015, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J9E1 - SCAN MATRIX
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0016, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J9G1 - LPC SIDE BAND
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0017, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J8F1 - UNIFIED
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0018, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J6F1 - LVDS
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x0019, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J2F1 - LAI FAN
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x001A, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J2G1 - GFX VID
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x001B, DMI type 8, 9 bytes
Port Connector Information
Internal Reference Designator: J1G6 - AC JACK
Internal Connector Type: Other
External Reference Designator: Not Specified
External Connector Type: None
Port Type: Other
Handle 0x001C, DMI type 9, 17 bytes
System Slot Information
Designation: Slot1
Type: x1 PCI Express 3 x1
Current Usage: In Use
Length: Short
ID: 1
Characteristics:
3.3 V is provided
Opening is shared
PME signal is supported
Bus Address: 0000:03:00.3
Handle 0x001D, DMI type 9, 17 bytes
System Slot Information
Designation: Slot2
Type: x8 PCI Express 3 x8
Current Usage: Unknown
Length: Short
ID: 2
Characteristics:
3.3 V is provided
Opening is shared
PME signal is supported
Bus Address: 0000:ff:00.0
Handle 0x001E, DMI type 9, 17 bytes
System Slot Information
Designation: Slot3
Type: x1 PCI Express 3 x1
Current Usage: Unknown
Length: Short
ID: 3
Characteristics:
3.3 V is provided
Opening is shared
PME signal is supported
Bus Address: 0000:ff:00.0
Handle 0x001F, DMI type 9, 17 bytes
System Slot Information
Designation: Slot4
Type: x16 PCI Express 3 x16
Current Usage: Unknown
Length: Long
ID: 4
Characteristics:
3.3 V is provided
Opening is shared
PME signal is supported
Bus Address: 0000:ff:00.0
Handle 0x0020, DMI type 9, 17 bytes
System Slot Information
Designation: Slot5
Type: x4 PCI Express 3 x4
Current Usage: Unknown
Length: Short
ID: 5
Characteristics:
3.3 V is provided
Opening is shared
PME signal is supported
Bus Address: 0000:ff:00.4
Handle 0x0021, DMI type 9, 17 bytes
System Slot Information
Designation: Slot6
Type: x16 PCI Express 3 x16
Current Usage: Available
Length: Long
ID: 6
Characteristics:
3.3 V is provided
Opening is shared
PME signal is supported
Bus Address: 0000:01:00.0
Handle 0x0022, DMI type 9, 17 bytes
System Slot Information
Designation: Slot7
Type: x1 PCI Express 3 x1
Current Usage: In Use
Length: Short
ID: 7
Characteristics:
3.3 V is provided
Opening is shared
PME signal is supported
Bus Address: 0000:06:00.1
Handle 0x0023, DMI type 10, 6 bytes
On Board Device Information
Type: Video
Status: Enabled
Description: To Be Filled By O.E.M.
Handle 0x0024, DMI type 11, 5 bytes
OEM Strings
String 1: Default string
Handle 0x0025, DMI type 12, 5 bytes
System Configuration Options
Option 1: Default string
Handle 0x0026, DMI type 32, 20 bytes
System Boot Information
Status: No errors detected
Handle 0x0027, DMI type 34, 11 bytes
Management Device
Description: UNKNOWN
Type: Unknown
Address: 0x00000000
Address Type: Unknown
Handle 0x0028, DMI type 26, 22 bytes
Voltage Probe
Description: LM78A
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x0029, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x002A, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0027
Component Handle: 0x0027
Threshold Handle: 0x0028
Handle 0x002B, DMI type 28, 22 bytes
Temperature Probe
Description: LM78A
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x002C, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x002D, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0027
Component Handle: 0x002A
Threshold Handle: 0x002B
Handle 0x002E, DMI type 27, 15 bytes
Cooling Device
Temperature Probe Handle: 0x002B
Type: <OUT OF SPEC>
Status: <OUT OF SPEC>
Cooling Unit Group: 1
OEM-specific Information: 0x00000000
Nominal Speed: Unknown Or Non-rotating
Description: Cooling Dev 1
Handle 0x002F, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x0030, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0027
Component Handle: 0x002D
Threshold Handle: 0x002E
Handle 0x0031, DMI type 27, 15 bytes
Cooling Device
Temperature Probe Handle: 0x002B
Type: <OUT OF SPEC>
Status: <OUT OF SPEC>
Cooling Unit Group: 1
OEM-specific Information: 0x00000000
Nominal Speed: Unknown Or Non-rotating
Description: Not Specified
Handle 0x0032, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x0033, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0027
Component Handle: 0x0030
Threshold Handle: 0x0031
Handle 0x0034, DMI type 29, 22 bytes
Electrical Current Probe
Description: ABC
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x0035, DMI type 36, 16 bytes
Management Device Threshold Data
Handle 0x0036, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0027
Component Handle: 0x0033
Threshold Handle: 0x0031
Handle 0x0037, DMI type 34, 16 bytes
Management Device
Description: UNKNOWN-2
Type: Unknown
Address: 0x00000000
Address Type: Unknown
Handle 0x0038, DMI type 26, 22 bytes
Voltage Probe
Description: LM78B
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x0039, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 7
Upper Non-critical Threshold: 8
Lower Critical Threshold: 8
Upper Critical Threshold: 10
Lower Non-recoverable Threshold: 11
Upper Non-recoverable Threshold: 12
Handle 0x003A, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x0037
Threshold Handle: 0x0038
Handle 0x003B, DMI type 26, 22 bytes
Voltage Probe
Description: LM78B
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x003C, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 13
Upper Non-critical Threshold: 14
Lower Critical Threshold: 15
Upper Critical Threshold: 16
Lower Non-recoverable Threshold: 17
Upper Non-recoverable Threshold: 18
Handle 0x003D, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x003A
Threshold Handle: 0x003B
Handle 0x003E, DMI type 28, 22 bytes
Temperature Probe
Description: LM78B
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x003F, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x0040, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x003D
Threshold Handle: 0x003E
Handle 0x0041, DMI type 27, 15 bytes
Cooling Device
Temperature Probe Handle: 0x003E
Type: <OUT OF SPEC>
Status: <OUT OF SPEC>
Cooling Unit Group: 1
OEM-specific Information: 0x00000000
Nominal Speed: Unknown Or Non-rotating
Description: Cooling Dev 2
Handle 0x0042, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x0043, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x0040
Threshold Handle: 0x0041
Handle 0x0044, DMI type 28, 22 bytes
Temperature Probe
Description: LM78B
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x0045, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x0046, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x0043
Threshold Handle: 0x0044
Handle 0x0047, DMI type 27, 15 bytes
Cooling Device
Temperature Probe Handle: 0x0044
Type: <OUT OF SPEC>
Status: <OUT OF SPEC>
Cooling Unit Group: 1
OEM-specific Information: 0x00000000
Nominal Speed: Unknown Or Non-rotating
Description: Cooling Dev 2
Handle 0x0048, DMI type 36, 16 bytes
Management Device Threshold Data
Lower Non-critical Threshold: 1
Upper Non-critical Threshold: 2
Lower Critical Threshold: 3
Upper Critical Threshold: 4
Lower Non-recoverable Threshold: 5
Upper Non-recoverable Threshold: 6
Handle 0x0049, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x0046
Threshold Handle: 0x0047
Handle 0x004A, DMI type 29, 22 bytes
Electrical Current Probe
Description: DEF
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x004B, DMI type 36, 16 bytes
Management Device Threshold Data
Handle 0x004C, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x0049
Threshold Handle: 0x0047
Handle 0x004D, DMI type 29, 22 bytes
Electrical Current Probe
Description: GHI
Location: <OUT OF SPEC>
Status: <OUT OF SPEC>
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x004E, DMI type 36, 16 bytes
Management Device Threshold Data
Handle 0x004F, DMI type 35, 11 bytes
Management Device Component
Description: Default string
Management Device Handle: 0x0037
Component Handle: 0x004C
Threshold Handle: 0x0047
Handle 0x0050, DMI type 26, 22 bytes
Voltage Probe
Description: LM78A
Location: Power Unit
Status: OK
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x0051, DMI type 28, 22 bytes
Temperature Probe
Description: LM78A
Location: Power Unit
Status: OK
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x0052, DMI type 27, 15 bytes
Cooling Device
Temperature Probe Handle: 0x0051
Type: Power Supply Fan
Status: OK
Cooling Unit Group: 1
OEM-specific Information: 0x00000000
Nominal Speed: Unknown Or Non-rotating
Description: Cooling Dev 1
Handle 0x0053, DMI type 29, 22 bytes
Electrical Current Probe
Description: ABC
Location: Power Unit
Status: OK
Maximum Value: Unknown
Minimum Value: Unknown
Resolution: Unknown
Tolerance: Unknown
Accuracy: Unknown
OEM-specific Information: 0x00000000
Nominal Value: Unknown
Handle 0x0054, DMI type 39, 22 bytes
System Power Supply
Power Unit Group: 1
Location: To Be Filled By O.E.M.
Name: To Be Filled By O.E.M.
Manufacturer: To Be Filled By O.E.M.
Serial Number: To Be Filled By O.E.M.
Asset Tag: To Be Filled By O.E.M.
Model Part Number: To Be Filled By O.E.M.
Revision: To Be Filled By O.E.M.
Max Power Capacity: Unknown
Status: Present, OK
Type: Switching
Input Voltage Range Switching: Auto-switch
Plugged: Yes
Hot Replaceable: No
Input Voltage Probe Handle: 0x0050
Cooling Device Handle: 0x0052
Input Current Probe Handle: 0x0053
Handle 0x0055, DMI type 41, 11 bytes
Onboard Device
Reference Designation: Onboard LAN
Type: Ethernet
Status: Enabled
Type Instance: 1
Bus Address: 0000:00:19.0
Handle 0x0056, DMI type 16, 23 bytes
Physical Memory Array
Location: System Board Or Motherboard
Use: System Memory
Error Correction Type: Multi-bit ECC
Maximum Capacity: 256 GB
Error Information Handle: Not Provided
Number Of Devices: 4
Handle 0x0057, DMI type 19, 31 bytes
Memory Array Mapped Address
Starting Address: 0x00000000000
Ending Address: 0x007FFFFFFFF
Range Size: 32 GB
Physical Array Handle: 0x0056
Partition Width: 2
Handle 0x0058, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x0056
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: Unknown
Set: None
Locator: NO DIMM
Bank Locator: NO DIMM
Type: Unknown
Type Detail: Unknown
Handle 0x0059, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x0056
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 72 bits
Size: 16 GB
Form Factor: DIMM
Set: None
Locator: DIMM_B1
Bank Locator: NODE 1
Type: DDR4
Type Detail: Synchronous
Speed: 2133 MT/s
Manufacturer: Micron
Serial Number: 0DEC8505
Asset Tag: DIMM_B1_AssetTag
Part Number: 36ASF2G72PZ-2G1A2
Rank: 2
Configured Memory Speed: 1866 MT/s
Minimum Voltage: 1.14 V
Maximum Voltage: 1.26 V
Configured Voltage: 1.2 V
Handle 0x005A, DMI type 20, 35 bytes
Memory Device Mapped Address
Starting Address: 0x00000000000
Ending Address: 0x003FFFFFFFF
Range Size: 16 GB
Physical Device Handle: 0x0059
Memory Array Mapped Address Handle: 0x0057
Partition Row Position: 1
Handle 0x005B, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x0056
Error Information Handle: Not Provided
Total Width: 72 bits
Data Width: 72 bits
Size: 16 GB
Form Factor: DIMM
Set: None
Locator: DIMM_C1
Bank Locator: NODE 1
Type: DDR4
Type Detail: Synchronous
Speed: 2133 MT/s
Manufacturer: Hynix Semiconductor
Serial Number: 91709545
Asset Tag: DIMM_C1_AssetTag
Part Number: HMA42GR7MFR4N-TF
Rank: 2
Configured Memory Speed: 1866 MT/s
Minimum Voltage: 1.14 V
Maximum Voltage: 1.26 V
Configured Voltage: 1.2 V
Handle 0x005C, DMI type 20, 35 bytes
Memory Device Mapped Address
Starting Address: 0x00400000000
Ending Address: 0x007FFFFFFFF
Range Size: 16 GB
Physical Device Handle: 0x005B
Memory Array Mapped Address Handle: 0x0057
Partition Row Position: 1
Handle 0x005D, DMI type 17, 40 bytes
Memory Device
Array Handle: 0x0056
Error Information Handle: Not Provided
Total Width: Unknown
Data Width: Unknown
Size: No Module Installed
Form Factor: Unknown
Set: None
Locator: NO DIMM
Bank Locator: NO DIMM
Type: Unknown
Type Detail: Unknown
Handle 0x005E, DMI type 7, 19 bytes
Cache Information
Socket Designation: CPU Internal L1
Configuration: Enabled, Not Socketed, Level 1
Operational Mode: Write Back
Location: Internal
Installed Size: 512 kB
Maximum Size: 512 kB
Supported SRAM Types:
Unknown
Installed SRAM Type: Unknown
Speed: Unknown
Error Correction Type: Parity
System Type: Other
Associativity: 8-way Set-associative
Handle 0x005F, DMI type 7, 19 bytes
Cache Information
Socket Designation: CPU Internal L2
Configuration: Enabled, Not Socketed, Level 2
Operational Mode: Write Back
Location: Internal
Installed Size: 2 MB
Maximum Size: 2 MB
Supported SRAM Types:
Unknown
Installed SRAM Type: Unknown
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Unified
Associativity: 8-way Set-associative
Handle 0x0060, DMI type 7, 19 bytes
Cache Information
Socket Designation: CPU Internal L3
Configuration: Enabled, Not Socketed, Level 3
Operational Mode: Write Back
Location: Internal
Installed Size: 20 MB
Maximum Size: 20 MB
Supported SRAM Types:
Unknown
Installed SRAM Type: Unknown
Speed: Unknown
Error Correction Type: Single-bit ECC
System Type: Unified
Associativity: 20-way Set-associative
Handle 0x0061, DMI type 4, 48 bytes
Processor Information
Socket Designation: SOCKET 0
Type: Central Processor
Family: Xeon
Manufacturer: Intel
ID: F2 06 03 00 FF FB EB BF
Signature: Type 0, Family 6, Model 63, Stepping 2
Flags:
FPU (Floating-point unit on-chip)
VME (Virtual mode extension)
DE (Debugging extension)
PSE (Page size extension)
TSC (Time stamp counter)
MSR (Model specific registers)
PAE (Physical address extension)
MCE (Machine check exception)
CX8 (CMPXCHG8 instruction supported)
APIC (On-chip APIC hardware supported)
SEP (Fast system call)
MTRR (Memory type range registers)
PGE (Page global enable)
MCA (Machine check architecture)
CMOV (Conditional move instruction supported)
PAT (Page attribute table)
PSE-36 (36-bit page size extension)
CLFSH (CLFLUSH instruction supported)
DS (Debug store)
ACPI (ACPI supported)
MMX (MMX technology supported)
FXSR (FXSAVE and FXSTOR instructions supported)
SSE (Streaming SIMD extensions)
SSE2 (Streaming SIMD extensions 2)
SS (Self-snoop)
HTT (Multi-threading)
TM (Thermal monitor supported)
PBE (Pending break enabled)
Version: Intel(R) Xeon(R) CPU E5-2640 v3 @ 2.60GHz
Voltage: 0.2 V
External Clock: 100 MHz
Max Speed: 4000 MHz
Current Speed: 2600 MHz
Status: Populated, Enabled
Upgrade: Socket LGA2011-3
L1 Cache Handle: 0x005E
L2 Cache Handle: 0x005F
L3 Cache Handle: 0x0060
Serial Number: Not Specified
Asset Tag: Not Specified
Part Number: Not Specified
Core Count: 8
Core Enabled: 8
Thread Count: 16
Characteristics:
64-bit capable
Multi-Core
Hardware Thread
Execute Protection
Enhanced Virtualization
Power/Performance Control
Handle 0x0062, DMI type 13, 22 bytes
BIOS Language Information
Language Description Format: Long
Installable Languages: 1
en|US|iso8859-1
Currently Installed Language: en|US|iso8859-1
Handle 0x0063, DMI type 127, 4 bytes
End Of Table
[-- Attachment #3: lspci_x.txt --]
[-- Type: text/plain, Size: 26067 bytes --]
00:00.0 Host bridge: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DMI2 (rev 02)
00: 86 80 00 2f 00 04 10 00 02 00 00 06 10 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00
30: 00 00 00 00 90 00 00 00 00 00 00 00 00 01 00 00
00:01.0 PCI bridge: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 1 (rev 02)
00: 86 80 02 2f 07 04 10 00 02 00 04 06 10 00 81 00
10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 00 00
20: f0 ff 00 00 f1 ff 01 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 12 00
00:01.1 PCI bridge: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 1 (rev 02)
00: 86 80 03 2f 07 04 10 00 02 00 04 06 10 00 81 00
10: 00 00 00 00 00 00 00 00 00 02 02 00 f0 00 00 00
20: 30 fb 30 fb f1 ff 01 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 12 00
00:03.0 PCI bridge: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 3 (rev 02)
00: 86 80 08 2f 07 04 10 00 02 00 04 06 10 00 01 00
10: 00 00 00 00 00 00 00 00 00 03 03 00 e0 e0 00 00
20: 00 fa 00 fb 01 e0 f1 f1 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 12 00
00:05.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Address Map, VTd_Misc, System Management (rev 02)
00: 86 80 28 2f 00 00 10 00 02 00 80 08 10 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
00:05.1 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Hot Plug (rev 02)
00: 86 80 29 2f 00 00 10 00 02 00 80 08 10 00 00 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
00:05.2 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 RAS, Control Status and Global Errors (rev 02)
00: 86 80 2a 2f 00 00 10 00 02 00 80 08 10 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00
00:05.4 PIC: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 I/O APIC (rev 02)
00: 86 80 2c 2f 06 00 10 00 02 20 00 08 10 00 80 00
10: 00 90 41 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 00 00
30: 00 00 00 00 44 00 00 00 00 00 00 00 00 00 00 00
00:14.0 USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB xHCI (rev 05)
00: 86 80 31 8c 06 00 90 02 05 30 03 0c 00 00 00 00
10: 04 00 40 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30: 00 00 00 00 70 00 00 00 00 00 00 00 ff 04 00 00
00:1a.0 USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #2 (rev 05)
00: 86 80 2d 8c 06 00 90 02 05 20 03 0c 00 00 00 00
10: 00 80 41 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 03 00 00
00:1b.0 Audio device: Intel Corporation 8 Series/C220 Series Chipset High Definition Audio Controller (rev 05)
00: 86 80 20 8c 06 04 10 00 05 00 03 04 10 00 00 00
10: 04 00 41 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00
00:1c.0 PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #1 (rev d5)
00: 86 80 10 8c 07 04 10 00 d5 00 04 06 10 00 81 00
10: 00 00 00 00 00 00 00 00 00 04 04 00 10 10 00 00
20: 00 90 10 90 21 90 31 90 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 12 00
00:1c.3 PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #4 (rev d5)
00: 86 80 16 8c 07 04 10 00 d5 00 04 06 10 00 81 00
10: 00 00 00 00 00 00 00 00 00 05 05 00 d0 d0 00 00
20: 20 fb 20 fb 11 f2 11 f2 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 04 12 00
00:1c.4 PCI bridge: Intel Corporation 8 Series/C220 Series Chipset Family PCI Express Root Port #5 (rev d5)
00: 86 80 18 8c 07 04 10 00 d5 00 04 06 10 00 81 00
10: 00 00 00 00 00 00 00 00 00 06 06 00 c0 c0 00 00
20: 10 fb 10 fb f1 ff 01 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 12 00
00:1d.0 USB controller: Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #1 (rev 05)
00: 86 80 26 8c 06 00 90 02 05 20 03 0c 00 00 00 00
10: 00 70 41 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 03 00 00
00:1f.0 ISA bridge: Intel Corporation B85 Express LPC Controller (rev 05)
00: 86 80 50 8c 07 00 10 02 05 00 01 06 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00
00:1f.2 SATA controller: Intel Corporation 8 Series/C220 Series Chipset Family 6-port SATA Controller 1 [AHCI mode] (rev 05)
00: 86 80 02 8c 07 04 b0 02 05 01 06 01 00 00 00 00
10: 71 f0 00 00 61 f0 00 00 51 f0 00 00 41 f0 00 00
20: 21 f0 00 00 00 60 41 fb 00 00 00 00 86 80 70 72
30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 00 00
00:1f.3 SMBus: Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller (rev 05)
00: 86 80 22 8c 03 00 80 02 05 00 05 0c 00 00 00 00
10: 04 50 41 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 01 f0 00 00 00 00 00 00 00 00 00 00 86 80 70 72
30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 03 00 00
02:00.0 Non-Volatile memory controller: Kingston Technology Company, Inc. Device 502b (rev 01)
00: 46 26 2b 50 06 05 10 00 01 02 08 01 08 00 00 00
10: 04 00 30 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 46 26 2b 50
30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 00 00
03:00.0 VGA compatible controller: NVIDIA Corporation GP106 [GeForce GTX 1060 5GB] (rev a1)
00: de 10 04 1c 07 05 10 00 a1 00 00 03 00 00 80 00
10: 00 00 00 fa 0c 00 00 e0 00 00 00 00 0c 00 00 f0
20: 00 00 00 00 01 e0 00 00 00 00 00 00 58 14 97 37
30: 00 00 00 00 60 00 00 00 00 00 00 00 ff 01 00 00
03:00.1 Audio device: NVIDIA Corporation GP106 High Definition Audio Controller (rev a1)
00: de 10 f1 10 06 01 10 00 a1 00 03 04 08 00 80 00
10: 00 00 08 fb 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 97 37
30: 00 00 00 00 60 00 00 00 00 00 00 00 ff 02 00 00
05:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8211/8411 PCI Express Gigabit Ethernet Controller (rev 09)
00: ec 10 68 81 07 04 10 00 09 00 00 02 10 00 00 00
10: 01 d0 00 00 00 00 00 00 04 00 20 fb 00 00 00 00
20: 0c 00 10 f2 00 00 00 00 00 00 00 00 ec 10 23 01
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00
06:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8852BE PCIe 802.11ax Wireless Network Controller
00: ec 10 52 b8 07 04 10 00 00 00 80 02 10 00 00 00
10: 01 c0 00 00 00 00 00 00 04 00 10 fb 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 3b 1a 70 54
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00
ff:0b.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 R3 QPI Link 0 & 1 Monitoring (rev 02)
00: 86 80 81 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 81 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0b.1 Performance counters: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 R3 QPI Link 0 & 1 Monitoring (rev 02)
00: 86 80 36 2f 00 00 00 00 02 00 01 11 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 36 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0b.2 Performance counters: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 R3 QPI Link 0 & 1 Monitoring (rev 02)
00: 86 80 37 2f 00 00 00 00 02 00 01 11 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 37 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e0 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e0 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.1 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e1 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e1 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.2 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e2 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e2 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.3 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e3 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e3 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.4 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e4 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e4 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.5 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e5 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e5 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.6 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e6 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e6 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0c.7 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers (rev 02)
00: 86 80 e7 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e7 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0f.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent (rev 02)
00: 86 80 f8 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0f.1 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent (rev 02)
00: 86 80 f9 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0f.4 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers (rev 02)
00: 86 80 fc 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e0 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0f.5 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers (rev 02)
00: 86 80 fd 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e0 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:0f.6 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers (rev 02)
00: 86 80 fe 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 e0 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:10.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 PCIe Ring Interface (rev 02)
00: 86 80 1d 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 1d 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:10.1 Performance counters: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 PCIe Ring Interface (rev 02)
00: 86 80 34 2f 00 00 00 00 02 00 01 11 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 34 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:10.5 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Scratchpad & Semaphore Registers (rev 02)
00: 86 80 1e 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 1e 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:10.6 Performance counters: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Scratchpad & Semaphore Registers (rev 02)
00: 86 80 7d 2f 00 00 00 00 02 00 01 11 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 7d 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:10.7 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Scratchpad & Semaphore Registers (rev 02)
00: 86 80 1f 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 1f 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:12.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Home Agent 0 (rev 02)
00: 86 80 a0 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 a0 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:12.1 Performance counters: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Home Agent 0 (rev 02)
00: 86 80 30 2f 00 00 00 00 02 00 01 11 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 30 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Target Address, Thermal & RAS Registers (rev 02)
00: 86 80 a8 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 a8 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.1 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Target Address, Thermal & RAS Registers (rev 02)
00: 86 80 71 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 71 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.2 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder (rev 02)
00: 86 80 aa 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 aa 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.3 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder (rev 02)
00: 86 80 ab 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 ab 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.4 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder (rev 02)
00: 86 80 ac 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 ac 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.5 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder (rev 02)
00: 86 80 ad 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 ad 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.6 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Channel 0/1 Broadcast (rev 02)
00: 86 80 ae 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:13.7 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Global Broadcast (rev 02)
00: 86 80 af 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 0 Thermal Control (rev 02)
00: 86 80 b0 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b0 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.1 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 1 Thermal Control (rev 02)
00: 86 80 b1 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b1 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.2 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 0 ERROR Registers (rev 02)
00: 86 80 b2 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b2 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.3 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 1 ERROR Registers (rev 02)
00: 86 80 b3 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b3 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.4 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1 (rev 02)
00: 86 80 bc 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.5 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1 (rev 02)
00: 86 80 bd 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.6 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1 (rev 02)
00: 86 80 be 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:14.7 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1 (rev 02)
00: 86 80 bf 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:15.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 2 Thermal Control (rev 02)
00: 86 80 b4 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b4 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:15.1 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 3 Thermal Control (rev 02)
00: 86 80 b5 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b5 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:15.2 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 2 ERROR Registers (rev 02)
00: 86 80 b6 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b6 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:15.3 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 3 ERROR Registers (rev 02)
00: 86 80 b7 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 b7 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:16.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 1 Target Address, Thermal & RAS Registers (rev 02)
00: 86 80 68 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:16.6 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Channel 2/3 Broadcast (rev 02)
00: 86 80 6e 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:16.7 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Global Broadcast (rev 02)
00: 86 80 6f 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:17.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 1 Channel 0 Thermal Control (rev 02)
00: 86 80 d0 2f 00 00 10 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:17.4 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3 (rev 02)
00: 86 80 b8 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:17.5 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3 (rev 02)
00: 86 80 b9 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:17.6 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3 (rev 02)
00: 86 80 ba 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:17.7 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3 (rev 02)
00: 86 80 bb 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:1e.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit (rev 02)
00: 86 80 98 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 98 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:1e.1 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit (rev 02)
00: 86 80 99 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 99 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:1e.2 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit (rev 02)
00: 86 80 9a 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 9a 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:1e.3 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit (rev 02)
00: 86 80 c0 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 1a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 c0 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:1e.4 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit (rev 02)
00: 86 80 9c 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 86 80 9c 2f
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:1f.0 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 VCU (rev 02)
00: 86 80 88 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
ff:1f.2 System peripheral: Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 VCU (rev 02)
00: 86 80 8a 2f 00 00 00 00 02 00 80 08 00 00 80 00
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[-- Attachment #4: lspci_vt.txt --]
[-- Type: text/plain, Size: 7535 bytes --]
-+-[0000:00]-+-00.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DMI2
| +-01.0-[01]--
| +-01.1-[02]----00.0 Kingston Technology Company, Inc. Device 502b
| +-03.0-[03]--+-00.0 NVIDIA Corporation GP106 [GeForce GTX 1060 5GB]
| | \-00.1 NVIDIA Corporation GP106 High Definition Audio Controller
| +-05.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Address Map, VTd_Misc, System Management
| +-05.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Hot Plug
| +-05.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 RAS, Control Status and Global Errors
| +-05.4 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 I/O APIC
| +-14.0 Intel Corporation 8 Series/C220 Series Chipset Family USB xHCI
| +-1a.0 Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #2
| +-1b.0 Intel Corporation 8 Series/C220 Series Chipset High Definition Audio Controller
| +-1c.0-[04]--
| +-1c.3-[05]----00.0 Realtek Semiconductor Co., Ltd. RTL8111/8168/8211/8411 PCI Express Gigabit Ethernet Controller
| +-1c.4-[06]----00.0 Realtek Semiconductor Co., Ltd. RTL8852BE PCIe 802.11ax Wireless Network Controller
| +-1d.0 Intel Corporation 8 Series/C220 Series Chipset Family USB EHCI #1
| +-1f.0 Intel Corporation B85 Express LPC Controller
| +-1f.2 Intel Corporation 8 Series/C220 Series Chipset Family 6-port SATA Controller 1 [AHCI mode]
| \-1f.3 Intel Corporation 8 Series/C220 Series Chipset Family SMBus Controller
\-[0000:ff]-+-0b.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 R3 QPI Link 0 & 1 Monitoring
+-0b.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 R3 QPI Link 0 & 1 Monitoring
+-0b.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 R3 QPI Link 0 & 1 Monitoring
+-0c.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0c.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0c.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0c.3 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0c.4 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0c.5 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0c.6 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0c.7 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Unicast Registers
+-0f.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent
+-0f.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Buffered Ring Agent
+-0f.4 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers
+-0f.5 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers
+-0f.6 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 System Address Decoder & Broadcast Registers
+-10.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 PCIe Ring Interface
+-10.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 PCIe Ring Interface
+-10.5 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Scratchpad & Semaphore Registers
+-10.6 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Scratchpad & Semaphore Registers
+-10.7 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Scratchpad & Semaphore Registers
+-12.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Home Agent 0
+-12.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Home Agent 0
+-13.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Target Address, Thermal & RAS Registers
+-13.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Target Address, Thermal & RAS Registers
+-13.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder
+-13.3 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder
+-13.4 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder
+-13.5 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel Target Address Decoder
+-13.6 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Channel 0/1 Broadcast
+-13.7 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Global Broadcast
+-14.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 0 Thermal Control
+-14.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 1 Thermal Control
+-14.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 0 ERROR Registers
+-14.3 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 1 ERROR Registers
+-14.4 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1
+-14.5 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1
+-14.6 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1
+-14.7 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 0 & 1
+-15.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 2 Thermal Control
+-15.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 3 Thermal Control
+-15.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 2 ERROR Registers
+-15.3 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 0 Channel 3 ERROR Registers
+-16.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 1 Target Address, Thermal & RAS Registers
+-16.6 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Channel 2/3 Broadcast
+-16.7 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO Global Broadcast
+-17.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Integrated Memory Controller 1 Channel 0 Thermal Control
+-17.4 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3
+-17.5 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3
+-17.6 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3
+-17.7 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 DDRIO (VMSE) 2 & 3
+-1e.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit
+-1e.1 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit
+-1e.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit
+-1e.3 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit
+-1e.4 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 Power Control Unit
+-1f.0 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 VCU
\-1f.2 Intel Corporation Xeon E7 v3/Xeon E5 v3/Core i7 VCU
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