MMU problems on MPC860P

MMU problems on MPC860P

[G. Guével]

Hello,

I have a MBX MPC860 board and a montavista linux kernel 2.2.13 which works
very well.

I want to port this kernel on a MPC860P proprietary board called pLines.
I can execute my kernel init until the last execve command which launches
the sh command.
I can get my ip address from a bootp server and mount a network file system.

When the execve is run the following functions are called :
do_load_elf_binary - flush_old_exec - exec_mmap - new_page_tables -
SET_PAGE_DIR
This last function calls an asm instruction, ie "mtspr M_TWB 1DF00".
On the MBX board it is "mtspr M_TWB 1DE00".

This instruction sets the tablewalk level one base value.

If I comment this instruction, I can have the ash application which crashes
when calling other applications.
If I uncomment this instruction I have nothing.

If I add an infinitely printk loop after the mtspr, printk works during 2 to
3 s then cpu crashes.
But printk seems not to be sure while page manipulation.

Any help on this subject will be welcome.

Thanks to all
Sorry for my poor english language, je suis français.

Bye
Gerard Guevel


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: MMU problems on MPC860P

[Dan Malek]

G. Guével wrote:

> I want to port this kernel on a MPC860P proprietary board called pLines.

There aren't any software changes to required to support the 860P.  I
have a couple for testing that I use regularly.

What is the silicon revision of the part?  I think they are all fairly
new, but this sounds like a CPU6 errata, which I didn't think affected
the 860P.

For all 860 processors that use FEC (855/860 T and P), make sure you
have the FEC driver that looks at the IMMR for the silicon revision and
sets the Port D bits correctly.  These changed at some point (I don't
remember exactly, either B to C or C to D).  This doesn't cause the
problem you see here, but it will keep the FEC from working properly.

You may just want to hop over to the MontaVista web site and use the
2.2.14 kernel from CDK 1.2.


	-- Dan

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

MMU problems on MPC860P

[G. Guivel]

Dan wrote:
> You may just want to hop over to the MontaVista web site and use the
2.2.14 kernel from CDK 1.2.


I made a new kernel from cllf(rpxclassic) board with MPC860T.

I have the same problems than with the 2.2.13 kernel.

It seems that Linux does not clear all mmu registers.

Which registers must be cleared by the previous monitor ?

I use my personal monitor which does not deal with mmu.

I don't know if EPPC-BUG makes some special actions before
loading Linux loader.

If you have some idea.

Thanks

Gerard


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: MMU problems on MPC860P

[Dan Malek]

G. Guével wrote:

> I made a new kernel from cllf(rpxclassic) board with MPC860T.

Well, as I recall, you have a custom board.  The CLLF (or any other)
configuration isn't likely to work with your custom board.  What
changes did you make to the sources to support your board?

> It seems that Linux does not clear all mmu registers.

Yes, I believe it configures everything properly.

> Which registers must be cleared by the previous monitor ?

None, but there are several steps the monitor has to perform
to properly initialize the processor.  Most important is the
cache initialization steps.  Linux doesn't do this, and it
really can't because you need to know these steps are done
out of reset.

> I use my personal monitor which does not deal with mmu.

That's fine.  Just make sure if the caches are used that they
are consistent with memory, especially the I-cache if you copied
instructions around.  The Linux image must be called with the
MMU disabled.

> I don't know if EPPC-BUG makes some special actions before
> loading Linux loader.

EPPC-Bug???  Where does this fit into the picture?  It is used on
the MBX board.  On the MBX we expect register 3 to have a pointer
to the board info structure...I know the MMU is disabled, but I
don't remember the cache state, except that it is consistent.

You have to build some kind of board information structure in the
arch/ppc/mbxboot/embed_config.c.  If you are using CLLF, it is
expecting to read this from serial EEPROM.  If any of the information
in here is incorrect, you will have some trouble.



	-- Dan

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

MMU problems on MPC860P

[Girard Guivel]

I had problems to port linux2.2.14 on my own board.
I thaught it was because I use a MPC860P and not MPC860 or MPC860T.

My mistake was to map IMMR to 0x50000000.
IMMR must be mapped over 0x80000000 (like 0xFA200000)
because Linux uses 2Gb of virtual ram.

So linux2.2.14 works fine on a MPC860P.

Thanks to Dan for his help and ideas.


Gerard


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/