From mboxrd@z Thu Jan 1 00:00:00 1970 Reply-To: From: "John Zhou" To: "'linuxppc-embedded'" Subject: About cache of MPC82xx Date: Mon, 2 Feb 2004 14:01:28 +0800 Message-ID: <000601c3e952$0040c260$b702a8c0@newrock2> MIME-Version: 1.0 In-Reply-To: <8039970AF146314597457D3B51A68B382E048F@cossmgmbx02.email.corp.tld> Content-Type: text/plain; charset="iso-8859-1" Sender: owner-linuxppc-embedded@lists.linuxppc.org List-Id: Dear All, about cache of MPC82xx, which components can be cacheable? I know SDRAM can be used for cacheable memory. Can internal RAM of CPU be used for cacheable memory? do you know which document describe this feature? Thanks in advance! John ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/