* mpc5200 and ddr
@ 2004-08-25 14:59 Andrey Volkov
[not found] ` <412CBFCD.1000001@246tNt.com>
2004-08-26 11:52 ` Mark Chambers
0 siblings, 2 replies; 5+ messages in thread
From: Andrey Volkov @ 2004-08-25 14:59 UTC (permalink / raw)
To: David Wolfe; +Cc: linuxppc-embedded
Hello David,
Are you know where I could get example/datasheet which explain
attachment of DDR memory to mpc5200.
Best of all, if it would be part of
schematic. Because UM/TM/APP notes, which I found on freescale
site are VERY foggy about DDR.
--
Best regards,
Andrey Volkov
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread[parent not found: <412CBFCD.1000001@246tNt.com>]
* Re[2]: mpc5200 and ddr
[not found] ` <412CBFCD.1000001@246tNt.com>
@ 2004-08-25 16:52 ` Andrey Volkov
2004-08-26 0:55 ` Andrew Dennison
0 siblings, 1 reply; 5+ messages in thread
From: Andrey Volkov @ 2004-08-25 16:52 UTC (permalink / raw)
To: Sylvain Munaut; +Cc: linuxppc-embedded
Hello Sylvain,
Wednesday, August 25, 2004, 8:35:25 PM, you wrote:
> Hi,
> Sorry I don't have informations, but I'm interested too ;)
> I guess you just "connect" them, but I wonder about terminations ? ( or
> maybe keeping short trace is ok ? ).
Certainly - termination, time diagrams, restrictions (especially
capacitors length and likewise) etc. As I wrote before
datasheet very foggy and miserly, but may be David or somebody from freescale
enlighten me, if so, then I send info to ml.
--
Best regards,
Andrey Volkov
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread* RE: Re[2]: mpc5200 and ddr
2004-08-25 16:52 ` Re[2]: " Andrey Volkov
@ 2004-08-26 0:55 ` Andrew Dennison
0 siblings, 0 replies; 5+ messages in thread
From: Andrew Dennison @ 2004-08-26 0:55 UTC (permalink / raw)
To: 'Andrey Volkov', 'Sylvain Munaut'; +Cc: linuxppc-embedded
> Andrey Volkov wrote:
>
> Hello Sylvain,
>
> Wednesday, August 25, 2004, 8:35:25 PM, you wrote:
>
> > Hi,
>
> > Sorry I don't have informations, but I'm interested too ;)
>
> > I guess you just "connect" them, but I wonder about
> terminations ? ( or
> > maybe keeping short trace is ok ? ).
>
>
> Certainly - termination, time diagrams, restrictions (especially
> capacitors length and likewise) etc. As I wrote before
> datasheet very foggy and miserly, but may be David or
> somebody from freescale
> enlighten me, if so, then I send info to ml.
>
Hello Andrey, Sylvain,
Micron have a tech note (TN4606) on DDR termination for point-to-point
systems. Have a look at this if you are working on a design with DDR chips
on the PCB. It appears that series termination is sufficient with short
(<50mm) track lengths. However DDR timing requires some careful attention
to layout (impedence control and track length matching) so all the
information I have found on DDR is always qualified by "simulate your
design".
My local Freescale FAE was able to supply some additional information so
maybe you can ask yours?
Andrew
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: mpc5200 and ddr
2004-08-25 14:59 mpc5200 and ddr Andrey Volkov
[not found] ` <412CBFCD.1000001@246tNt.com>
@ 2004-08-26 11:52 ` Mark Chambers
1 sibling, 0 replies; 5+ messages in thread
From: Mark Chambers @ 2004-08-26 11:52 UTC (permalink / raw)
To: Andrey Volkov; +Cc: linuxppc-embedded
>
> Hello David,
>
> Are you know where I could get example/datasheet which explain
> attachment of DDR memory to mpc5200.
>
> Best of all, if it would be part of
> schematic. Because UM/TM/APP notes, which I found on freescale
> site are VERY foggy about DDR.
>
The part of the design that is probably most important is your PCB
layout, and it's not really practical for anyone to give you a cookbook
solution for that. As to termination, the BGA package makes many
of the usual techniques unusable or even harmful. Series termination,
for instance, requires the resistors to be right next to the driver pin.
On a typical BGA layout they'll be more like half way to the DRAM
and work more like a speed bump in a road. And of course, the
bidirectional data pins can't be terminated this way.
The 5200 gives you a separate buss for SDRAM, so your best bet
is to just tell the layout guy to do that buss first. These guys take
great pride in understanding signal integrity, he (she) will know what
to do...
Mark C.
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: Re[2]: mpc5200 and ddr
@ 2004-08-26 3:28 Ho Jeffrey-r26191
0 siblings, 0 replies; 5+ messages in thread
From: Ho Jeffrey-r26191 @ 2004-08-26 3:28 UTC (permalink / raw)
To: 'Andrew Dennison', 'Andrey Volkov',
'Sylvain Munaut'
Cc: linuxppc-embedded
Have you check AN2582 which is DDR design for MPC85xx. Even thought the part used is different, most of the general DDR design rules can be find in this docu.
Regards,
Jeffrey Ho
-----Original Message-----
From: owner-linuxppc-embedded@lists.linuxppc.org [mailto:owner-linuxppc-embedded@lists.linuxppc.org] On Behalf Of Andrew Dennison
Sent: Thursday, August 26, 2004 8:56 AM
To: 'Andrey Volkov'; 'Sylvain Munaut'
Cc: linuxppc-embedded@lists.linuxppc.org
Subject: RE: Re[2]: mpc5200 and ddr
> Andrey Volkov wrote:
>
> Hello Sylvain,
>
> Wednesday, August 25, 2004, 8:35:25 PM, you wrote:
>
> > Hi,
>
> > Sorry I don't have informations, but I'm interested too ;)
>
> > I guess you just "connect" them, but I wonder about
> terminations ? ( or
> > maybe keeping short trace is ok ? ).
>
>
> Certainly - termination, time diagrams, restrictions (especially
> capacitors length and likewise) etc. As I wrote before datasheet very
> foggy and miserly, but may be David or somebody from freescale
> enlighten me, if so, then I send info to ml.
>
Hello Andrey, Sylvain,
Micron have a tech note (TN4606) on DDR termination for point-to-point systems. Have a look at this if you are working on a design with DDR chips on the PCB. It appears that series termination is sufficient with short
(<50mm) track lengths. However DDR timing requires some careful attention to layout (impedence control and track length matching) so all the information I have found on DDR is always qualified by "simulate your design".
My local Freescale FAE was able to supply some additional information so maybe you can ask yours?
Andrew
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
^ permalink raw reply [flat|nested] 5+ messages in thread
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2004-08-25 14:59 mpc5200 and ddr Andrey Volkov
[not found] ` <412CBFCD.1000001@246tNt.com>
2004-08-25 16:52 ` Re[2]: " Andrey Volkov
2004-08-26 0:55 ` Andrew Dennison
2004-08-26 11:52 ` Mark Chambers
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2004-08-26 3:28 Re[2]: " Ho Jeffrey-r26191
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