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From: "Joakim Tjernlund" <joakim.tjernlund@lumentis.se>
To: "'Matt Porter'" <mporter@kernel.crashing.org>,
	"'Wolfgang Grandegger'" <wolfgang.grandegger@bluewin.ch>
Cc: <linuxppc-embedded@lists.linuxppc.org>
Subject: RE: 405 TLB miss reduction
Date: Mon, 15 Dec 2003 12:26:39 +0100	[thread overview]
Message-ID: <002401c3c2fe$4f494730$0a01a8c0@LUMENTIS02> (raw)
In-Reply-To: <20031211104505.C26110@home.com>


> > > I've also been thinking about dynamically using large
> TLB/PTE mappings
> > > for ioremap on 405/440.
> >
> > OK, I expect not so much benefit from this measure but it
> depends on the
> > application, of course.
>
> Yes, I've seen a lot of apps with huge shared memory areas across PCI
> that can benefit from this...they used BATs on classic PPCs.

hmm, I wonder if this would be useful for systems using JFFS2/MTD?
JFFS2/MTD usually ioremaps the underlying FLASH memory, which can be
many MB.

 Jocke

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

  parent reply	other threads:[~2003-12-15 11:26 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-12-10 14:43 405 TLB miss reduction Wolfgang Grandegger
2003-12-10 16:03 ` Matt Porter
2003-12-11  9:06   ` Wolfgang Grandegger
2003-12-11 15:46     ` Dan Malek
2003-12-11 17:45     ` Matt Porter
2003-12-12  9:50       ` Wolfgang Grandegger
2003-12-15 11:26       ` Joakim Tjernlund [this message]
2003-12-10 17:08 ` Dan Malek
2003-12-11 10:37   ` Wolfgang Grandegger
2003-12-11 16:48     ` Jon Masters
2003-12-11 16:56       ` Wolfgang Grandegger
2003-12-11 17:06         ` Jon Masters
2003-12-11 17:36           ` Matt Porter
2003-12-11 16:44 ` Jon Masters

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