Linux Kernel Issue: MPC8540 Errata (CPU29)

Linux Kernel Issue: MPC8540 Errata (CPU29)

[Chiradeep Vittal]

We're running Linux Kernel 2.4.26 on an 8540 ADS derivative. We're
seeing an=20
"illegal instruction"  (SIGILL) exception under some circumstances=20
(during a pthread_create call). We were wondering if this could be a
symptom of=20
CPU29 and if there is a patch available for CPU29.

"CPU29 L1 instruction cache gets multiple entries for same line after
change=20
in MSR[IS] bit "

www.freescale.com/files/32bit/doc/errata/MPC8540CE.pdf


Thanks
--
Chiradeep Vittal
Matisse Networks Inc.=20

Re: Linux Kernel Issue: MPC8540 Errata (CPU29)

[Kumar Gala]

On Apr 27, 2005, at 12:46 PM, Chiradeep Vittal wrote:

> We're running Linux Kernel 2.4.26 on an 8540 ADS derivative. We're
>  seeing an
> "illegal instruction"=A0 (SIGILL) exception under some circumstances
> (during a pthread_create call). We were wondering if this could be a
> symptom of
> CPU29 and if there is a patch available for CPU29.
>
> "CPU29 L1 instruction cache gets multiple entries for same line after
>  change
> in MSR[IS] bit "
>
> www.freescale.com/files/32bit/doc/errata/MPC8540CE.pdf

The way the Linux kernel manages the MMU on e500 it doesn't actually=20
ever modify MSR[IS] or MSR[DS].  They are always zero so I dont believe=20=

you are hitting this errata.

Are you running with math emulation turned on?  Do you know what the=20
instruction is that causes the SIGILL?

- kumar

How to use SPE on MPC8541

[Gérard Guével]

Hi,

I am running a Linux 2.6.9 on a MPC8541 custom board.

I would like to run a user application which contains
some SPE code extracted from a freescale library.

I compiled the kernel with the CONFIG_SPE set to yes.
The application also compiles and I can run it on the
board.

But it seems the SPE bit from the MSR register
is not set when the process runs.

I tried to use a call to the enable_kernel_spe function
to force the bit, but it is always erased by the kernel (??)
when scheduling task and never set again.

Must I compile the application with some special flags
to instruct the kernel I want to use SPE ?

Thanks for any idea
Gérard

Re: How to use SPE on MPC8541

[Andy Fleming]

On Sep 27, 2005, at 10:30, G=E9rard Gu=E9vel wrote:

>
> Hi,
>
> I am running a Linux 2.6.9 on a MPC8541 custom board.
>
> I would like to run a user application which contains
> some SPE code extracted from a freescale library.
>
> I compiled the kernel with the CONFIG_SPE set to yes.
> The application also compiles and I can run it on the
> board.
>
> But it seems the SPE bit from the MSR register
> is not set when the process runs.
>
> I tried to use a call to the enable_kernel_spe function
> to force the bit, but it is always erased by the kernel (??)
> when scheduling task and never set again.
>
> Must I compile the application with some special flags
> to instruct the kernel I want to use SPE ?


You say the application runs, right?  So what made you check the SPE =20
bit state?  The kernel keeps SPE disabled by default so it doesn't =20
have to save the upper 32 bits of the registers every context =20
switch.  When a process uses SPE for the first time, an exception is =20
triggered, the kernel enables SPE for that process, and then that =20
process should be able to use SPE every time it gets cpu time.

How are you determining that the SPE bit is not set?  Is your =20
application not executing the SPE instructions?

Andy

RE: How to use SPE on MPC8541

[Gérard Guével]

> You say the application runs, right?  So what made you check the SPE
> bit state?  The kernel keeps SPE disabled by default so it doesn't
> have to save the upper 32 bits of the registers every context
> switch.  When a process uses SPE for the first time, an exception is
> triggered, the kernel enables SPE for that process, and then that
> process should be able to use SPE every time it gets cpu time.
>
> How are you determining that the SPE bit is not set?  Is your
> application not executing the SPE instructions?
>
> Andy

Yes the application runs. I wrote a mini driver with an ioctl which
performs a mfmsr() call and  returns the value to the user application.
I called this ioctl at several times before and after executing SPE code.
I already tried to manually force the SPE bit with another ioctl which
performs a enable_kernel_spe() call. The bit SPE is right set at this time
but disappears later.

I don't know if using ioctls is a right way to check the bit.

Any idea ?
Thanks
Gérard

Re: How to use SPE on MPC8541

[Andy Fleming]

On Sep 27, 2005, at 12:36, G=E9rard Gu=E9vel wrote:

>
>
>
>> You say the application runs, right?  So what made you check the SPE
>> bit state?  The kernel keeps SPE disabled by default so it doesn't
>> have to save the upper 32 bits of the registers every context
>> switch.  When a process uses SPE for the first time, an exception is
>> triggered, the kernel enables SPE for that process, and then that
>> process should be able to use SPE every time it gets cpu time.
>>
>> How are you determining that the SPE bit is not set?  Is your
>> application not executing the SPE instructions?
>>
>> Andy
>>
>
> Yes the application runs. I wrote a mini driver with an ioctl which
> performs a mfmsr() call and  returns the value to the user =20
> application.
> I called this ioctl at several times before and after executing SPE =20=

> code.
> I already tried to manually force the SPE bit with another ioctl which
> performs a enable_kernel_spe() call. The bit SPE is right set at =20
> this time
> but disappears later.

Your driver runs in kernel space.  The kernel has the SPE bit off.  =20
The MSR state is process-specific.  If the code executes, the MSR bit =20=

is set.  Why do you want to see if the bit is set?

RE: How to use SPE on MPC8541

[Gérard Guével]

Andy,

> Your driver runs in kernel space.  The kernel has the SPE bit off.
> The MSR state is process-specific.  If the code executes, the
> MSR bit
> is set.  Why do you want to see if the bit is set?

OK, this is a bad idea to use a driver to check the msr register.

I don't especially want to see if the bit is set, I just want
to improve the board performance for a Linux application :-).

To check the performance, I used the Dhrystone 2.1 benchmark with
the standard glibc (strcpy, strcmp, ...) on one part, and with
the freescale SPE library on the other part (vstrcpy, vstrcmp, ...).

I already verified in the binary elf file that the right functions are
called.
When I run the benchmark, I get the same MIPS with and without SPE code.

I ran the same benchmark on the same board without OS,
with a personal pseudo glibc, I have the same MIPS as under Linux,
with the freescale library, I gain 40% of perf.

That's I want to retreive with the Linux OS.

Regards
Gérard

Re: How to use SPE on MPC8541

[Andy Fleming]

On Sep 28, 2005, at 03:02, G=E9rard Gu=E9vel wrote:

>
> Andy,
>
>
>> Your driver runs in kernel space.  The kernel has the SPE bit off.
>> The MSR state is process-specific.  If the code executes, the
>> MSR bit
>> is set.  Why do you want to see if the bit is set?
>>
>
> OK, this is a bad idea to use a driver to check the msr register.
>
> I don't especially want to see if the bit is set, I just want
> to improve the board performance for a Linux application :-).
>
> To check the performance, I used the Dhrystone 2.1 benchmark with
> the standard glibc (strcpy, strcmp, ...) on one part, and with
> the freescale SPE library on the other part (vstrcpy, vstrcmp, ...).
>
> I already verified in the binary elf file that the right functions are
> called.
> When I run the benchmark, I get the same MIPS with and without SPE =20
> code.

Hmm... This is very strange, because Dhrystone is exactly the =20
benchmark this was tested on.  How did you determine that the SPE =20
functions are called?


> I ran the same benchmark on the same board without OS,
> with a personal pseudo glibc, I have the same MIPS as under Linux,
> with the freescale library, I gain 40% of perf.
>
> That's I want to retreive with the Linux OS.

I'm not sure why you aren't seeing a performance gain, but I assure =20
you that, if SPE instructions weren't working, Dhrystone would =20
crash.  The only other possibility I can think of is that the SPE =20
versions of the functions aren't being called.=

RE: How to use SPE on MPC8541

[Gérard Guével]

> Hmm... This is very strange, because Dhrystone is exactly the
> benchmark this was tested on.  How did you determine that the SPE
> functions are called?

I prefix the strcpy and strcmp functions with a "v" in dhry21a.c and
dhry21b.c. Then I statically compile the c files with the freescale
assembly source S files and not with the library libcfsl_e500.a.

If I don't add the S files the ld fails else it succeeds.
I retreive the symbols vstr... in the binary dhrystone with readelf.
So I presume that it is the right code that is called.

> I'm not sure why you aren't seeing a performance gain, but I assure
> you that, if SPE instructions weren't working, Dhrystone would
> crash.

I confirm that if I try to run this binary without SPE in Linux kernel
I get an exception.

> The only other possibility I can think of is that the SPE
> versions of the functions aren't being called.

I don't understand what you say.
Perhaps have you a pre-compiled dhrystone for Linux 2.6
I can try and compare on my board

Thanks
Gérard

RE: How to use SPE on MPC8541

[Fillod Stephane]

Bonjour G=E9rard,

G=E9rard Gu=E9vel wrote:
>I don't especially want to see if the bit is set, I just want
>to improve the board performance for a Linux application :-).

Do you know where your CPU is spending much of its time?
It looks like a job for OProfile. Support for e500 exists in 2.6.x=20
thanks to the fine folks of Freescale. We appreciate their involvement=20
in OSS community.

>To check the performance, I used the Dhrystone 2.1 benchmark=20

I like the lmbench microbenchmark too. It depends on what profile
is your application (instruction mix, library calls, cache usage, =
paging,..)

>with the standard glibc (strcpy, strcmp, ...) on one part, and with
>the freescale SPE library on the other part (vstrcpy, vstrcmp, ...).

Will the SPE enhanced C library calls will be integrated in Glibc one =
day?=20


Regards,
Stephane

Re: How to use SPE on MPC8541

[Andy Fleming]

On Sep 28, 2005, at 03:12, Fillod Stephane wrote:

> Bonjour G=E9rard,
>
> G=E9rard Gu=E9vel wrote:
>
>> I don't especially want to see if the bit is set, I just want
>> to improve the board performance for a Linux application :-).
>>
>
> Do you know where your CPU is spending much of its time?
> It looks like a job for OProfile. Support for e500 exists in 2.6.x
> thanks to the fine folks of Freescale. We appreciate their involvement
> in OSS community.


Yeah, oprofile would probably help here.

>
>> with the standard glibc (strcpy, strcmp, ...) on one part, and with
>> the freescale SPE library on the other part (vstrcpy, vstrcmp, ...).
>>
>
> Will the SPE enhanced C library calls will be integrated in Glibc =20
> one day?
>

I don't think the glibc people integrate processor-specific changes, =20
so it's not likely.

Andy=