From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from hermes.tesbv.com (hermes.tesbv.com [213.215.41.187]) by ozlabs.org (Postfix) with ESMTP id 531BCDDE27 for ; Wed, 16 Jan 2008 20:13:57 +1100 (EST) Received: from ganga.tes (unknown [10.20.0.1]) by hermes.tesbv.com (Postfix) with ESMTP id 28A4AF4703 for ; Wed, 16 Jan 2008 09:52:19 +0100 (CET) Received: from Kanslaptop (unknown [10.20.0.41]) by ganga.tes (Postfix) with ESMTP id 5B52F5C43AF for ; Wed, 16 Jan 2008 14:16:53 +0530 (IST) From: "kannappan" To: Subject: PPC440SPe: generating PCIe INTx Date: Wed, 16 Jan 2008 14:16:44 +0530 Message-ID: <003601c8581c$55f27220$2900140a@Kanslaptop> MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_NextPart_000_0037_01C8584A.6FAAAE20" List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , This is a multi-part message in MIME format. ------=_NextPart_000_0037_01C8584A.6FAAAE20 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Hello All, I would like to know how to generate PCIe INTx interrupt from Legacy PCIe EP in PPC440SPe. Also, please clarify, Page 741 of the user manual (PPC440SPe_UM2014_V1_26.pdf) write Assert_INTx message to INT_ADDR[61:63]. Page 739, table 27-9, mentions, Assert_INTA by writing to Outbound GBIF write channel 9, A[52:59]=0x20. Whether the INT_ADDR is any addresses BAR3 / POM3 address? What is the Assert_INTx value to be written to INT_ADDR[61:63]? How do I correlate with the message code values given in PCI express system architecture? The message codes given in PCI express system architecture is as follows INTx Messages Message Code Assert_INTA 0010 0000 Assert_INTB 0010 0001 Assert_INTC 0010 0010 Assert_INTD 0010 0011 Deassert_INTA 0010 0100 Deassert_INTB 0010 0101 Deassert_INTC 0010 0110 Deassert_INTD 0010 0111 Regards, Kans. ------=_NextPart_000_0037_01C8584A.6FAAAE20 Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable

Hello All,

 

I would like to know how to generate PCIe INTx interrupt from Legacy PCIe EP in PPC440SPe.

 

Also, please clarify,

Page 741 of the user manual = (PPC440SPe_UM2014_V1_26.pdf) write Assert_INTx message to INT_ADDR[61:63].

Page 739, table 27-9, mentions, Assert_INTA by writing to Outbound GBIF write channel 9, A[52:59]=3D0x20.

 

Whether the INT_ADDR is any addresses BAR3 / POM3 = address?

What is the Assert_INTx value to be written to = INT_ADDR[61:63]?  = How do I correlate with the message code values given in PCI express system = architecture?

 

The message codes given in PCI express system = architecture is as follows

 

INTx = Messages

Message = Code

Assert_INTA

0010 = 0000

Assert_INTB

0010 = 0001

Assert_INTC

0010 0010

Assert_INTD

0010 = 0011

Deassert_INTA<= /p>

0010 = 0100

Deassert_INTB<= /p>

0010 = 0101

Deassert_INTC<= /p>

0010 = 0110

Deassert_INTD<= /p>

0010 = 0111

 

 

Regards,

Kans.

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