From: "Mark Chambers" <markc@mail.com>
To: "Song Sam" <samlinuxppc@yahoo.com.cn>,
"Li Yang-r58472" <LeoLi@freescale.com>
Cc: <linuxppc-embedded@lists.linuxppc.org>
Subject: Re: JTAG debug mechanism
Date: Fri, 13 Aug 2004 10:55:44 -0400 [thread overview]
Message-ID: <004301c48145$a072a150$0301a8c0@chuck2> (raw)
In-Reply-To: 20040813082211.34144.qmail@web15610.mail.cnb.yahoo.com
>
> But 8xx use BDM to debug CPU.So I wonder in which
> situation or chips should we use BDM and JATG and
> WHY??? For a embedded developer,he could more concern
> about this point than JATG implementation process,I
> guess.:-)
>
As I think you know, JTAG and Boundary Scan are industry standards intended
primarily for
board manufacturing purposes. Boundary Scan allows you access to the pins
on BGAs and other impossible-
to-reach pins on dense boards. The Motorola CPUs simply borrow these same
pins for debug purposes, but
the internal debug logic is not directly related to JTAG.
Motorola does not release all the information about the debug interface on
all their processors. However, the
BDM interface is well documented, and there is an open source project called
bdm4gdb.sourceforge.net, which
has the raw material for you to learn all you could want to know about bdm.
Good luck,
Mark Chambers
** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
next prev parent reply other threads:[~2004-08-13 14:55 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-08-13 5:44 JTAG debug mechanism Li Yang-r58472
2004-08-13 6:26 ` Dan Malek
2004-08-13 8:22 ` Song Sam
2004-08-13 14:55 ` Mark Chambers [this message]
2004-08-13 17:18 ` Wolfgang Denk
2004-08-14 7:53 ` Song Sam
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