From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp1.us4.outblaze.com (smtp1.us4.outblaze.com [205.158.62.78]) by ozlabs.org (Postfix) with SMTP id DC41867A77 for ; Fri, 24 Mar 2006 04:43:38 +1100 (EST) Message-ID: <00be01c64ea1$4c6e0e20$6401a8c0@CHUCK2> From: "Mark Chambers" To: "Linuxppc-Embedded \(\(E-Mail\)\)" References: <204E7000-3E88-4497-86C0-5AF786D72F75@kernel.crashing.org><4422D6E3.1010407@ovro.caltech.edu> Subject: Re: Memory mapping PCI memory region to user space Date: Thu, 23 Mar 2006 12:43:29 -0500 MIME-Version: 1.0 Content-Type: text/plain; format=flowed; charset="iso-8859-1"; reply-type=original List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , >> >> When I was testing the Yosemite board as the host, I found >> that I could set the endian flag on the mmapped page, which >> then made the PCI device registers read as 32-bit quantities >> read back with the same layout under both x86 and PPC >> hosts. > > Hmm, I guess I would handle this like how the reset of the kernel > handle is with the io routines handling the swapping. Not sure if > there is any advantage to using the endian flag. I guess if you have > something you are treating as just memory there would be. > >> So, if someone planned on using that 'feature', that would >> be a reason for writing your own mmap() implementation. >> I didn't see any option in the sysfs file for setting that >> page flag (but, I didn't look around in other sysfs files). > > There isn't a sysfs flag for the endianness page attribute since > thats a PPC book-e specific feature. We could possible expand things > to support it but, I've been trying to actively avoid using the 'E' bit. > Framebuffer applications could care about this. Also, on the MPC8247 (maybe others, but I know about this one) you can make the PCI space big- or little-endian. Seems to me this is really not an endian issue but a PCI implementation issue. PCI is actually endian-agnostic, so we're really 'fixing' the Freescale PCI implementation with endian swapping. Mark Chambers