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* AW: MVME 5100
@ 2000-12-14 15:25 Torsten Rissel
  0 siblings, 0 replies; 6+ messages in thread
From: Torsten Rissel @ 2000-12-14 15:25 UTC (permalink / raw)
  To: 'Matt Porter'; +Cc: Linuxppc-Embedded (E-Mail)


Thanks, but I have already set up a BAT to cover the area from 0xf0000000 - 0xffffffff
because everything is there on the MVME5100 - the serial ports (via the Hawk external
registers) [fef88000+], the MPIC [f3f80000+] and the PHC PCI registers [fe000000+].

The CONFIG_ADDRESS and CONFIG_DATA registers are on fe000cf8 and fe00cfc,
and still writing to the CONFIG_ADDRESS and then reading the CONFIG_DATA sometime
works and sometimes not !!!??

Torsten

-----Ursprungliche Nachricht-----
Von:	Matt Porter [SMTP:mporter@mvista.com]
Gesendet am:	Mittwoch, 13. Dezember 2000 21:41
An:	Torsten Rissel
Cc:	Linuxppc-Embedded (E-Mail)
Betreff:	Re: MVME 5100


On Wed, Dec 13, 2000 at 10:39:59PM +0100, Torsten Rissel wrote:
>
> Hi Everybody !
>
> I am trying to run Linux on an MVME5100 board. I am using PReP-style booting and
> got the boot process and some of the kernel initialization running. But I am missing any
> knowledge of other PowerPC boards or machines, so that it is relativly hard to find out
> what exactly to change. So I have a question: The MVME5100 is missing all ISA stuff.
> Is the IRQ mapping (first 16 for the 8259 and the other 16 for the MPIC) still valid ?

Might as well just use 16-31 and stick with the MPIC convention.  If
somebody else is using the 5100 with the IPMC761 then they will have
ISA and will thank you many times for not changing things.

> Also I run in a problem: the indirect mechanism for generating PCI config cycles is set
> up correctly, but the board seems to hang when reading from the CONFIG_DATA address !!!???

Make sure you have those Hawk registers covered with a BAT or PTEs.
Notice the areas covered by BATs in the MACH_prep BAT setup case in
arch/ppc/mm/init.c.

--
Matt Porter
MontaVista Software, Inc.
mporter@mvista.com

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 6+ messages in thread

* AW: MVME 5100
@ 2000-12-18 12:19 Torsten Rissel
  0 siblings, 0 replies; 6+ messages in thread
From: Torsten Rissel @ 2000-12-18 12:19 UTC (permalink / raw)
  To: 'Matt Porter'; +Cc: Linuxppc-Embedded (E-Mail)


-----Ursprungliche Nachricht-----
Von:	Matt Porter [SMTP:mporter@mvista.com]
Gesendet am:	Freitag, 15. Dezember 2000 23:38
An:	Torsten Rissel
Cc:	Linuxppc-Embedded (E-Mail)
Betreff:	Re: MVME 5100


On Thu, Dec 14, 2000 at 04:25:55PM +0100, Torsten Rissel wrote:
> Thanks, but I have already set up a BAT to cover the area from 0xf0000000 - 0xffffffff
> because everything is there on the MVME5100 - the serial ports (via the Hawk external
> registers) [fef88000+], the MPIC [f3f80000+] and the PHC PCI registers [fe000000+].

Right, I have one as well as a similar Hawk-based board that has Linux
on it.

> The CONFIG_ADDRESS and CONFIG_DATA registers are on fe000cf8 and fe00cfc,
> and still writing to the CONFIG_ADDRESS and then reading the CONFIG_DATA sometime
> works and sometimes not !!!??

I can consistently read from and write to config space on my 5100 board
via PPCBUG.  The only thing I can think of is that you have somehow
locked up the Hawk bridge.  I've managaged this on other host bridges
only by getting a PIB locked up and squatting on the bus.

[Torsten Rissel]  I never saw any problem with PPCBUG neither, still, during kernel startup
it sometimes works and sometimes not. Now it works a little bit better, because I found out
that the BAT configuration constructed in mapin_ram() didn't work properly.

What kernel version are you using as a basis for your port?  Are you
basing the port off the existing prep_*.c support?

[Torsten Rissel]  I've downloaded linuxppc-2-2-snap-tar.gz from fsmlabs (It's my first try with
linux on PowerPCs, so I just took more or less the first I read about).
And, yes, I set CONFIG_6xx, CONFIG_PPC, CONFIG_PREP and one I invented (CONFIG_MVME51xx).
I use PREP-style network boot from PPCBUG. In the moment I try to get the eepro100 driver
working, because I want to use a root-fs on NFS.

[Torsten Rissel]  Regards, Torsten

--
Matt Porter
MontaVista Software, Inc.
mporter@mvista.com

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 6+ messages in thread

* AW: MVME 5100
@ 2000-12-18 16:50 Torsten Rissel
  2000-12-18 18:24 ` Gabriel Paubert
  0 siblings, 1 reply; 6+ messages in thread
From: Torsten Rissel @ 2000-12-18 16:50 UTC (permalink / raw)
  To: 'Gabriel Paubert', Matt Porter; +Cc: Linuxppc-Embedded (E-Mail)


-----Ursprungliche Nachricht-----
Von:	Gabriel Paubert [SMTP:paubert@iram.es]
Gesendet am:	Montag, 18. Dezember 2000 16:35
An:	Matt Porter
Cc:	Torsten Rissel; Linuxppc-Embedded (E-Mail)
Betreff:	Re: MVME 5100


On the MVME2400 (and older Raven/Falcon based boards) the config space by
default is at 0x80000cf8 and 0x8000cfc. Does it mean that on the MVME5100,
the Hawk is reprogrammed by PPCBUG to look like a CHRP system ?

	Regards,
	Gabriel.

[Torsten Rissel]  As I said, this is my first adventure in the wonderful world of PowerPC's,
but you can judge yourself by a listing of the residual data, as passed over by PPCBUG:

PPC6-Bug>nbo
Network Booting from: I82559, Controller 0, Device 0
Device Name: /pci@fe000000/pci8086,1209@e,0:0,0
Loading: /tftpboot/zImage

Client IP Address      = 192.168.169.2
Server IP Address      = 192.168.169.1
Gateway IP Address     = 192.168.169.1
Subnet IP Address Mask = 255.255.255.0
Boot File Name         = /tftpboot/zImage
Argument File Name     =

Network Boot File load in progress... To abort hit <BREAK>

Bytes Received =&684130, Bytes Loaded =&684130
Bytes/Second   =&684130, Elapsed Time =1 Second(s)

Residual-Data Located at: $03F9077C
loaded at:     00005400 0001C220
relocated to:  00800000 00816E20
board data at: 03F9077C 03F97188
relocated to:  00810314 00816D20
zimage at:     00010400 000AA3BF
relocated to:  00817000 008B0FBF
avail ram:     00400000 00800000

Linux/PPC load: console=ttyS0,9600 console=tty0 root=/dev/nfs ip=192.168.169.2:192.168.169.1:192.168.169.1:255.255.255.0:mvme5100:eth0
Uncompressing Linux...done.
Now booting the kernel
PReP architecture
Total memory = 64MB; using 256kB for hash table (at c01c0000)
Linux version 2.2.18pre23 (root@linux) (gcc version 2.95.2 19991024 (release)) #319 Mon Dec 18 17:34:25 CET 2000
Boot arguments: console=ttyS0,9600 console=tty0 root=/dev/nfs ip=192.168.169.2:192.168.169.1:192.168.169.1:255.255.255.0:mvme5100:eth0
Residual: 13 devices
ProcBus Device, Bus 0, BUID 0:  IBM000A, MemoryController, RAM, GeneralRAM
  No packets describing possible resources.
  No packets describing compatible resources.
ProcBus Device, Bus 0, BUID 0:  IBM0007, SystemPeripheral, L2Cache, StoreInEnabled
  Packets describing allocated resources:
    0 K CopyBack DirectMapped L2 cache, 32/32 bytes line/sector size
  No packets describing possible resources.
  No packets describing compatible resources.
ProcBus Device, Bus 0, BUID 0:  PNP0A03, BridgeController, PCIBridge, PCIBridgeIndirect
  Packets describing allocated resources:
    I/O address (16 bits), at 0xcf8 size 0x8 bytes
    Chip identification: MOT3131
    PCI Bridge parameters
      ConfigBaseAddress fe000cf8
      ConfigBaseData fe000cfc
      Bus number 0
      PCI Slot 1 DevFunc 0x80 interrupt line(s) A/B/C/D routed to MPIC line(s) 9(L)/10(L)/11(L)/12(L)
      PCI Slot 2 DevFunc 0x88 interrupt line(s) A/B/C/D routed to MPIC line(s) 12(L)/9(L)/10(L)/11(L)
      Integrated PCI device DevFunc 0x68 interrupt line(s) A/B/C/D routed to MPIC line(s) 5(L)/6(L)/7(L)/8(L)
    Bus speed 33333036 Hz, 2 slot(s)
    Bridge address translation, positive decoding:
      Processor  Bus        Size       Conversion Translation
      0x80000000 0x80000000 0x3d000000 Bus Memory direct
    Bridge address translation, positive decoding:
      Processor  Bus        Size       Conversion Translation
      0xfe000000 0x00000000 0x00010000 Bus I/O direct
    Bridge address translation, positive decoding:
      Processor  Bus        Size       Conversion Translation
      0xfe010000 0x00800000 0x007f0000 Bus I/O direct
    Bridge address translation, positive decoding:
      Processor  Bus        Size       Conversion Translation
      0x00000000 0x00000000 0x80000000 DMA direct
  No packets describing possible resources.
  No packets describing compatible resources.
PCI Device, Bus 0, DevFunc 0x0: IBM000D, SystemPeripheral, ProgrammableInterruptController, MPIC
  Packets describing allocated resources:
    Memory address (32 bits), at 0xf3f80000 size 0x40000 bytes
  No packets describing possible resources.
  No packets describing compatible resources.
PCI Device, Bus 0, DevFunc 0x68: MOT3101, BridgeController, VMEBridge, GeneralVMEBridge
  Packets describing allocated resources:
    Chip identification: MOT3101
    Bus speed 33333036 Hz, 255 slot(s)
  No packets describing possible resources.
  No packets describing compatible resources.
PCI Device, Bus 0, DevFunc 0x70: DPI8086, NetworkInterfaceController, EthernetController, GeneralEther
  No packets describing allocated resources.
  No packets describing possible resources.
  No packets describing compatible resources.
PCI Device, Bus 0, DevFunc 0x98: DPI8086, NetworkInterfaceController, EthernetController, GeneralEther
  No packets describing allocated resources.
  No packets describing possible resources.
  No packets describing compatible resources.
ProcBus Device, Bus 0, BUID 0:  MOT3F00, SystemPeripheral, SystemPlanar, GeneralSystemPlanar
  Packets describing allocated resources:
    Chip identification: MOT3F0E
  No packets describing possible resources.
  No packets describing compatible resources.
ISA Device, Slot 0, LogicalDev 0: IBM0008, SystemPeripheral, NVRAM, IndirectNVRAM
  Packets describing allocated resources:
    Variable (16 decoded bits) I/O port
      from 0x80c8 to 0x80c8, alignment 1, 2 ports
    Variable (16 decoded bits) I/O port
      from 0x80d8 to 0x80d8, alignment 1, 1 ports
  No packets describing possible resources.
  No packets describing compatible resources.
ISA Device, Slot 0, LogicalDev 0: PNP0B00, SystemPeripheral, RealTimeClock, interface 129
  Packets describing allocated resources:
    Variable (16 decoded bits) I/O port
      from 0x80c8 to 0x80c8, alignment 1, 2 ports
    Variable (16 decoded bits) I/O port
      from 0x80d8 to 0x80d8, alignment 1, 1 ports
    Chip identification: MOT3040
    Small vendor item type 0x00, data (hex): 01 f8 1f 00 00
  No packets describing possible resources.
  No packets describing compatible resources.
ProcBus Device, Bus 0, BUID 0:  IBM000B, SystemPeripheral, OperatorPanel, interface 129
  Packets describing allocated resources:
    System address (32 bits), at 0xfe0008c0 size 0x2 bytes
    Chip identification: MOT3000
  No packets describing possible resources.
  No packets describing compatible resources.
ISA Device, Slot 0, LogicalDev 0: PNP0501, CommunicationsDevice, RS232Device, NS398SerPort
  Packets describing allocated resources:
    IRQ Mask 0x0010, high edge sensitive
    I/O address (11 bits), at 0x3f8 size 0x8 bytes
  Packets describing possible resources:
    IRQ Mask 0x0010, high edge sensitive
    I/O address (11 bits), at 0x3f8 size 0x8 bytes
    IRQ Mask 0x0008, high edge sensitive
    I/O address (11 bits), at 0x2f8 size 0x8 bytes
    IRQ Mask 0x0010, high edge sensitive
    I/O address (11 bits), at 0x220 size 0x8 bytes
    IRQ Mask 0x0010, high edge sensitive
    I/O address (11 bits), at 0x2e8 size 0x8 bytes
    IRQ Mask 0x0010, high edge sensitive
    I/O address (11 bits), at 0x338 size 0x8 bytes
    IRQ Mask 0x0010, high edge sensitive
    I/O address (11 bits), at 0x3e8 size 0x8 bytes
    IRQ Mask 0x0008, high edge sensitive
    I/O address (11 bits), at 0x2e8 size 0x8 bytes
    IRQ Mask 0x0008, high edge sensitive
    I/O address (11 bits), at 0x238 size 0x8 bytes
    IRQ Mask 0x0008, high edge sensitive
    I/O address (11 bits), at 0x2e0 size 0x8 bytes
    IRQ Mask 0x0008, high edge sensitive
    I/O address (11 bits), at 0x228 size 0x8 bytes
  No packets describing compatible resources.
ISA Device, Slot 0, LogicalDev 0: IBM000B, SystemPeripheral, OperatorPanel, interface 131
  Packets describing allocated resources:
    IRQ Mask 0x0100, low edge sensitive
    Chip identification: MOT3001
  No packets describing possible resources.
  No packets describing compatible resources.
OpenPIC Version 1.3 (2 CPUs and 16 IRQ sources) at f3f80000
OpenPIC timer frequency is 4166640 Hz
time_init: decrementer frequency = 1044544800/60 (16MHz)
Memory: 62828k available (1076k kernel code, 1564k data, 68k init) [c0000000,c4000000]
Dentry hash table entries: 8192 (order 4, 64k)
Buffer cache hash table entries: 65536 (order 6, 256k)
Page cache hash table entries: 16384 (order 4, 64k)
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware
Linux NET4.0 for Linux 2.2
Based upon Swansea University Computer Society NET3.039
NET4: Unix domain sockets 1.0 for Linux NET4.0.
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
TCP: Hash tables configured (ehash 65536 bhash 65536)
Starting kswapd v 1.5
Serial driver version 4.27 with no serial options enabled
pty: 256 Unix98 ptys configured
RAM disk driver initialized:  16 RAM disks of 4096K size
loop: registered device at major 7
scsi : 0 hosts.
scsi : detected total.
Found Intel i82557 PCI Speedo at I/O 0x77efc0, IRQ 0.
  PCI latency timer (CFLT) is 0x80.
eepro100.c:v1.09j-t 9/29/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html
eepro100.c: $Revision: 1.20.2.10 $ 2000/05/31 Modified by Andrey V. Savochkin <saw@saw.sw.com.sg> and others
eepro100.c: VA Linux custom, Dragan Stancevic <visitor@valinux.com> 2000/11/15
eth0: Intel PCI EtherExpress Pro100 82559ER, 00:01:AF:01:7A:1D, I/O at 0x77efc0, IRQ 0.
  Board assembly 000000-000, Physical connectors present:
  Primary interface chip None PHY #1.
  General self-test: passed.
  Serial sub-system self-test: passed.
  Internal registers self-test: passed.
  ROM checksum self-test: passed (0x1d68d8db).
  Receiver lock-up workaround activated.
Found Intel i82557 PCI Speedo at I/O 0x77ef80, IRQ 0.
  PCI latency timer (CFLT) is 0x80.
eth1: Intel PCI EtherExpress Pro100 82559ER, 00:01:AF:01:7A:1E, I/O at 0x77ef80, IRQ 0.
  Board assembly 000000-000, Physical connectors present:
  Primary interface chip None PHY #1.
  General self-test: passed.
  Serial sub-system self-test: passed.
  Internal registers self-test: passed.
  ROM checksum self-test: passed (0x1d68d8db).
  Receiver lock-up workaround activated.
eepro100.c:v1.09j-t 9/29/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html
eepro100.c: $Revision: 1.20.2.10 $ 2000/05/31 Modified by Andrey V. Savochkin <saw@saw.sw.com.sg> and others
eepro100.c: VA Linux custom, Dragan Stancevic <visitor@valinux.com> 2000/11/15
IP-Config: Complete:
     if=eth0, addr=192.168.169.2, mask=255.255.255.0, gw=192.168.169.1,
     host=mvme5100, domain=, nis-domain=(none),
     bootserver=192.168.169.1, rootserver=192.168.169.1, rootpath=
Looking up port of RPC 100003/2 on 192.168.169.1
neighbour table overflow

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: AW: MVME 5100
  2000-12-18 16:50 Torsten Rissel
@ 2000-12-18 18:24 ` Gabriel Paubert
  0 siblings, 0 replies; 6+ messages in thread
From: Gabriel Paubert @ 2000-12-18 18:24 UTC (permalink / raw)
  To: Torsten Rissel; +Cc: Matt Porter, Linuxppc-Embedded (E-Mail)


On Mon, 18 Dec 2000, Torsten Rissel wrote:

> [Torsten Rissel]  As I said, this is my first adventure in the wonderful world of PowerPC's,
> but you can judge yourself by a listing of the residual data, as passed over by PPCBUG:

Yes, thanks....

> ProcBus Device, Bus 0, BUID 0:  PNP0A03, BridgeController, PCIBridge, PCIBridgeIndirect
>   Packets describing allocated resources:
>     I/O address (16 bits), at 0xcf8 size 0x8 bytes
>     Chip identification: MOT3131
>     PCI Bridge parameters
>       ConfigBaseAddress fe000cf8
>       ConfigBaseData fe000cfc
>       Bus number 0
>       PCI Slot 1 DevFunc 0x80 interrupt line(s) A/B/C/D routed to MPIC line(s) 9(L)/10(L)/11(L)/12(L)
>       PCI Slot 2 DevFunc 0x88 interrupt line(s) A/B/C/D routed to MPIC line(s) 12(L)/9(L)/10(L)/11(L)
>       Integrated PCI device DevFunc 0x68 interrupt line(s) A/B/C/D routed to MPIC line(s) 5(L)/6(L)/7(L)/8(L)

The first two lines are the PMC modules and the last one the Universe.
Motorola forgot to put the routing for the network interfaces, what's the
point of residual data if you don't even get the interrupt routing correct
(something probably absolutely trivial to add).

>     Bus speed 33333036 Hz, 2 slot(s)
>     Bridge address translation, positive decoding:
>       Processor  Bus        Size       Conversion Translation
>       0x80000000 0x80000000 0x3d000000 Bus Memory direct
>     Bridge address translation, positive decoding:
>       Processor  Bus        Size       Conversion Translation
>       0xfe000000 0x00000000 0x00010000 Bus I/O direct
>     Bridge address translation, positive decoding:
>       Processor  Bus        Size       Conversion Translation
>       0xfe010000 0x00800000 0x007f0000 Bus I/O direct
>     Bridge address translation, positive decoding:
>       Processor  Bus        Size       Conversion Translation
>       0x00000000 0x00000000 0x80000000 DMA direct

Looks like CHRP, DMA addresses are not translated (contrary to what I said
in previous email, sorry I misread the last line), mmio is transparent but
looks limited to less than 1 Gb (0x80000000-0xbd000000), unless the
residual data is wrong which is still a possibility (I still have to see a
100% correct residual data, even trivial things are often obviously wrong
and I have strong suspiscions that this is the case here, since otherwise
the OpenPIC at 0xf3f80000 would not even be accessible).

The only way to know for sure is to dump the Hawk registers in the
0xfeff0040 range (MD feff0040) and the PCI config space of the host bridge
(VER ;E should work, I just need the line at 0x80 for the first device).



>   No packets describing possible resources.
>   No packets describing compatible resources.
> PCI Device, Bus 0, DevFunc 0x0: IBM000D, SystemPeripheral, ProgrammableInterruptController, MPIC
>   Packets describing allocated resources:
>     Memory address (32 bits), at 0xf3f80000 size 0x40000 bytes
>   No packets describing possible resources.
>   No packets describing compatible resources.
> PCI Device, Bus 0, DevFunc 0x68: MOT3101, BridgeController, VMEBridge, GeneralVMEBridge
>   Packets describing allocated resources:
>     Chip identification: MOT3101
>     Bus speed 33333036 Hz, 255 slot(s)
>   No packets describing possible resources.
>   No packets describing compatible resources.
> PCI Device, Bus 0, DevFunc 0x70: DPI8086, NetworkInterfaceController, EthernetController, GeneralEther
>   No packets describing allocated resources.
>   No packets describing possible resources.
>   No packets describing compatible resources.
> PCI Device, Bus 0, DevFunc 0x98: DPI8086, NetworkInterfaceController, EthernetController, GeneralEther
>   No packets describing allocated resources.
>   No packets describing possible resources.
>   No packets describing compatible resources.

No interrupt routing for these 2 in the earlier part. That's likely the
problem as explained.

> ProcBus Device, Bus 0, BUID 0:  MOT3F00, SystemPeripheral, SystemPlanar, GeneralSystemPlanar
>   Packets describing allocated resources:
>     Chip identification: MOT3F0E
>   No packets describing possible resources.
>   No packets describing compatible resources.
> ISA Device, Slot 0, LogicalDev 0: IBM0008, SystemPeripheral, NVRAM, IndirectNVRAM
>   Packets describing allocated resources:
>     Variable (16 decoded bits) I/O port
>       from 0x80c8 to 0x80c8, alignment 1, 2 ports
>     Variable (16 decoded bits) I/O port
>       from 0x80d8 to 0x80d8, alignment 1, 1 ports

Muddy definition of I/O port, these are on the X bus of the Hawk, not an
ISA device. Once again residual data is only half right...


>   No packets describing possible resources.
>   No packets describing compatible resources.
> ISA Device, Slot 0, LogicalDev 0: PNP0B00, SystemPeripheral, RealTimeClock, interface 129
>   Packets describing allocated resources:
>     Variable (16 decoded bits) I/O port
>       from 0x80c8 to 0x80c8, alignment 1, 2 ports
>     Variable (16 decoded bits) I/O port
>       from 0x80d8 to 0x80d8, alignment 1, 1 ports

Same remark since it is the same chip as the NVRAM.

>     Chip identification: MOT3040
>     Small vendor item type 0x00, data (hex): 01 f8 1f 00 00

I thought that this means that the RTC is at offset 0x1ff8 in the NVRAM
but this is wrong for this particular model (straight copy from the
machines which have 8kB NVRAM, the 5100 has 32 kB).

>   No packets describing possible resources.
>   No packets describing compatible resources.
> ProcBus Device, Bus 0, BUID 0:  IBM000B, SystemPeripheral, OperatorPanel, interface 129
>   Packets describing allocated resources:
>     System address (32 bits), at 0xfe0008c0 size 0x2 bytes
>     Chip identification: MOT3000
>   No packets describing possible resources.
>   No packets describing compatible resources.
> ISA Device, Slot 0, LogicalDev 0: PNP0501, CommunicationsDevice, RS232Device, NS398SerPort
>   Packets describing allocated resources:
>     IRQ Mask 0x0010, high edge sensitive
>     I/O address (11 bits), at 0x3f8 size 0x8 bytes

Do you have an PMC761 or not ? This is the COM1 behind an ISA bridge.
Probably again a residual data approximation...

> ISA Device, Slot 0, LogicalDev 0: IBM000B, SystemPeripheral, OperatorPanel, interface 131
>   Packets describing allocated resources:
>     IRQ Mask 0x0100, low edge sensitive
>     Chip identification: MOT3001
>   No packets describing possible resources.
>   No packets describing compatible resources.

The abort switch !

> OpenPIC Version 1.3 (2 CPUs and 16 IRQ sources) at f3f80000
> OpenPIC timer frequency is 4166640 Hz
> time_init: decrementer frequency = 1044544800/60 (16MHz)
> Memory: 62828k available (1076k kernel code, 1564k data, 68k init) [c0000000,c4000000]
> Dentry hash table entries: 8192 (order 4, 64k)
> Buffer cache hash table entries: 65536 (order 6, 256k)
> Page cache hash table entries: 16384 (order 4, 64k)
> POSIX conformance testing by UNIFIX
> PCI: Probing PCI hardware
> Linux NET4.0 for Linux 2.2
> Based upon Swansea University Computer Society NET3.039
> NET4: Unix domain sockets 1.0 for Linux NET4.0.
> NET4: Linux TCP/IP 1.0 for NET4.0
> IP Protocols: ICMP, UDP, TCP
> TCP: Hash tables configured (ehash 65536 bhash 65536)
> Starting kswapd v 1.5
> Serial driver version 4.27 with no serial options enabled
> pty: 256 Unix98 ptys configured
> RAM disk driver initialized:  16 RAM disks of 4096K size
> loop: registered device at major 7
> scsi : 0 hosts.
> scsi : detected total.
> Found Intel i82557 PCI Speedo at I/O 0x77efc0, IRQ 0.

You have some interrupt routing problem, I have code to assign interrupts
from residual data is in my patches at ftp://vlab1.iram.es but it won't
help in this case since I've note seen any code telling where the
interrupts from PCI devfn 0x70 and 0x98 are connected.

>   PCI latency timer (CFLT) is 0x80.
> eepro100.c:v1.09j-t 9/29/99 Donald Becker http://cesdis.gsfc.nasa.gov/linux/drivers/eepro100.html
> eepro100.c: $Revision: 1.20.2.10 $ 2000/05/31 Modified by Andrey V. Savochkin <saw@saw.sw.com.sg> and others
> eepro100.c: VA Linux custom, Dragan Stancevic <visitor@valinux.com> 2000/11/15
> eth0: Intel PCI EtherExpress Pro100 82559ER, 00:01:AF:01:7A:1D, I/O at 0x77efc0, IRQ 0.
>   Board assembly 000000-000, Physical connectors present:
>   Primary interface chip None PHY #1.
>   General self-test: passed.
>   Serial sub-system self-test: passed.
>   Internal registers self-test: passed.
>   ROM checksum self-test: passed (0x1d68d8db).
>   Receiver lock-up workaround activated.
> Found Intel i82557 PCI Speedo at I/O 0x77ef80, IRQ 0.


	Regards,
	Gabriel.


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 6+ messages in thread

* AW: MVME 5100
@ 2000-12-18 18:44 Torsten Rissel
  2000-12-18 19:07 ` Gabriel Paubert
  0 siblings, 1 reply; 6+ messages in thread
From: Torsten Rissel @ 2000-12-18 18:44 UTC (permalink / raw)
  To: 'Gabriel Paubert', Matt Porter
  Cc: Torsten Rissel, Linuxppc-Embedded (E-Mail)


???

So would it be better to use the CHRP settings to build a kernel for the MVME5100 ?

Torsten

-----Ursprungliche Nachricht-----
Von:	Gabriel Paubert [SMTP:paubert@iram.es]
Gesendet am:	Montag, 18. Dezember 2000 19:08
An:	Matt Porter
Cc:	Torsten Rissel; Linuxppc-Embedded (E-Mail)
Betreff:	Re: MVME 5100



On Mon, 18 Dec 2000, Matt Porter wrote:

> > On the MVME2400 (and older Raven/Falcon based boards) the config space by
> > default is at 0x80000cf8 and 0x8000cfc. Does it mean that on the MVME5100,
> > the Hawk is reprogrammed by PPCBUG to look like a CHRP system ?
>
> Yes...and Yes. :)  The only thing the newer MCG boards really do
> (correctly) that looks like a PReP system is the disk booting
> mechanism.
>
> BTW, the MVME2100 (8240/Universe II board) is put in map B for a CHRP
> map as well.

Ok, fine. It means that  my code to reprogram the Raven/Hawk on 2[467]xx
just makes things more uniform. I still don't like the fact that the DMA
is offset, though (unless it's a residual data bug, and map B on 106/107
does not have this DMA offset).

	Regards,
	Gabriel.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: AW: MVME 5100
  2000-12-18 18:44 AW: MVME 5100 Torsten Rissel
@ 2000-12-18 19:07 ` Gabriel Paubert
  0 siblings, 0 replies; 6+ messages in thread
From: Gabriel Paubert @ 2000-12-18 19:07 UTC (permalink / raw)
  To: Torsten Rissel; +Cc: Matt Porter, Linuxppc-Embedded (E-Mail)


On Mon, 18 Dec 2000, Torsten Rissel wrote:

> ???
>
> So would it be better to use the CHRP settings to build a kernel for the MVME5100 ?

Not necessarily. What I did on my machines was to put them in CHRP mode by
reprogramming the Raven or the Hawk, but I essentially used a common
kernel (just adding a powerplus boolean in some cases, this is however not
the right solution). Try the CHRP version but you might still run into
problems. I don't trust residual data, the problem you have is most likely
the missing interrupt routing information thing.

Try to find what the network interrupts are on the MVME5100 and add the
data in the tables in prep_pci.c, since Motorola does not provideeeee
this vital information.

	Regards,
	Gabriel.


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2000-12-18 19:07 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2000-12-18 18:44 AW: MVME 5100 Torsten Rissel
2000-12-18 19:07 ` Gabriel Paubert
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2000-12-18 16:50 Torsten Rissel
2000-12-18 18:24 ` Gabriel Paubert
2000-12-18 12:19 Torsten Rissel
2000-12-14 15:25 Torsten Rissel

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