From: Christophe Leroy <christophe.leroy@csgroup.eu>
To: Hari Bathini <hbathini@linux.ibm.com>,
"bpf@vger.kernel.org" <bpf@vger.kernel.org>,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Cc: Song Liu <songliubraving@fb.com>,
Daniel Borkmann <daniel@iogearbox.net>,
John Fastabend <john.fastabend@gmail.com>,
Alexei Starovoitov <ast@kernel.org>,
Andrii Nakryiko <andrii@kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
Paul Mackerras <paulus@samba.org>,
"Naveen N. Rao" <naveen.n.rao@linux.ibm.com>,
Yonghong Song <yhs@fb.com>, KP Singh <kpsingh@kernel.org>,
Jordan Niethe <jniethe5@gmail.com>,
Martin KaFai Lau <kafai@fb.com>
Subject: Re: [PATCH 5/5] bpf ppc32: Add instructions for atomic_[cmp]xchg
Date: Fri, 13 May 2022 07:50:01 +0000 [thread overview]
Message-ID: <025e9a60-46d9-bc3d-224e-1d92bc05f857@csgroup.eu> (raw)
In-Reply-To: <20220512074546.231616-6-hbathini@linux.ibm.com>
Le 12/05/2022 à 09:45, Hari Bathini a écrit :
> This adds two atomic opcodes BPF_XCHG and BPF_CMPXCHG on ppc32, both
> of which include the BPF_FETCH flag. The kernel's atomic_cmpxchg
> operation fundamentally has 3 operands, but we only have two register
> fields. Therefore the operand we compare against (the kernel's API
> calls it 'old') is hard-coded to be BPF_REG_R0. Also, kernel's
> atomic_cmpxchg returns the previous value at dst_reg + off. JIT the
> same for BPF too with return value put in BPF_REG_0.
>
> BPF_REG_R0 = atomic_cmpxchg(dst_reg + off, BPF_REG_R0, src_reg);
Ah, now we mix the xchg's with the bitwise operations. Ok I understand
better that goto atomic_ops in the previous patch then. But it now
becomes uneasy to read and follow.
I think it would be cleaner to separate completely the bitwise
operations and this, even if it duplicates half a dozen of lines.
>
> Signed-off-by: Hari Bathini <hbathini@linux.ibm.com>
> ---
> arch/powerpc/net/bpf_jit_comp32.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/arch/powerpc/net/bpf_jit_comp32.c b/arch/powerpc/net/bpf_jit_comp32.c
> index 5604ae1b60ab..4690fd6e9e52 100644
> --- a/arch/powerpc/net/bpf_jit_comp32.c
> +++ b/arch/powerpc/net/bpf_jit_comp32.c
> @@ -829,6 +829,23 @@ int bpf_jit_build_body(struct bpf_prog *fp, u32 *image, struct codegen_context *
> /* we're done if this succeeded */
> PPC_BCC_SHORT(COND_NE, tmp_idx);
> break;
> + case BPF_CMPXCHG:
> + /* Compare with old value in BPF_REG_0 */
> + EMIT(PPC_RAW_CMPW(bpf_to_ppc(BPF_REG_0), _R0));
> + /* Don't set if different from old value */
> + PPC_BCC_SHORT(COND_NE, (ctx->idx + 3) * 4);
> + fallthrough;
> + case BPF_XCHG:
> + /* store new value */
> + EMIT(PPC_RAW_STWCX(src_reg, tmp_reg, dst_reg));
> + PPC_BCC_SHORT(COND_NE, tmp_idx);
> + /*
> + * Return old value in src_reg for BPF_XCHG &
> + * BPF_REG_0 for BPF_CMPXCHG.
> + */
> + EMIT(PPC_RAW_MR(imm == BPF_XCHG ? src_reg : bpf_to_ppc(BPF_REG_0),
> + _R0));
If the line spreads into two lines, compact form is probably not worth
it. Would be more readable as
if (imm == BPF_XCHG)
EMIT_PPC_RAW_MR(src_reg, _R0));
else
EMIT_PPC_RAW_MR(src_reg, bpf_to_ppc(BPF_REG_0)));
At the end, it's probably even more readable if you separate both cases
completely:
case BPF_CMPXCHG:
/* Compare with old value in BPF_REG_0 */
EMIT(PPC_RAW_CMPW(bpf_to_ppc(BPF_REG_0), _R0));
/* Don't set if different from old value */
PPC_BCC_SHORT(COND_NE, (ctx->idx + 3) * 4);
/* store new value */
EMIT(PPC_RAW_STWCX(src_reg, tmp_reg, dst_reg));
PPC_BCC_SHORT(COND_NE, tmp_idx);
/* Return old value in BPF_REG_0 */
EMIT_PPC_RAW_MR(src_reg, bpf_to_ppc(BPF_REG_0)));
break;
case BPF_XCHG:
/* store new value */
EMIT(PPC_RAW_STWCX(src_reg, tmp_reg, dst_reg));
PPC_BCC_SHORT(COND_NE, tmp_idx);
/* Return old value in src_reg */
EMIT_PPC_RAW_MR(src_reg, _R0));
break;
> + break;
> default:
> pr_err_ratelimited("eBPF filter atomic op code %02x (@%d) unsupported\n",
> code, i);
next prev parent reply other threads:[~2022-05-13 7:50 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-12 7:45 [PATCH 0/5] Atomics support for eBPF on powerpc Hari Bathini
2022-05-12 7:45 ` [PATCH 1/5] bpf ppc64: add support for BPF_ATOMIC bitwise operations Hari Bathini
2022-05-12 7:45 ` [PATCH 2/5] bpf ppc64: add support for atomic fetch operations Hari Bathini
2022-05-12 7:45 ` [PATCH 3/5] bpf ppc64: Add instructions for atomic_[cmp]xchg Hari Bathini
2022-05-16 3:03 ` Russell Currey
2022-05-12 7:45 ` [PATCH 4/5] bpf ppc32: add support for BPF_ATOMIC bitwise operations Hari Bathini
2022-05-13 6:58 ` Christophe Leroy
2022-05-12 7:45 ` [PATCH 5/5] bpf ppc32: Add instructions for atomic_[cmp]xchg Hari Bathini
2022-05-13 7:50 ` Christophe Leroy [this message]
2022-05-12 18:40 ` [PATCH 0/5] Atomics support for eBPF on powerpc Daniel Borkmann
2022-05-13 6:37 ` Michael Ellerman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=025e9a60-46d9-bc3d-224e-1d92bc05f857@csgroup.eu \
--to=christophe.leroy@csgroup.eu \
--cc=andrii@kernel.org \
--cc=ast@kernel.org \
--cc=bpf@vger.kernel.org \
--cc=daniel@iogearbox.net \
--cc=hbathini@linux.ibm.com \
--cc=jniethe5@gmail.com \
--cc=john.fastabend@gmail.com \
--cc=kafai@fb.com \
--cc=kpsingh@kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=naveen.n.rao@linux.ibm.com \
--cc=netdev@vger.kernel.org \
--cc=paulus@samba.org \
--cc=songliubraving@fb.com \
--cc=yhs@fb.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).