From: Dan Malek <dan@embeddededge.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev list <linuxppc-dev@ozlabs.org>,
linuxppc64-dev <linuxppc64-dev@ozlabs.org>
Subject: Re: [PATCH] powerpc: Merge align.c
Date: Tue, 15 Nov 2005 23:26:45 -0500 [thread overview]
Message-ID: <02de724e66fe23fd23a3635c8b6f049f@embeddededge.com> (raw)
In-Reply-To: <1132108490.5646.67.camel@gaston>
On Nov 15, 2005, at 9:34 PM, Benjamin Herrenschmidt wrote:
> What about lwz/stw cropssing page boundaries ? Is this handled in HW ?
Yep. All of these hardware alignment support features on
the Freescale processors are the reasons they are used
so extensively in data communication processing (where
unaligned data can sometimes occur). All of the load/store
alignment issues are handled in the cache subsystem, so
to the external world all you really see are cache line
operations. In the event of uncached data operations, you
get the performance penalty of two bus accesses, where
some of the data is discarded.
-- Dan
next prev parent reply other threads:[~2005-11-16 4:26 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-11-14 8:00 [PATCH] powerpc: Merge align.c Benjamin Herrenschmidt
2005-11-14 19:53 ` Becky Bruce
2005-11-14 20:55 ` Benjamin Herrenschmidt
2005-11-15 5:10 ` Becky Bruce
2005-11-15 5:35 ` Benjamin Herrenschmidt
2005-11-16 2:19 ` Becky Bruce
2005-11-16 2:34 ` Benjamin Herrenschmidt
2005-11-16 3:23 ` Becky Bruce
2005-11-16 16:54 ` Andrey Volkov
2005-11-16 4:26 ` Dan Malek [this message]
2005-11-16 5:00 ` Benjamin Herrenschmidt
2005-11-16 5:35 ` Dan Malek
2005-11-16 6:13 ` Benjamin Herrenschmidt
2005-11-16 9:36 ` Gabriel Paubert
2005-11-16 15:15 ` Kumar Gala
2005-11-16 16:31 ` Becky Bruce
2005-11-16 19:24 ` Dan Malek
2005-11-16 19:20 ` Dan Malek
2005-11-16 19:45 ` Gabriel Paubert
2005-11-16 20:36 ` Dan Malek
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