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Thu, 28 Jan 2021 09:27:54 +0000 (GMT) Received: from localhost.localdomain (unknown [9.85.68.86]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 28 Jan 2021 09:27:54 +0000 (GMT) Subject: Re: [PATCH v4 2/2] powerpc/mce: Remove per cpu variables from MCE handlers To: Christophe Leroy , linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au References: <20210122123244.34033-1-ganeshgr@linux.ibm.com> <20210122123244.34033-2-ganeshgr@linux.ibm.com> <90f24b44-1747-21f4-3829-7af20cf95e46@csgroup.eu> From: Ganesh Message-ID: <044b07c3-a122-ac66-7158-0e09f4cd023f@linux.ibm.com> Date: Thu, 28 Jan 2021 14:57:53 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <90f24b44-1747-21f4-3829-7af20cf95e46@csgroup.eu> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343, 18.0.737 definitions=2021-01-28_05:2021-01-27, 2021-01-28 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 suspectscore=0 mlxscore=0 impostorscore=0 adultscore=0 priorityscore=1501 clxscore=1011 bulkscore=0 malwarescore=0 phishscore=0 spamscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2101280046 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mahesh@linux.ibm.com, npiggin@gmail.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On 1/25/21 2:54 PM, Christophe Leroy wrote: > > > Le 22/01/2021 à 13:32, Ganesh Goudar a écrit : >> Access to per-cpu variables requires translation to be enabled on >> pseries machine running in hash mmu mode, Since part of MCE handler >> runs in realmode and part of MCE handling code is shared between ppc >> architectures pseries and powernv, it becomes difficult to manage >> these variables differently on different architectures, So have >> these variables in paca instead of having them as per-cpu variables >> to avoid complications. >> >> Signed-off-by: Ganesh Goudar >> --- >> v2: Dynamically allocate memory for machine check event info >> >> v3: Remove check for hash mmu lpar, use memblock_alloc_try_nid >>      to allocate memory. >> >> v4: Spliting the patch into two. >> --- >>   arch/powerpc/include/asm/mce.h     | 18 +++++++ >>   arch/powerpc/include/asm/paca.h    |  4 ++ >>   arch/powerpc/kernel/mce.c          | 79 ++++++++++++++++++------------ >>   arch/powerpc/kernel/setup-common.c |  2 +- >>   4 files changed, 70 insertions(+), 33 deletions(-) >> >> diff --git a/arch/powerpc/kernel/setup-common.c >> b/arch/powerpc/kernel/setup-common.c >> index 71f38e9248be..17dc451f0e45 100644 >> --- a/arch/powerpc/kernel/setup-common.c >> +++ b/arch/powerpc/kernel/setup-common.c >> @@ -916,7 +916,6 @@ void __init setup_arch(char **cmdline_p) >>       /* On BookE, setup per-core TLB data structures. */ >>       setup_tlb_core_data(); >>   #endif >> - > > This line removal is really required for this patch ? I will correct it, Thanks for catching. > >>       /* Print various info about the machine that has been gathered >> so far. */ >>       print_system_info(); >>   @@ -938,6 +937,7 @@ void __init setup_arch(char **cmdline_p) >>       exc_lvl_early_init(); >>       emergency_stack_init(); >>   +    mce_init(); > > You have to include mce.h to avoid build failure on PPC32. Sure, thanks >>       smp_release_cpus(); >>         initmem_init(); >>