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Wed, 25 Jun 2025 10:55:07 +0000 (GMT) Message-ID: <078c1b43-4574-4b11-b474-f37a139af62d@linux.ibm.com> Date: Wed, 25 Jun 2025 16:25:06 +0530 X-Mailing-List: linuxppc-dev@lists.ozlabs.org List-Id: List-Help: List-Owner: List-Post: List-Archive: , List-Subscribe: , , List-Unsubscribe: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 6/6] pci/hotplug/pnv_php: Enable third attention indicator To: Lukas Wunner Cc: linuxppc-dev@lists.ozlabs.org, Timothy Pearson , Shawn Anastasio , linux-kernel , "\"linux-pci\"," , Madhavan Srinivasan , Michael Ellerman , christophe leroy , Naveen N Rao , "\"Bjorn Helgaas\"," References: <20250618190146.GA1213349@bhelgaas> <1469323476.1312174.1750293474949.JavaMail.zimbra@raptorengineeringinc.com> <19689b53-ac23-4b48-97c7-b26f360a7b75@linux.ibm.com> Content-Language: en-US From: Krishna Kumar In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: UVMRLJIp6nSttSK4sEd_QX8wv_4g4aZE X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNjI1MDA4MSBTYWx0ZWRfX93uHIVC08qIZ zDSS78SGvIrATgrTrST909ZZiczGHqfZya585/kQLhm61ZiZsV6c9gJHmspkQjAOOZ79f2CBx6x e5tL+4QHcqFLyIMg/RXsVwXFzNjjVOpBG3y/F2Wzd2dmmmWTluDDcmRW9w12VEBHbP3EmpVNAZk hoZH1fknP9AhFjHTL0s1w3unJbCdxNY8G0UXLofmk6RUaRxQawd9Oz950Bepo1xxFWQR7XKmvUp pxTUozMTqwljPfSz7BCNOPANc88exVf1xFp90C4WuKqhUKfHcPkT2wh5SG8APpDARFH4/hnSowx fR45VlOavuNAc8RgukU0AIPz258JYrIwjJ46t5rtELsSEbmYY/yYgo+CCk9WtBs5yVMZ/OESGa9 /eS/Knm2jWLWexJs5KRCMXetMwnWDj1KMu3/0Ek0RunxGz9rIrNvYA6nkHV2hCBntf0vkoYg X-Authority-Analysis: v=2.4 cv=MshS63ae c=1 sm=1 tr=0 ts=685bd591 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=IkcTkHD0fZMA:10 a=6IFa9wvqVegA:10 a=-dPevh-D5Ufp4ETwuQAA:9 a=QEXdDO2ut3YA:10 X-Proofpoint-GUID: WqtxR-q0R8Z9YnxnNh7wpkSOl1In-mR0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.7,FMLib:17.12.80.40 definitions=2025-06-25_03,2025-06-23_07,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 mlxlogscore=933 impostorscore=0 clxscore=1015 phishscore=0 malwarescore=0 suspectscore=0 adultscore=0 priorityscore=1501 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2506250081 On 6/25/25 1:38 PM, Lukas Wunner wrote: > On Wed, Jun 25, 2025 at 09:38:19AM +0530, Krishna Kumar wrote: >> On 6/21/25 3:29 PM, Lukas Wunner wrote: >>> On Fri, Jun 20, 2025 at 02:56:51PM +0530, Krishna Kumar wrote: >>>> 5. If point 3 and 4 does not solve the problem, then only we should >>>> move to pciehp.c. But AFAIK, PPC/Powernv is DT based while pciehp.c >>>> may be only supporting acpi (I have to check it on this). We need to >>>> provide PHB related information via DTB and maintain the related >>>> topology information via dtb and then it can be doable. >>> pciehp is not ACPI-specific. The PCIe port service driver in >>> drivers/pci/pcie/portdrv.c binds to any PCIe port, examines the >>> port's capabilities (e.g. hotplug, AER, DPC, ...) and instantiates >>> sub-devices to which pciehp and the other drivers such as aer bind. >> 1. If we get PHB info from mmcfg via acpi table in x86 and create a >> root port from there with some address/entity and if this Acpi and >> associated entity is not present for PPC, then it can be a problem. >> >> 2. PPC is normally based on DTB entity and it identifies PHB and pcie >> devices from there. If this all the information is correctly map >> via portdrv.c then there is no problem and whatever you are telling >> is correct and it will work. >> >> 3. But if point 2 is not handled correctly we need to just aligned with >> port related data structure to make it work. > PCI devices do not have to be enumerated in the devicetree (or in ACPI > DSDT) because PCI is an enumerable bus (like USB). Only the host bridge > has to be enumerated in the devicetree or DSDT. The kernel can find the > PCI devices below the host bridge itself. Yes in DFS manner (once it gets to know the PHB address via -acpi in X86 and via DTB in PPC) > Hot-plugged devices are > usually not described in the devicetree or DSDT because one doesn't > know their properties in advance. > > pnv_php.c seems to search the devicetree for hotplug slots and > instantiates them. My expectation would be that any hotplug-capable > PCIe Root Port or Downstream Port, which is *not* described in the > devicetree such that pnv_php.c creates a slot for it, is handled by > pciehp. Your are correct, pnv_php.c heavily depends on slot id and DTB nodes. Thats how its designed. Can we decouple it via DTB nodes, I will come back on this. > > Timothy was talking about a Microsemi PCIe switch below the Root Port. > My understanding is that the Downstream Ports of that switch are > hotplug-capable. I understand it. > So unless you've disabled CONFIG_HOTPLUG_PCI_PCIE, > I'd expect those ports to be handled by pciehp. I need to check it and test it, but yeah- it may or maynot work and I will confirm it only after some study and testing (maybe in 1-2 week) > Assuming they're not > described as a "ibm,ioda2-phb" compatible device in the devicetree, > but why would they? HW topology and DTB is based on IODA and it will keep changing, not frequently but eventually. > > Thanks, > > Lukas Best Regards, Krishna