From: Dan Malek <dan@embeddededge.com>
To: Marcelo Tosatti <marcelo.tosatti@cyclades.com>
Cc: Tom Rini <trini@kernel.crashing.org>,
Kumar Gala <galak@freescale.com>,
linux-ppc-embedded <linuxppc-embedded@ozlabs.org>
Subject: Re: merge 8xx longstanding MM bug workaround
Date: Sat, 25 Jun 2005 18:27:35 -0400 [thread overview]
Message-ID: <08634a569d62eb8cd1de1858cd58ab43@embeddededge.com> (raw)
In-Reply-To: <20050625151105.GB32117@logos.cnet>
On Jun 25, 2005, at 11:11 AM, Marcelo Tosatti wrote:
> if (!PageReserved(page)
> && !test_bit(PG_arch_1, &page->flags)) {
> if (vma->vm_mm == current->active_mm)
> +#ifdef CONFIG_8xx
> +/* On 8xx, cache control instructions (particularly "dcbst" from
> + * flush_dcache_icache) fault as write operation if there is an
> + * unpopulated TLB entry for the address in question. To workaround
> + * that, we invalidate the TLB here, thus avoiding dcbst misbehaviour.
> + */
> + _tlbie(address);
> +#endif
> __flush_dcache_icache((void *) address);
> else
> flush_dcache_icache_page(page);
You need some { } and proper indenting here :-)
Thanks.
-- Dan
prev parent reply other threads:[~2005-06-25 22:27 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-06-25 15:11 merge 8xx longstanding MM bug workaround Marcelo Tosatti
2005-06-25 22:27 ` Dan Malek [this message]
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