Re: [PATCH 2/2] POWERPC/fsl-pci: Set relaxed ordering on prefetchable ranges

[Kumar Gala <galak@kernel.crashing.org>]

On Dec 17, 2008, at 1:43 PM, Trent Piepho wrote:

> Provides a small speedup when accessing pefetchable ranges.  To  
> indicate
> that a memory range is prefetchable, mark it in the dts file with  
> 42000000
> instead of 02000000.
>
> A powepc pci_controller is allowed three memory ranges, any of which  
> may be
> prefetchable.  However, the PCI-PCI bridge configuration space only  
> has one
> field for "non-prefetchable memory behind bridge", which has a 32 bit
> address, and one field for "prefetchable memory behind bridge",  
> which may
> have a 64 bit address.  These are PCI bus addresses, not CPU physical
> addresses.
>
> So really you're only allowed one memory range of each type.  And if  
> you
> want the range at a PCI address above 32 bits you must make it
> prefetchable.
>
> Signed-off-by: Trent Piepho <tpiepho@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c |    3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)


applied

- k