From: Gary Thomas <gary@mlbassoc.com>
To: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Brian Waite <waite@skycomputers.com>,
linuxppc-dev <linuxppc-dev@lists.linuxppc.org>
Subject: Re: Disable cache on 74xx
Date: 19 Feb 2003 15:48:50 -0700 [thread overview]
Message-ID: <1045694930.22231.6567.camel@hermes.chez-thomas.org> (raw)
In-Reply-To: <1045688879.12534.80.camel@zion.wanadoo.fr>
On Wed, 2003-02-19 at 14:07, Benjamin Herrenschmidt wrote:
>
> On Wed, 2003-02-19 at 21:52, Brian Waite wrote:
> > Hi all,
> > I am trying to hunt down a memory controller configuration problem and I have
> > been asked to disable all caching so as to remove it from the equation. I can
> > easl disable L2 but when I start ucking with the WIMG bits to set cache
> > inhibit, The kernel panics with stack overflows. Does anyone know where or
> > what I have to set to disable caching?
>
> Hrm... set L2 and L3 off, then hack HID0 to disable L1 ?
There are other problems with this. With the caches disabled
(via HID0) all data cache instructions (like DCBF) will fail.
There are some of these in the kernel itself, but beware that
GLIBC has it's own set.
... totally disabling the data CACHE with Linux is non-trivial.
--
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Gary Thomas |
MLB Associates | Consulting for the
+1 (970) 229-1963 | Embedded world
http://www.mlbassoc.com/ |
email: <gary@mlbassoc.com> |
gpg: http://www.chez-thomas.org/gary/gpg_key.asc
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next prev parent reply other threads:[~2003-02-19 22:48 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-02-19 20:52 Disable cache on 74xx Brian Waite
2003-02-19 21:07 ` Benjamin Herrenschmidt
2003-02-19 22:48 ` Gary Thomas [this message]
2003-02-20 13:55 ` Brian Waite
2003-02-20 14:01 ` Gary Thomas
2003-02-20 14:09 ` Geert Uytterhoeven
2003-02-20 15:23 ` Dan Malek
2003-02-20 15:47 ` Brian Waite
2003-02-20 15:54 ` Gary Thomas
2003-02-20 15:55 ` Benjamin Herrenschmidt
2003-02-20 16:14 ` Dan Malek
2003-02-20 16:51 ` Mark A. Greer
2003-02-20 14:09 ` Brian Waite
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