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From: "Bryant G. Ly" <bryantly@linux.vnet.ibm.com>
To: Michael Ellerman <mpe@ellerman.id.au>,
	benh@kernel.crashing.org, paulus@samba.org
Cc: seroyer@linux.vnet.ibm.com, jjalvare@linux.vnet.ibm.com,
	alex.williamson@redhat.com, helgaas@kernel.org, aik@ozlabs.ru,
	ruscur@russell.cc, linux-pci@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, bodong@mellanox.com,
	eli@mellanox.com, saeedm@mellanox.com
Subject: Re: [PATCH v4 3/7] platforms/pseries: Set eeh_pe of EEH_PE_VF type
Date: Wed, 24 Jan 2018 08:53:28 -0600	[thread overview]
Message-ID: <1059d399-60f8-99db-c498-c4222725712f@linux.vnet.ibm.com> (raw)
In-Reply-To: <87shawukgv.fsf@concordia.ellerman.id.au>


On 1/23/18 7:14 PM, Michael Ellerman wrote:

> "Bryant G. Ly" <bryantly@linux.vnet.ibm.com> writes:
>
>> To correctly use EEH code one has to make
>> sure that the EEH_PE_VF is set for dynamic created
>> VFs. Therefore this patch allocates an eeh_pe of
>> eeh type EEH_PE_VF and associates PE with parent.
>>
>> Signed-off-by: Bryant G. Ly <bryantly@linux.vnet.ibm.com>
>> Signed-off-by: Juan J. Alvarez <jjalvare@linux.vnet.ibm.com>
>> ---
>>  arch/powerpc/include/asm/pci-bridge.h        |  5 ++++-
>>  arch/powerpc/platforms/pseries/eeh_pseries.c | 17 +++++++++++++++++
>>  2 files changed, 21 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
>> index 9f66ddebb799..16d70740a76f 100644
>> --- a/arch/powerpc/include/asm/pci-bridge.h
>> +++ b/arch/powerpc/include/asm/pci-bridge.h
>> @@ -211,7 +211,10 @@ struct pci_dn {
>>  	unsigned int *pe_num_map;	/* PE# for the first VF PE or array */
>>  	bool    m64_single_mode;	/* Use M64 BAR in Single Mode */
>>  #define IODA_INVALID_M64        (-1)
>> -	int     (*m64_map)[PCI_SRIOV_NUM_BARS];
>> +	union {
>> +		int     (*m64_map)[PCI_SRIOV_NUM_BARS]; /*Only used in powernv */
>> +		int     last_allow_rc;	/* Only used in pSeries */
>> +	};
>>  #endif /* CONFIG_PCI_IOV */
>>  	int	mps;			/* Maximum Payload Size */
>>  	struct list_head child_list;
> I don't see the point of using a union to save 4 bytes.
>
> And if you look at the current layout of the struct there's actually a 4
> byte hole after mps, so it doesn't actually save any space at all.
>
> I can remove it before applying, unless there's some compelling reason
> for it I'm not seeing.
>
> cheers

No specific reason for the union, you can go ahead and remove it before applying. 

Thanks!

Bryant

  reply	other threads:[~2018-01-24 14:53 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-05 16:45 [PATCH v4 0/7] SR-IOV Enablement on PowerVM Bryant G. Ly
2018-01-05 16:45 ` [PATCH v4 1/7] platform/pseries: Update VF config space after EEH Bryant G. Ly
2018-01-29  4:13   ` [v4,1/7] " Michael Ellerman
2018-01-05 16:45 ` [PATCH v4 2/7] linux/pci: Add uevents in AER and EEH error/resume Bryant G. Ly
2018-01-05 18:15   ` Bjorn Helgaas
2018-01-05 16:45 ` [PATCH v4 3/7] platforms/pseries: Set eeh_pe of EEH_PE_VF type Bryant G. Ly
2018-01-24  1:14   ` Michael Ellerman
2018-01-24 14:53     ` Bryant G. Ly [this message]
2018-01-05 16:45 ` [PATCH v4 4/7] powerpc/kernel Add EEH operations to notify resume Bryant G. Ly
2018-01-05 16:45 ` [PATCH v4 5/7] powerpc/kernel: Add EEH notify resume sysfs Bryant G. Ly
2018-01-05 16:45 ` [PATCH v4 6/7] pseries/pci: Associate PEs to VFs in configure SR-IOV Bryant G. Ly
2018-01-05 16:45 ` [PATCH v4 7/7] pseries/setup: Add Initialization of VF Bars Bryant G. Ly
2018-01-29  4:13   ` [v4,7/7] " Michael Ellerman
2018-01-17 17:29 ` [PATCH v4 0/7] SR-IOV Enablement on PowerVM Bryant G. Ly
2018-01-24  1:18 ` Russell Currey

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