EP405 GPIO signal problem

EP405 GPIO signal problem

[Toni Van Remortel]

Hi,

I have an RTAI powered kernel module which outputs 32 bits data via the
EP405 GPIO ports from the IBM 405GP CPU. These outputs are multiplexed
with other signals.
Problem: when I output the 32 bits as one like this:
writel( buffer, (u32)gpio_base_addr+GPIO0_OR );
(where buffer is of u32 type)
I get some glitches after my DAC. The DAC has a 70ns settling time, but
the glitches are 120µs. So I presume it's a CPU problem.

Is this a normal thing? I don't think so. It is strange behavior, that's
all I know. How can I prevent those 'peaks' in my output? Peaks are
generated by 0xFFFFFFFF output (that's what I can make out of the
scope-signal).
--
                           Toni Van Remortel
              Wetenschappelijk Medewerker - D-science lab
  Real time Linux for embedded systems: http://linemb.d-sciencelab.com
              Tel: +32 3 205 61 72 - Fax: +32 3 205 61 95
                      E-mail: t.vanremortel@ha.be


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: EP405 GPIO signal problem

[Toni Van Remortel]

Op do 20-11-2003, om 15:02 schreef Toni Van Remortel:
> I get some glitches after my DAC. The DAC has a 70ns settling time, but
> the glitches are 120µs. So I presume it's a CPU problem.

Which isn't. Just checked the digital signals and those are perfect. So
it is my DAC.
--
                           Toni Van Remortel
              Wetenschappelijk Medewerker - D-science lab
  Real time Linux for embedded systems: http://linemb.d-sciencelab.com
              Tel: +32 3 205 61 72 - Fax: +32 3 205 61 95
                      E-mail: t.vanremortel@ha.be


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: EP405 GPIO signal problem

[Eugene Surovegin]

On Thu, Nov 20, 2003 at 03:02:15PM +0100, Toni Van Remortel wrote:
> I have an RTAI powered kernel module which outputs 32 bits data via the
> EP405 GPIO ports from the IBM 405GP CPU. These outputs are multiplexed
> with other signals.
> Problem: when I output the 32 bits as one like this:
> writel( buffer, (u32)gpio_base_addr+GPIO0_OR );
> (where buffer is of u32 type)

One thing which looks strange to me. Are you sure you can use 32 GPIO
pins?

This is impossible because 405GP has only 23, and I doubt you can use
even this number, because some of the pins are shared with IRQ and
PerCSx lines.

Eugene


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

Re: EP405 GPIO signal problem

[Toni Van Remortel]

Op do 20-11-2003, om 19:19 schreef Eugene Surovegin:
> On Thu, Nov 20, 2003 at 03:02:15PM +0100, Toni Van Remortel wrote:
> > I have an RTAI powered kernel module which outputs 32 bits data via the
> > EP405 GPIO ports from the IBM 405GP CPU. These outputs are multiplexed
> > with other signals.
> > Problem: when I output the 32 bits as one like this:
> > writel( buffer, (u32)gpio_base_addr+GPIO0_OR );
> > (where buffer is of u32 type)
>
> One thing which looks strange to me. Are you sure you can use 32 GPIO
> pins?

Ain't possible, I know.

> This is impossible because 405GP has only 23, and I doubt you can use
> even this number, because some of the pins are shared with IRQ and
> PerCSx lines.

You can set all 23 GPIO's as output. I actually only use 17 of them (2 x
8bit position and 1 on/off).
Now I've taken a deeper look at the problem, it might be caused by the
EP405 itself. My DAC settles at 70ns.
I still have to check if the signals are outputted all at the same time.
Should go and fetch a logic analyzer somewhere ;)

--
                           Toni Van Remortel
              Wetenschappelijk Medewerker - D-science lab
  Real time Linux for embedded systems: http://linemb.d-sciencelab.com
              Tel: +32 3 205 61 72 - Fax: +32 3 205 61 95
                      E-mail: t.vanremortel@ha.be


** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/