Need testers: G3 @ G4 laptops (powerbooks & ibooks)

Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Benjamin Herrenschmidt]

Hi need people who own those machiens, especially the recent iBook2 models
with a G3 CPU and titanium powerbooks with a G4, to test this patch and
tell me if sleep mode still works reliably or becomes unstable.

(It won't help machines that cannot already sleep).

Applies on top of current 2.6 but may apply to 2.4 as well..

Thanks !

Ben.

===== arch/ppc/kernel/l2cr.S 1.15 vs edited =====
--- 1.15/arch/ppc/kernel/l2cr.S	Tue Oct 14 17:28:01 2003
+++ edited/arch/ppc/kernel/l2cr.S	Wed Feb 18 14:14:33 2004
@@ -130,11 +130,13 @@
 	mtspr	HID0,r4			/* Disable DPM */
 	sync

+#if 0
 	/* Flush & disable L1 */
 	mr	r5,r3
 	bl	__flush_disable_L1
 	mr	r3,r5
-
+#endif
+
 	/* Get the current enable bit of the L2CR into r4 */
 	mfspr	r4,L2CR

@@ -236,8 +238,10 @@
 	sync

 4:
-	bl	__inval_enable_L1

+#if 0
+	bl	__inval_enable_L1
+#endif
 	/* Restore HID0[DPM] to whatever it was before */
 	sync
 	mtspr	1008,r8
@@ -394,11 +398,10 @@
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
  	sync

-	/* Load counter to 0x1000 cache lines (128k) and
+	/* Load counter to 0x4000 cache lines (512k) and
 	 * load cache with datas
 	 */
-	lis	r3,0x0002
-//	li	r3,0x1000	/* 128kB / 32B */
+	li	r3,0x4000	/* 512kB / 32B */
 	mtctr	r3
 	li	r3, 0
 1:
@@ -409,8 +412,7 @@
 	sync

 	/* Now flush those cache lines */
-	lis	r3,0x0002
-//	li	r3,0x1000	/* 128kB / 32B */
+	li	r3,0x4000	/* 512kB / 32B */
 	mtctr	r3
 	li	r3, 0
 1:


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Kiko Piris]

On 18/02/2004 at 14:21, Benjamin Herrenschmidt wrote:

> Hi need people who own those machiens, especially the recent iBook2 models
> with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> tell me if sleep mode still works reliably or becomes unstable.

Hi, I've compiled and I'm running it on my iBook2 (G3).

In fact I've applied your patch _plus_ laptop mode and orinoco monitor
mode. I guess they have nothing to see one each other but...

I've put it to sleep a couple of times (once before starting X and some
more while running X) and noticed nothing unusual.

Let me know if I can provide additional info or test anything else.

Thanks


Info about hardware & config follows:
-------------------------------------

$ uname -a
Linux sacarino 2.6.3-rc3-ben1-benhtest #1 Wed Feb 18 16:19:59 CET 2004 ppc GNU/Linux

$ cat /proc/cpuinfo
processor       : 0
cpu             : 750FX
temperature     : 43 C (uncalibrated)
clock           : 900MHz
revision        : 2.3 (pvr 7000 0203)
bogomips        : 1785.85
machine         : PowerBook4,3
motherboard     : PowerBook4,3 MacRISC2 MacRISC Power Macintosh
detected as     : 257 (iBook 2 rev. 2)
pmac flags      : 0000000b
L2 cache        : 512K unified
memory          : 384MB
pmac-generation : NewWorld

Kernel config can be found at http://www.pirispons.net/bulma/llista/iBook/

--
Kiko

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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Benjamin Herrenschmidt]

On Thu, 2004-02-19 at 02:45, Kiko Piris wrote:
> On 18/02/2004 at 14:21, Benjamin Herrenschmidt wrote:
>
> > Hi need people who own those machiens, especially the recent iBook2 models
> > with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> > tell me if sleep mode still works reliably or becomes unstable.
>
> Hi, I've compiled and I'm running it on my iBook2 (G3).
>
> In fact I've applied your patch _plus_ laptop mode and orinoco monitor
> mode. I guess they have nothing to see one each other but...
>
> I've put it to sleep a couple of times (once before starting X and some
> more while running X) and noticed nothing unusual.
>
> Let me know if I can provide additional info or test anything else.

Thanks.

Ben.


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[digger vermont]

Hello Ben,

	I just rsync'd to 2.6.3-rc3-ben1 and added your patch.  I get these
errors:

  UPD     include/linux/compile.h
  CC      init/version.o
  LD      init/built-in.o
  LD      .tmp_vmlinux1
drivers/built-in.o(.text+0x5f01c): In function `radeon_setup_i2c_bus':
: undefined reference to `i2c_bit_add_bus'
drivers/built-in.o(.text+0x5f17c): In function
`radeon_delete_i2c_busses':
: undefined reference to `i2c_bit_del_bus'
drivers/built-in.o(.text+0x5f184): In function
`radeon_delete_i2c_busses':
: undefined reference to `i2c_bit_del_bus'
drivers/built-in.o(.text+0x5f18c): In function
`radeon_delete_i2c_busses':
: undefined reference to `i2c_bit_del_bus'
drivers/built-in.o(.text+0x5f194): In function
`radeon_delete_i2c_busses':
: undefined reference to `i2c_bit_del_bus'
drivers/built-in.o(.text+0x5f224): In function
`radeon_do_probe_i2c_edid':
: undefined reference to `i2c_transfer'
make: *** [.tmp_vmlinux1] Error 1

2.6.3-rc2-ben1 compiled fine.  Does this have to do with your patch or
did I screw up my configuration?

digger


On Tue, 2004-02-17 at 22:21, Benjamin Herrenschmidt wrote:
> Hi need people who own those machiens, especially the recent iBook2 models
> with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> tell me if sleep mode still works reliably or becomes unstable.
>
> (It won't help machines that cannot already sleep).
>
> Applies on top of current 2.6 but may apply to 2.4 as well..
>
> Thanks !
>
> Ben.


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Colin Leroy]

> 2.6.3-rc2-ben1 compiled fine.  Does this have to do with your patch or
> did I screw up my configuration?


new radeonfb wants i2c-core in the kernel (CONFIG_I2C_CORE=y).

--
Colin
  This message represents the official view of the voices
  in my head.

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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[digger vermont]

On Wed, 2004-02-18 at 11:09, Colin Leroy wrote:
> > 2.6.3-rc2-ben1 compiled fine.  Does this have to do with your patch or
> > did I screw up my configuration?
>
>
> new radeonfb wants i2c-core in the kernel (CONFIG_I2C_CORE=y).

Thanks

digger


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Benjamin Herrenschmidt]

On Thu, 2004-02-19 at 03:03, digger vermont wrote:
> Hello Ben,
>
> 	I just rsync'd to 2.6.3-rc3-ben1 and added your patch.  I get these
> errors:

Known problem with i2c config, make sure you have i2c and i2c-algo-bit
enabled.

Ben.


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Greg Watson]

Seems to work fine:

Titanium G4 667MHz (Gigabit)
Yellow Dog 3.0.1
kernel 2.4.22-2a

Greg

On Feb 17, 2004, at 8:21 PM, Benjamin Herrenschmidt wrote:

>
> Hi need people who own those machiens, especially the recent iBook2
> models
> with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> tell me if sleep mode still works reliably or becomes unstable.
>
> (It won't help machines that cannot already sleep).
>
> Applies on top of current 2.6 but may apply to 2.4 as well..
>
> Thanks !
>
> Ben.
>
> ===== arch/ppc/kernel/l2cr.S 1.15 vs edited =====
> --- 1.15/arch/ppc/kernel/l2cr.S	Tue Oct 14 17:28:01 2003
> +++ edited/arch/ppc/kernel/l2cr.S	Wed Feb 18 14:14:33 2004
> @@ -130,11 +130,13 @@
>  	mtspr	HID0,r4			/* Disable DPM */
>  	sync
>
> +#if 0
>  	/* Flush & disable L1 */
>  	mr	r5,r3
>  	bl	__flush_disable_L1
>  	mr	r3,r5
> -
> +#endif
> +
>  	/* Get the current enable bit of the L2CR into r4 */
>  	mfspr	r4,L2CR
>
> @@ -236,8 +238,10 @@
>  	sync
>
>  4:
> -	bl	__inval_enable_L1
>
> +#if 0
> +	bl	__inval_enable_L1
> +#endif
>  	/* Restore HID0[DPM] to whatever it was before */
>  	sync
>  	mtspr	1008,r8
> @@ -394,11 +398,10 @@
>  END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
>   	sync
>
> -	/* Load counter to 0x1000 cache lines (128k) and
> +	/* Load counter to 0x4000 cache lines (512k) and
>  	 * load cache with datas
>  	 */
> -	lis	r3,0x0002
> -//	li	r3,0x1000	/* 128kB / 32B */
> +	li	r3,0x4000	/* 512kB / 32B */
>  	mtctr	r3
>  	li	r3, 0
>  1:
> @@ -409,8 +412,7 @@
>  	sync
>
>  	/* Now flush those cache lines */
> -	lis	r3,0x0002
> -//	li	r3,0x1000	/* 128kB / 32B */
> +	li	r3,0x4000	/* 512kB / 32B */
>  	mtctr	r3
>  	li	r3, 0
>  1:
>
>
>


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[digger vermont]

Hi Ben,

On Tue, 2004-02-17 at 22:21, Benjamin Herrenschmidt wrote:
> Hi need people who own those machiens, especially the recent iBook2 models
> with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> tell me if sleep mode still works reliably or becomes unstable.
>
> (It won't help machines that cannot already sleep).
>
> Applies on top of current 2.6 but may apply to 2.4 as well..

It seems okay here.

Linux myrna 2.6.3-rc3-ben1 #3 Wed Feb 18 11:28:22 EST 2004 ppc GNU/Linux

processor       : 0
cpu             : 7455, altivec supported
clock           : 667MHz
revision        : 2.1 (pvr 8001 0201)
bogomips        : 665.60
machine         : PowerBook3,4
motherboard     : PowerBook3,4 MacRISC2 MacRISC Power Macintosh
detected as     : 73 (PowerBook Titanium III)
pmac flags      : 0000000b
L2 cache        : 256K unified
memory          : 512MB
pmac-generation : NewWorld


Thanks.

digger


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Michael Schmitz]

> Hi need people who own those machiens, especially the recent iBook2 models
> with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> tell me if sleep mode still works reliably or becomes unstable.

Still works reliably on the G3 Lombard. Doesn't seem to interfere with the
pmdisk patch either. (2.6.2-ben1)

	Michael


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Ira Weiny]

On Wed, 18 Feb 2004 14:21:36 +1100
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

>
> Hi need people who own those machiens, especially the recent iBook2 models
> with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> tell me if sleep mode still works reliably or becomes unstable.
>
> (It won't help machines that cannot already sleep).
>
> Applies on top of current 2.6 but may apply to 2.4 as well..

I applied it to 2.4.23-pre5-ben0.  It failed on Chunk 3.

> cat /proc/cpuinfo
cpu             : 7410, altivec supported
temperature     : 16 C (uncalibrated)
clock           : 500MHz
revision        : 17.3 (pvr 800c 1103)
bogomips        : 995.32
machine         : PowerBook3,2
motherboard     : PowerBook3,2 MacRISC2 MacRISC Power Macintosh
board revision  : 00000001
detected as     : 71 (PowerBook Titanium)
pmac flags      : 0000000b
L2 cache        : 1024K unified
memory          : 512MB
pmac-generation : NewWorld


It seems to be working ok.  What is this supposed to fix?  I have, since going
to Yellow dog 3.0, had random sleep "crashes".  I have been trying to figure
out what caused them but they really did seem to be random.

>
> Thanks !
>
> Ben.
>

No, thank you, I for one would be lost without your kernel.

Thanks,
Ira


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Tom Rini]

On Wed, Feb 18, 2004 at 02:21:36PM +1100, Benjamin Herrenschmidt wrote:

>
> Hi need people who own those machiens, especially the recent iBook2 models
> with a G3 CPU and titanium powerbooks with a G4, to test this patch and
> tell me if sleep mode still works reliably or becomes unstable.
[snip]
> ===== arch/ppc/kernel/l2cr.S 1.15 vs edited =====
> --- 1.15/arch/ppc/kernel/l2cr.S	Tue Oct 14 17:28:01 2003
> +++ edited/arch/ppc/kernel/l2cr.S	Wed Feb 18 14:14:33 2004
> @@ -130,11 +130,13 @@
>  	mtspr	HID0,r4			/* Disable DPM */
>  	sync
>
> +#if 0
>  	/* Flush & disable L1 */
>  	mr	r5,r3
>  	bl	__flush_disable_L1
>  	mr	r3,r5
> -
> +#endif
> +
>  	/* Get the current enable bit of the L2CR into r4 */
>  	mfspr	r4,L2CR
>
> @@ -236,8 +238,10 @@
>  	sync
>
>  4:
> -	bl	__inval_enable_L1
>
> +#if 0
> +	bl	__inval_enable_L1
> +#endif
>  	/* Restore HID0[DPM] to whatever it was before */
>  	sync
>  	mtspr	1008,r8

Are you sure that you can get away with this, passed on how the manuals
(745x) describe the sequence of flush/invalidating the L2 (and, L3) ?

--
Tom Rini
http://gate.crashing.org/~trini/

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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Benjamin Herrenschmidt]

> Are you sure that you can get away with this, passed on how the manuals
> (745x) describe the sequence of flush/invalidating the L2 (and, L3) ?

Do they describe disabling the L1 at all ? I did that after looking at
Darwin place in the first place. But then, I discovered it broke the
wallstreet. I had people test the patch removing those L1 stuffs for
some time and it seems to work.

I think the proper sequence is still what Apple does, but that means
all caches are tied together. I don't have time to work on that, and
there's the issue of possible snoops that Apple addresses by using the
ROM space for the displacement flush, we need something different of
course.

A resume of Apple sequence is that they always tear down and re-enable
all 3 caches in one operation. Using the HW assist when available.

Ben.


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Mark A. Greer]

     >/ Are you sure that you can get away with this, passed on how the
    manuals/
     >/ (745x) describe the sequence of flush/invalidating the L2 (and,
    L3) ?/

    Do they describe disabling the L1 at all ?

[Somehow I was removed from the -dev & -embedded list.  I was wondering
why I hadn't seen anything for a while  :)]
[Also, trini prodded me to send this email and I didn't go back and read
the whole thread so this may be a little out of context]

Ben, FYI,

The latest 745x user manual is here:
 http://e-www.motorola.com/files/32bit/doc/ref_manual/MPC7450UM.pdf

Here are some relevant sections:
- 3.4.1.1 (p. 3-32) Enabling and Disabling the Data Cache
- 3.4.1.3 (p. 3-33) Enabling and Disabling the Instruction Cache
- 3.6.3.1.5 (p. 3-55) Flushing of L1, L2, and L3


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Re: Need testers: G3 @ G4 laptops (powerbooks & ibooks)

[Benjamin Herrenschmidt]

> Ben, FYI,
>
> The latest 745x user manual is here:
>  http://e-www.motorola.com/files/32bit/doc/ref_manual/MPC7450UM.pdf
>
> Here are some relevant sections:
> - 3.4.1.1 (p. 3-32) Enabling and Disabling the Data Cache
> - 3.4.1.3 (p. 3-33) Enabling and Disabling the Instruction Cache
> - 3.6.3.1.5 (p. 3-55) Flushing of L1, L2, and L3

I haven't much time to play with that at the moment, but you are
welcome to fix the code :)

Ben.


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