Problem with 745x errata in 2.6.8

Problem with 745x errata in 2.6.8

[Ken Moffat]

Hi,

 I'm trying to get the port to the AmigaOne/Teron into a fit state to
attempt to submit it.  I've got it working adequately in 2.6.7 (no ide
dma, obviously, and no floppy disk, plus other minor issues) but
obviously I need to get it up to the current version before asking for
your comments on what needs to be changed to make it acceptable.

 Unfortunately, the following changes in 2.6.8-rc3 stop my 7455 from
booting (with a vga console, it stops after the console: colour VGA+
80x25 message, and also the top of the screen is blank).  If I revert
these, it runs.  I'm totally out of my depth here, I don't even know how
to work out which sort of 7455 I've got, much less what this is all
doing.  Can anybody offer me some pointers, please ?

Ken

--- linux-2.6.8-rc2/arch/ppc/kernel/cputable.c=092004-09-17 15:26:38.000000=
000 +0100
+++ linux-2.6.8-rc3/arch/ppc/kernel/cputable.c=092004-09-17 15:27:45.000000=
000 +0100
@@ -55,7 +55,8 @@ extern void __setup_cpu_generic(unsigned
 #endif

 /* We need to mark all pages as being coherent if we're SMP or we
- * have a 754x and an MPC107 host bridge. */
+ * have a 754x and an MPC107 host bridge.
+ */
 #if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
 #define CPU_FTR_COMMON                  CPU_FTR_NEED_COHERENT
 #else
@@ -263,7 +264,7 @@ struct cpu_spec=09cpu_specs[] =3D {
 =09CPU_FTR_COMMON |
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450,
+=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NEED_COHERENT,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
@@ -274,7 +275,7 @@ struct cpu_spec=09cpu_specs[] =3D {
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 =09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
-=09CPU_FTR_L3_DISABLE_NAP,
+=09CPU_FTR_L3_DISABLE_NAP | CPU_FTR_NEED_COHERENT,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
@@ -284,7 +285,8 @@ struct cpu_spec=09cpu_specs[] =3D {
 =09CPU_FTR_COMMON |
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR,
+=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+=09CPU_FTR_NEED_COHERENT,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
@@ -294,7 +296,8 @@ struct cpu_spec=09cpu_specs[] =3D {
 =09CPU_FTR_COMMON |
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
-=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS,
+=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS |
+=09CPU_FTR_NEED_COHERENT,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
@@ -305,7 +308,7 @@ struct cpu_spec=09cpu_specs[] =3D {
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 =09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
-=09CPU_FTR_L3_DISABLE_NAP | CPU_FTR_HAS_HIGH_BATS,
+=09CPU_FTR_L3_DISABLE_NAP | CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
@@ -316,18 +319,40 @@ struct cpu_spec=09cpu_specs[] =3D {
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 =09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
-=09CPU_FTR_HAS_HIGH_BATS,
+=09CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
+=09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+=0932, 32,
+=09__setup_cpu_745x
+    },
+    {=09/* 7447/7457 Rev 1.0 */
+    =090xffffffff, 0x80020100, "7447/7457",
+=09CPU_FTR_COMMON |
+    =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+=09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+=09CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
+=09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
+=0932, 32,
+=09__setup_cpu_745x
+    },
+    {=09/* 7447/7457 Rev 1.1 */
+    =090xffffffff, 0x80020101, "7447/7457",
+=09CPU_FTR_COMMON |
+    =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
+=09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
+=09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
+=09CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
     },
-    {=09/* 7457 */
-    =090xffff0000, 0x80020000, "7457",
+    {=09/* 7447/7457 Rev 1.2 and later */
+    =090xffff0000, 0x80020000, "7447/7457",
 =09CPU_FTR_COMMON |
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
 =09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
-=09CPU_FTR_HAS_HIGH_BATS,
+=09CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
@@ -338,7 +363,7 @@ struct cpu_spec=09cpu_specs[] =3D {
     =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | CPU_FTR_CAN_NAP |
 =09CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
 =09CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
-=09CPU_FTR_HAS_HIGH_BATS,
+=09CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
 =09COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
 =0932, 32,
 =09__setup_cpu_745x
@@ -351,8 +376,8 @@ struct cpu_spec=09cpu_specs[] =3D {
 =0932, 32,
 =09__setup_cpu_603
     },
-    {=09/* 8280 is a G2_LE (603e core, plus some) */
-=090x7fff0000, 0x00820000, "8280",
+    {=09/* All G2_LE (603e core, plus some) have the same pvr */
+=090x7fff0000, 0x00820000, "G2_LE",
 =09CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_CAN_DOZE | CPU_FTR_USE_TB |
 =09CPU_FTR_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
 =09COMMON_PPC,

--=20
 das eine Mal als Trag=F6die, das andere Mal als Farce

Re: Problem with 745x errata in 2.6.8

[Benjamin Herrenschmidt]

On Sat, 2004-09-18 at 08:03, Ken Moffat wrote:
> Hi,
> 
>  I'm trying to get the port to the AmigaOne/Teron into a fit state to
> attempt to submit it.  I've got it working adequately in 2.6.7 (no ide
> dma, obviously, and no floppy disk, plus other minor issues) but
> obviously I need to get it up to the current version before asking for
> your comments on what needs to be changed to make it acceptable.
> 
>  Unfortunately, the following changes in 2.6.8-rc3 stop my 7455 from
> booting (with a vga console, it stops after the console: colour VGA+
> 80x25 message, and also the top of the screen is blank).  If I revert
> these, it runs.  I'm totally out of my depth here, I don't even know how
> to work out which sort of 7455 I've got, much less what this is all
> doing.  Can anybody offer me some pointers, please ?

What exact PVR do you have ? It could be your nortbridge not beeing
properly setup for the kind of snoop cycles issued when the M bit
is set on all pages ? In this case, it has to be fixed at that level
(contact AmigaOne/Teron) as I will not revert that fix.

Re: Problem with 745x errata in 2.6.8

[Ken Moffat]

On Sat, 18 Sep 2004, Benjamin Herrenschmidt wrote:

> On Sat, 2004-09-18 at 08:03, Ken Moffat wrote:
> > Hi,
> >
> >  I'm trying to get the port to the AmigaOne/Teron into a fit state to
> > attempt to submit it.  I've got it working adequately in 2.6.7 (no ide
> > dma, obviously, and no floppy disk, plus other minor issues) but
> > obviously I need to get it up to the current version before asking for
> > your comments on what needs to be changed to make it acceptable.
> >
> >  Unfortunately, the following changes in 2.6.8-rc3 stop my 7455 from
> > booting (with a vga console, it stops after the console: colour VGA+
> > 80x25 message, and also the top of the screen is blank).  If I revert
> > these, it runs.  I'm totally out of my depth here, I don't even know ho=
w
> > to work out which sort of 7455 I've got, much less what this is all
> > doing.  Can anybody offer me some pointers, please ?
>
> What exact PVR do you have ? It could be your nortbridge not beeing
> properly setup for the kind of snoop cycles issued when the M bit
> is set on all pages ? In this case, it has to be fixed at that level
> (contact AmigaOne/Teron) as I will not revert that fix.
>

 Ben, thanks for the response.  Until 2 minutes ago I didn't know what
this usage of PVR was, so at the moment I haven't got a clue about what
it contains or how to read it, but I guess that's where the values in
the cpu_sec struct come from so I'll start looking.  Your comment on the
northbridge sounds depressingly likely.

Ken
--=20
 das eine Mal als Trag=F6die, das andere Mal als Farce

Re: Problem with 745x errata in 2.6.8

[Benjamin Herrenschmidt]

> this usage of PVR was, so at the moment I haven't got a clue about what
> it contains or how to read it, but I guess that's where the values in
> the cpu_sec struct come from so I'll start looking.  Your comment on the
> northbridge sounds depressingly likely.

PVR is the Processor Version Register, indicates which CPU you have

Ben.

Re: Problem with 745x errata in 2.6.8

[Ken Moffat]

On Sat, 18 Sep 2004, Benjamin Herrenschmidt wrote:

>
> > this usage of PVR was, so at the moment I haven't got a clue about what
> > it contains or how to read it, but I guess that's where the values in
> > the cpu_sec struct come from so I'll start looking.  Your comment on th=
e
> > northbridge sounds depressingly likely.
>
> PVR is the Processor Version Register, indicates which CPU you have
>
> Ben.
>
 Thanks, I'd already found that on google.  First attempt to dump mine
into a printk is building - don't hold your breathe ;-)

Ken
--=20
 das eine Mal als Trag=F6die, das andere Mal als Farce

Re: Problem with 745x errata in 2.6.8

[Ken Moffat]

On Sat, 18 Sep 2004, Ken Moffat wrote:

> On Sat, 18 Sep 2004, Benjamin Herrenschmidt wrote:
>
> >
> > PVR is the Processor Version Register, indicates which CPU you have
> >
> > Ben.
> >
>  Thanks, I'd already found that on google.  First attempt to dump mine
> into a printk is building - don't hold your breathe ;-)
>

 The PVR is 80010201 so it uses the "7455 others" code.

Ken
--=20
 das eine Mal als Trag=F6die, das andere Mal als Farce

Re: Problem with 745x errata in 2.6.8

[Benjamin Herrenschmidt]

On Sun, 2004-09-19 at 02:37, Ken Moffat wrote:
> On Sat, 18 Sep 2004, Ken Moffat wrote:
> 
> > On Sat, 18 Sep 2004, Benjamin Herrenschmidt wrote:
> >
> > >
> > > PVR is the Processor Version Register, indicates which CPU you have
> > >
> > > Ben.
> > >
> >  Thanks, I'd already found that on google.  First attempt to dump mine
> > into a printk is building - don't hold your breathe ;-)
> >
> 
>  The PVR is 80010201 so it uses the "7455 others" code.

Hrm... I invite you to read the gazillion errata for this chip rev :(

You should also contact the AmigaOS folks, they might have configured
something in the northbridge in a way that won't work when the M bit is
set but there might be a workaround. I suppose their northbridge spec is
kept behind closed door though, as it is common nowadays :(

Ben.

-- 
Benjamin Herrenschmidt <benh@kernel.crashing.org>

Re: Problem with 745x errata in 2.6.8

[Ken Moffat]

On Sun, 19 Sep 2004, Benjamin Herrenschmidt wrote:

> On Sun, 2004-09-19 at 02:37, Ken Moffat wrote:
> > On Sat, 18 Sep 2004, Ken Moffat wrote:
> >
> > > On Sat, 18 Sep 2004, Benjamin Herrenschmidt wrote:
> > >
> > > >
> > > > PVR is the Processor Version Register, indicates which CPU you have
> > > >
> > > > Ben.
> > > >
> > >  Thanks, I'd already found that on google.  First attempt to dump min=
e
> > > into a printk is building - don't hold your breathe ;-)
> > >
> >
> >  The PVR is 80010201 so it uses the "7455 others" code.
>
> Hrm... I invite you to read the gazillion errata for this chip rev :(
>

 Are they available online ?  Would I understand them ?

> You should also contact the AmigaOS folks, they might have configured
> something in the northbridge in a way that won't work when the M bit is
> set but there might be a workaround. I suppose their northbridge spec is
> kept behind closed door though, as it is common nowadays :(
>
> Ben.
>
>

 Actually, I think it's kept in a locked cupboard in a room labelled
"beware of the leopard", in a basement at the bottom of some broken
stairs.  FWIW, the option biting me is CPU_FTR_NEED_COHERENT - no real
surprises there.

 I'll have another go at trying to talk to them.  Thanks for your
responses.

Ken
--
 das eine Mal als Trag=F6die, das andere Mal als Farce

Re: Problem with 745x errata in 2.6.8

[Benjamin Herrenschmidt]

On Sun, 2004-09-19 at 20:16, Ken Moffat wrote:

>  Actually, I think it's kept in a locked cupboard in a room labelled
> "beware of the leopard", in a basement at the bottom of some broken
> stairs.  FWIW, the option biting me is CPU_FTR_NEED_COHERENT - no real
> surprises there.
> 
>  I'll have another go at trying to talk to them.  Thanks for your
> responses.

Yes, we have to set the "M" (coherent) bit on all memory pages even
when not running SMP on those CPUs to work around a CPU bug.

Ben.
 

Re: Problem with 745x errata in 2.6.8

[Benjamin Herrenschmidt]

On Sat, 2004-09-18 at 21:36, Ken Moffat wrote:
> On Sat, 18 Sep 2004, Benjamin Herrenschmidt wrote:
> 
> >
> > > this usage of PVR was, so at the moment I haven't got a clue about what
> > > it contains or how to read it, but I guess that's where the values in
> > > the cpu_sec struct come from so I'll start looking.  Your comment on the
> > > northbridge sounds depressingly likely.
> >
> > PVR is the Processor Version Register, indicates which CPU you have
> >
> > Ben.
> >
>  Thanks, I'd already found that on google.  First attempt to dump mine
> into a printk is building - don't hold your breathe ;-)

It's in /proc/cpuinfo ;)

Ben.