From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id F40F02BD7B for ; Sun, 19 Sep 2004 20:24:22 +1000 (EST) From: Benjamin Herrenschmidt To: Ken Moffat In-Reply-To: References: <1095465662.3660.3.camel@gaston> <1095502166.6545.5.camel@gaston> <1095567908.6545.12.camel@gaston> Content-Type: text/plain Message-Id: <1095589403.23182.1.camel@gaston> Mime-Version: 1.0 Date: Sun, 19 Sep 2004 20:23:23 +1000 Cc: linuxppc-dev@ozlabs.org Subject: Re: Problem with 745x errata in 2.6.8 List-Id: "Linux on PowerPC \(Including Embedded\) Developers Mail List" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Sun, 2004-09-19 at 20:16, Ken Moffat wrote: > Actually, I think it's kept in a locked cupboard in a room labelled > "beware of the leopard", in a basement at the bottom of some broken > stairs. FWIW, the option biting me is CPU_FTR_NEED_COHERENT - no real > surprises there. > > I'll have another go at trying to talk to them. Thanks for your > responses. Yes, we have to set the "M" (coherent) bit on all memory pages even when not running SMP on those CPUs to work around a CPU bug. Ben.