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From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Frank van Maarseveen <frankvm@frankvm.com>
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Date: Thu, 04 Aug 2005 11:44:08 +0200
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Cc: linuxppc-dev@ozlabs.org
Subject: Re: bug in arch/ppc/boot/common/util.S: cmplwi  cr0,r3,r4 ?
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On Wed, 2005-08-03 at 15:18 +0200, Frank van Maarseveen wrote:
> I think "cmplwi" expects an immediate vale as last operand
> around line 255 of arch/ppc/boot/common/util.S:
> 
> 	addi	r4,r4,_etext@l		# r8 = &_etext
> 1:	dcbf	r0,r3			# Flush the data cache
> 	icbi	r0,r3			# Invalidate the instruction cache
> 	addi	r3,r3,0x10		# Increment by one cache line
> 	cmplwi	cr0,r3,r4		# Are we at the end yet?
> 	               ^^
> 	blt	1b			# No, keep flushing and invalidating
> 
> I guess it should have been:
> 
> 	cmplw	cr0,r3,r4		# Are we at the end yet?

Yup, looks like a real bug to me, Tom ?

Ben.