From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Benjamin Herrenschmidt To: Dan Malek In-Reply-To: <02de724e66fe23fd23a3635c8b6f049f@embeddededge.com> References: <1132032910.23979.6.camel@gaston> <00eecfdbd5bccc7b293d847033121eee@freescale.com> <1132108490.5646.67.camel@gaston> <02de724e66fe23fd23a3635c8b6f049f@embeddededge.com> Content-Type: text/plain Date: Wed, 16 Nov 2005 16:00:35 +1100 Message-Id: <1132117236.5646.75.camel@gaston> Mime-Version: 1.0 Cc: linuxppc-dev list , linuxppc64-dev Subject: Re: [PATCH] powerpc: Merge align.c List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, 2005-11-15 at 23:26 -0500, Dan Malek wrote: > On Nov 15, 2005, at 9:34 PM, Benjamin Herrenschmidt wrote: > > > What about lwz/stw cropssing page boundaries ? Is this handled in HW ? > > Yep. All of these hardware alignment support features on > the Freescale processors are the reasons they are used > so extensively in data communication processing (where > unaligned data can sometimes occur). All of the load/store > alignment issues are handled in the cache subsystem, so > to the external world all you really see are cache line > operations. In the event of uncached data operations, you > get the performance penalty of two bus accesses, where > some of the data is discarded. Oh well, I suppose I'll have to dig out paulus' 601 based mac :) Becky, can you send me a copy of your testcase ? Ben.