From: Grant Likely <grant.likely@secretlab.ca>
To: mporter@kernel.crashing.org, linuxppc-embedded@ozlabs.org
Subject: [PATCH 4/8] Add Virtex-4 FX to cpu table
Date: Fri, 30 Dec 2005 03:29:58 -0700 [thread overview]
Message-ID: <1135938598732-git-send-email-grant.likely@secretlab.ca> (raw)
In-Reply-To: <11359385973413-git-send-email-grant.likely@secretlab.ca>
Add Virtex-4 FX to cpu table
Signed-off-by: Grant C. Likely <grant.likely@secretlab.ca>
---
arch/ppc/kernel/cputable.c | 13 ++++++++++++-
1 files changed, 12 insertions(+), 1 deletions(-)
e42625e6e14442f0b315699d872ccc4cc3d4d49d
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index 6b76cf5..7f3faf1 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -859,7 +859,7 @@ struct cpu_spec cpu_specs[] = {
.dcache_bsize = 32,
},
{ /* Xilinx Virtex-II Pro */
- .pvr_mask = 0xffff0000,
+ .pvr_mask = 0xfffff000,
.pvr_value = 0x20010000,
.cpu_name = "Virtex-II Pro",
.cpu_features = CPU_FTR_SPLIT_ID_CACHE |
@@ -869,6 +869,17 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
},
+ { /* Xilinx Virtex-4 */
+ .pvr_mask = 0xfffff000,
+ .pvr_value = 0x20011000,
+ .cpu_name = "Virtex-4 FX",
+ .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
+ CPU_FTR_USE_TB,
+ .cpu_user_features = PPC_FEATURE_32 |
+ PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ },
{ /* 405EP */
.pvr_mask = 0xffff0000,
.pvr_value = 0x51210000,
--
1.0.6-g58e3
next prev parent reply other threads:[~2005-12-30 10:51 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-12-30 10:29 [PATCH 0/8] Migration to platform bus for Virtex devices Grant Likely
2005-12-30 10:29 ` [PATCH 1/8] Move xparameters.h into xilinx specific directory Grant Likely
2005-12-30 10:29 ` [PATCH 3/8] Generalize Xilinx Virtex-II/IV support files Grant Likely
2005-12-30 10:29 ` [PATCH 2/8] Add xparameters file for Xilinx ML403 reference design Grant Likely
2005-12-30 10:29 ` Grant Likely [this message]
2005-12-30 10:29 ` [PATCH 7/8] Migrate ML300 reference design to the platform bus Grant Likely
2005-12-30 10:29 ` [PATCH 8/8] Add support for Xilinx ML403 reference design Grant Likely
[not found] ` <43B5E37A.4020008@dlasys.net>
2005-12-31 3:58 ` Grant Likely
2005-12-31 16:34 ` David H. Lynch Jr.
2006-01-02 16:26 ` Grant Likely
2006-01-04 6:00 ` [RFC] Pico E12 (Xilinx V4) patches to 2.6.15 David H. Lynch Jr.
2006-01-04 23:18 ` RESEND:[RFC] " David H. Lynch Jr.
[not found] ` <43BF0736.4050703@secretlab.ca>
2006-01-07 6:55 ` David H. Lynch Jr.
2006-01-08 21:40 ` [RFC] Patches for Xilinx UartLite " David H. Lynch Jr.
2005-12-30 10:29 ` [PATCH 6/8] Migrate Xilinx Vertex support from the OCP bus to the platfom bus Grant Likely
2005-12-30 10:29 ` [PATCH 5/8] defconfigs for Xilinx ML300 and ML403 reference designs Grant Likely
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