From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp104.biz.mail.re2.yahoo.com (smtp104.biz.mail.re2.yahoo.com [206.190.52.173]) by ozlabs.org (Postfix) with SMTP id 3427C67A60 for ; Tue, 11 Apr 2006 06:23:31 +1000 (EST) Subject: Re: GPIO endianness on MPC8349 From: Ben Warren To: Kumar Gala In-Reply-To: <6518EE00-812C-4839-AF00-AA976C35E799@kernel.crashing.org> References: <1144698501.972.103.camel@saruman.qstreams.net> <6518EE00-812C-4839-AF00-AA976C35E799@kernel.crashing.org> Content-Type: multipart/alternative; boundary="=-COjB6G4tG7SKsdMisbPa" Date: Mon, 10 Apr 2006 16:20:20 -0400 Message-Id: <1144700420.972.112.camel@saruman.qstreams.net> Mime-Version: 1.0 Cc: linuxppc-embedded@ozlabs.org Reply-To: bwarren@qstreams.com List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , --=-COjB6G4tG7SKsdMisbPa Content-Type: text/plain Content-Transfer-Encoding: 7bit Sorry for wasting bandwidth (again). Turns out my schematic is for an earlier spin of the board. regards, Ben On Mon, 2006-04-10 at 15:06 -0500, Kumar Gala wrote: > On Apr 10, 2006, at 2:48 PM, Ben Warren wrote: > > > Hello, > > > > I'm a noobie to this CPU, and am utterly confused with how the bits > > are > > ordered on the GPIO ports. I imagine it's the same as all Freescale > > PPCs, but who knows. Anyway... > > > > Using an MPC8349MDS eval board, I have one LED to play with. From the > > schematic, it's connected to GPIO1[1]. From other processors that > > I've > > worked with, I would have expected to toggle it with either 0x40000000 > > (IBM 405) or 0x00000002 (68360). Nope. To make this bit move, I mess > > with bit 0x00000040 in the appropriate DAT register. This leads me to > > believe that either the bit ordering is something > > like ...89abcdef01234567 (sorry for the confusing notation, but > > hopefully it makes sense) or the schematic has a typo. Since I'm > > trying > > to write a generic GPIO handler, I'd like to have a little > > confidence in > > my extrapolation from a single point. > > > > Can anybody shed some light on this? > > This is because the Freescale docs are misleading. If you look at > the schematic you will see the LED is wired to GPIO1[5] which makes > sense for the 0x40 value you have to use. > > - kumar --=-COjB6G4tG7SKsdMisbPa Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: 7bit Sorry for wasting bandwidth (again). Turns out my schematic is for an earlier spin of the board.

regards,
Ben

On Mon, 2006-04-10 at 15:06 -0500, Kumar Gala wrote:

On Apr 10, 2006, at 2:48 PM, Ben Warren wrote:

> Hello,
>
> I'm a noobie to this CPU, and am utterly confused with how the bits  
> are
> ordered on the GPIO ports.  I imagine it's the same as all Freescale
> PPCs, but who knows.  Anyway...
>
> Using an MPC8349MDS eval board, I have one LED to play with.  From the
> schematic, it's connected to GPIO1[1].  From other processors that  
> I've
> worked with, I would have expected to toggle it with either 0x40000000
> (IBM 405) or 0x00000002 (68360).  Nope.  To make this bit move, I mess
> with bit 0x00000040 in the appropriate DAT register.  This leads me to
> believe that either the bit ordering is something
> like ...89abcdef01234567 (sorry for the confusing notation, but
> hopefully it makes sense) or the schematic has a typo.  Since I'm  
> trying
> to write a generic GPIO handler, I'd like to have a little  
> confidence in
> my extrapolation from a single point.
>
> Can anybody shed some light on this?

This is because the Freescale docs are misleading.  If you look at  
the schematic you will see the LED is wired to GPIO1[5] which makes  
sense for the 0x40 value you have to use.

- kumar

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