From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id 58A6067A3E for ; Thu, 18 May 2006 10:48:34 +1000 (EST) Subject: Re: [PATCH/2.6.17-rc4 2/10] Powerpc: Add Tundra Semiconductor tsi108 macro define From: Benjamin Herrenschmidt To: Zang Roy-r61911 In-Reply-To: <9FCDBA58F226D911B202000BDBAD46730626D61C@zch01exm40.ap.freescale.net> References: <9FCDBA58F226D911B202000BDBAD46730626D61C@zch01exm40.ap.freescale.net> Content-Type: text/plain Date: Thu, 18 May 2006 10:48:23 +1000 Message-Id: <1147913303.10703.51.camel@localhost.localdomain> Mime-Version: 1.0 Cc: linuxppc-dev list , Yang Xin-Xin-r48390 , Paul Mackerras , Alexandre.Bounine@tundra.com List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , > +/* Mapping of MPIC outputs to processors' interrupt pins */ > + > +#define IDIR_INT_OUT0 0x1 > +#define IDIR_INT_OUT1 0x2 > +#define IDIR_INT_OUT2 0x4 > +#define IDIR_INT_OUT3 0x8 All this mapping should be provided by the device-tree > +/* Error codes */ > + > +#define MPIC_OK 0 > +#define MPIC_ERROR 1 What the heck are these for ? Ben.