[RFC] Current Lite5200b patchset

[RFC] Current Lite5200b patchset

[Grant Likely]

Sylvain;

As promised, here's the patchset that I'm currently working on for the
Lite5200.  This depends on Nicolas' pic patch.  Right now I've got the
kernel booting w/ log output upto trying to run init.

You'll also need to get the lite5200 device tree patch for u-boot off the
u-boot-users mailing list, and the device tree compiler from www.jdl.com.

Device tree is compiled w/:
$ dtc -V 0x10 -f -O dtb arch/powerpc/boot/dts/lite5200b.dts > lite5200b.dtb

When you boot the kernel, use 'bootm <kernel> <initrd> <dtb>'

[PATCH] [POWERPC] Device tree for Freescale Lite5200(b) eval board

[Grant Likely]

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/powerpc/boot/dts/lite5200b.dts |  268 +++++++++++++++++++++++++++++++++++
 1 files changed, 268 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
new file mode 100644
index 0000000..5863ce5
--- /dev/null
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -0,0 +1,268 @@
+/*
+ * Lite5200b board Device Tree Source
+ *
+ * Copyright 2006 Secret Lab Technologies Ltd.
+ * Grant Likely <grant.likely@secretlab.ca>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/ {
+	model = "Lite5200b";
+	compatible = "mpc5200b\0mpc52xx";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#cpus = <1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,5200@0 {
+			device_type = "cpu";
+			reg = <0>;
+			d-cache-line-size = <20>;
+			i-cache-line-size = <20>;
+			d-cache-size = <4000>;		// L1, 16K
+			i-cache-size = <4000>;		// L1, 16K
+			timebase-frequency = <0>;	// from bootloader
+			bus-frequency = <0>;		// from bootloader
+			clock-frequency = <0>;		// from bootloader
+			32-bit;
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <00000000 10000000>;	// 256MB
+	};
+
+	soc5200@f0000000 {
+		#interrupt-cells = <2>;
+		device_type = "soc";
+		ranges = <0 f0000000 f0010000>;
+		reg = <f0000000 00010000>;
+		bus-frequency = <0>;		// from bootloader
+
+		pic@500 {
+			// 5200 interrupts are encoded into two levels;
+			// Level 1 is 2 bits; [CRIT=0,MAIN=1,PERF=2,SDMA=3]
+			// Level 2 is 6 bits
+			// The levels are encoded into the lower byte of
+			// a single cell; // in binary: 1122 2222
+			linux,phandle = <500>;
+			interrupt-controller;
+			device_type = "interrupt_controller";
+			compatible = "mpc5200b-pic\0mpc52xx-pic";
+			reg = <500 80>;
+			built-in;
+		};
+
+		gpt@600 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <600 10>;
+			interrupts = <49 2>;
+			interrupt-parent = <500>;
+		};
+
+		gpt@610 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <610 10>;
+			interrupts = <4a 2>;
+			interrupt-parent = <500>;
+		};
+
+		gpt@620 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <620 10>;
+			interrupts = <4b 2>;
+			interrupt-parent = <500>;
+		};
+
+		gpt@630 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <630 10>;
+			interrupts = <4c 2>;
+			interrupt-parent = <500>;
+		};
+
+		gpt@640 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <640 10>;
+			interrupts = <4d 2>;
+			interrupt-parent = <500>;
+		};
+
+		gpt@650 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <650 10>;
+			interrupts = <4e 2>;
+			interrupt-parent = <500>;
+		};
+
+		gpt@660 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <660 10>;
+			interrupts = <4f 2>;
+			interrupt-parent = <500>;
+		};
+
+		gpt@670 {	// General Purpose Timer
+			compatible = "mpc5200b-gpt\0mpc52xx-gpt";
+			device_type = "gpt";
+			reg = <670 10>;
+			interrupts = <50 2>;
+			interrupt-parent = <500>;
+		};
+
+		rtc@800 {	// Real time clock
+			compatible = "mpc5200-rtc";
+			device_type = "rtc";
+			reg = <800 100>;
+			interrupts = <45 2 46 2>;
+			interrupt-parent = <500>;
+		};
+
+		mscan@900 {
+			device_type = "mscan";
+			compatible = "mpc5200-mscan";
+			interrupts = <91 2>;
+			interrupt-parent = <500>;
+			reg = <900 80>;
+		};
+
+		mscan@980 {
+			device_type = "mscan";
+			compatible = "mpc5200-mscan";
+			interrupts = <52 2>;
+			interrupt-parent = <500>;
+			reg = <980 80>;
+		};
+
+		pci@0d00 {
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			compatible = "mpc5200-pci";
+			// I actually know very little about setting up PCI,
+			// so anything here would just be pulled out of my
+			// butt.  Instead I'll leave these placeholders until
+			// I figure out what it should be
+			//
+			// interrupt-map-mask = <>;
+			// interrupt-map = <>;
+			// bus-range = <>;
+			// ranges = <>;
+			//
+			clock-frequency = <3f940aa>;
+			interrupts = <88 2 89 2 8a 2>;
+			interrupt-parent = <500>;
+		};
+
+		spi@f00 {
+			device_type = "spi";
+			compatible = "mpc5200-spi";
+			reg = <f00 20>;
+			interrupts = <8d 2 20e 2>;
+			interrupt-parent = <500>;
+		};
+
+		serial@2000 {		// PSC1
+			device_type = "serial";
+			compatible = "mpc5200b-psc\0mpc52xx-psc";
+			port-number = <0>;  // Logical port assignment
+			reg = <2000 100>;
+			interrupts = <81 2>;
+			interrupt-parent = <500>;
+		};
+
+		// PSC2 in spi mode example
+		spi@2200 {		// PSC2
+			device_type = "spi";
+			compatible = "mpc5200b-psc\0mpc52xx-psc";
+			reg = <2200 100>;
+			interrupts = <82 2>;
+			interrupt-parent = <500>;
+		};
+
+		// PSC3 in CODEC mode example
+		i2s@2400 {		// PSC3
+			device_type = "i2s";
+			compatible = "mpc5200b-psc\0mpc52xx-psc";
+			reg = <2400 100>;
+			interrupts = <83 2>;
+			interrupt-parent = <500>;
+		};
+
+		// PSC4 unconfigured
+		//serial@2600 {		// PSC4
+		//	device_type = "serial";
+		//	compatible = "mpc5200b-psc\0mpc52xx-psc";
+		//	reg = <2600 100>;
+		//	interrupts = <8b 2>;
+		//	interrupt-parent = <500>;
+		//};
+
+		// PSC5 unconfigured
+		//serial@2800 {		// PSC5
+		//	device_type = "serial";
+		//	compatible = "mpc5200b-psc\0mpc52xx-psc";
+		//	reg = <2800 100>;
+		//	interrupts = <8c 2>;
+		//	interrupt-parent = <500>;
+		//};
+
+		// PSC6 in AC97 mode example
+		ac97@2c00 {		// PSC6
+			device_type = "ac97";
+			compatible = "mpc5200b-psc\0mpc52xx-psc";
+			reg = <2c00 100>;
+			interrupts = <84 2>;
+			interrupt-parent = <500>;
+		};
+
+		ethernet@3000 {
+			device_type = "network";
+			compatible = "mpc5200-fec";
+			reg = <3000 800>;
+			mac-address = [ 02 03 04 05 06 07 ]; // Bad!
+			interrupts = <85 2>;
+			interrupt-parent = <500>;
+		};
+
+		ata@3a00 {
+			device_type = "ata";
+			compatible = "mpc5200-ata";
+			reg = <3a00 100>;
+			interrupts = <87 2>;
+			interrupt-parent = <500>;
+		};
+
+		i2c@3d00 {
+			device_type = "i2c";
+			compatible = "mpc5200-i2c";
+			reg = <3d00 40>;
+			interrupts = <8f 2>;
+			interrupt-parent = <500>;
+		};
+
+		i2c@3d40 {
+			device_type = "i2c";
+			compatible = "mpc5200-i2c";
+			reg = <3d40 40>;
+			interrupts = <90 2>;
+			interrupt-parent = <500>;
+		};
+	};
+};
-- 
1.4.3.rc2.g0503

[PATCH] [POWERPC] MPC52xx is a 6xx variant, remove PPC_52xx config option

[Grant Likely]

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/powerpc/Kconfig |    5 -----
 1 files changed, 0 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index f9b11c1..6bff8b7 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -126,11 +126,6 @@ config CLASSIC32
 	  systems, 64 bit IBM RS/6000 or an Apple G5, choose 6xx.
 	  Note that the kernel runs in 32-bit mode even on 64-bit chips.
 
-config PPC_52xx
-	bool "Freescale 52xx"
-	select 6xx
-	select PPC_FPU
-	
 config PPC_82xx
 	bool "Freescale 82xx"
 	select 6xx
-- 
1.4.3.rc2.g0503

[PATCH] [POWERPC] Cleanup pegasos i8259 not in device tree workaround.

[Grant Likely]

Only make assumptions about i8259 presence if ppc_md.get_irq is not set.
Previous workaround only checked chrp_mpic value.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/powerpc/platforms/chrp/setup.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 49b8dab..a5466ed 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -451,7 +451,7 @@ static void __init chrp_find_8259(void)
 	 * we have a pegasos that claims to be chrp but doesn't have
 	 * a proper interrupt tree
 	 */
-	if (pic == NULL && chrp_mpic != NULL) {
+	if (pic == NULL && ppc_md.get_irq != NULL) {
 		printk(KERN_ERR "i8259: Not found in device-tree"
 		       " assuming no legacy interrupts\n");
 		return;
-- 
1.4.3.rc2.g0503

[PATCH] [POWERPC] whitespace cleanup

[Grant Likely]

Performed here to make the next patch (of_platform support) cleaner...  And,
yes, I know that whitespace patches are debatable, but I'm being lazy and this
is easier that trying to take my whitespace changes back out.  :P

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 drivers/serial/mpc52xx_uart.c |  114 ++++++++++++++++++++---------------------
 1 files changed, 56 insertions(+), 58 deletions(-)

diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 4f80c5b..29c9300 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -1,6 +1,4 @@
 /*
- * drivers/serial/mpc52xx_uart.c
- *
  * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  *
  * FIXME According to the usermanual the status bits in the status register
@@ -14,18 +12,18 @@
  *
  *
  * Maintainer : Sylvain Munaut <tnt@246tNt.com>
- * 
+ *
  * Some of the code has been inspired/copied from the 2.4 code written
  * by Dale Farnsworth <dfarnsworth@mvista.com>.
- * 
+ *
  * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
  * Copyright (C) 2003 MontaVista, Software, Inc.
- * 
+ *
  * This file is licensed under the terms of the GNU General Public License
  * version 2. This program is licensed "as is" without any warranty of any
  * kind, whether express or implied.
  */
- 
+
 /* Platform device Usage :
  *
  * Since PSCs can have multiple function, the correct driver for each one
@@ -101,27 +99,27 @@ #endif
 /* UART operations                                                          */
 /* ======================================================================== */
 
-static unsigned int 
+static unsigned int
 mpc52xx_uart_tx_empty(struct uart_port *port)
 {
 	int status = in_be16(&PSC(port)->mpc52xx_psc_status);
 	return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
 }
 
-static void 
+static void
 mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
 {
 	/* Not implemented */
 }
 
-static unsigned int 
+static unsigned int
 mpc52xx_uart_get_mctrl(struct uart_port *port)
 {
 	/* Not implemented */
 	return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 }
 
-static void 
+static void
 mpc52xx_uart_stop_tx(struct uart_port *port)
 {
 	/* port->lock taken by caller */
@@ -129,7 +127,7 @@ mpc52xx_uart_stop_tx(struct uart_port *p
 	out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 }
 
-static void 
+static void
 mpc52xx_uart_start_tx(struct uart_port *port)
 {
 	/* port->lock taken by caller */
@@ -137,12 +135,12 @@ mpc52xx_uart_start_tx(struct uart_port *
 	out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 }
 
-static void 
+static void
 mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
 {
 	unsigned long flags;
 	spin_lock_irqsave(&port->lock, flags);
-	
+
 	port->x_char = ch;
 	if (ch) {
 		/* Make sure tx interrupts are on */
@@ -150,7 +148,7 @@ mpc52xx_uart_send_xchar(struct uart_port
 		port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
 		out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
 	}
-	
+
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 
@@ -178,7 +176,7 @@ mpc52xx_uart_break_ctl(struct uart_port 
 		out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
 	else
 		out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
-	
+
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 
@@ -197,11 +195,11 @@ mpc52xx_uart_startup(struct uart_port *p
 	/* Reset/activate the port, clear and enable interrupts */
 	out_8(&psc->command,MPC52xx_PSC_RST_RX);
 	out_8(&psc->command,MPC52xx_PSC_RST_TX);
-	
+
 	out_be32(&psc->sicr,0);	/* UART mode DCD ignored */
 
 	out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
-	
+
 	out_8(&psc->rfcntl, 0x00);
 	out_be16(&psc->rfalarm, 0x1ff);
 	out_8(&psc->tfcntl, 0x07);
@@ -209,10 +207,10 @@ mpc52xx_uart_startup(struct uart_port *p
 
 	port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
 	out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
-	
+
 	out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
 	out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
-		
+
 	return 0;
 }
 
@@ -220,19 +218,19 @@ static void
 mpc52xx_uart_shutdown(struct uart_port *port)
 {
 	struct mpc52xx_psc __iomem *psc = PSC(port);
-	
+
 	/* Shut down the port, interrupt and all */
 	out_8(&psc->command,MPC52xx_PSC_RST_RX);
 	out_8(&psc->command,MPC52xx_PSC_RST_TX);
-	
-	port->read_status_mask = 0; 
+
+	port->read_status_mask = 0;
 	out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
 
 	/* Release interrupt */
 	free_irq(port->irq, port);
 }
 
-static void 
+static void
 mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
                          struct termios *old)
 {
@@ -241,10 +239,10 @@ mpc52xx_uart_set_termios(struct uart_por
 	unsigned char mr1, mr2;
 	unsigned short ctr;
 	unsigned int j, baud, quot;
-	
+
 	/* Prepare what we're gonna write */
 	mr1 = 0;
-	
+
 	switch (new->c_cflag & CSIZE) {
 		case CS5:	mr1 |= MPC52xx_PSC_MODE_5_BITS;
 				break;
@@ -261,8 +259,8 @@ mpc52xx_uart_set_termios(struct uart_por
 			MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
 	} else
 		mr1 |= MPC52xx_PSC_MODE_PARNONE;
-	
-	
+
+
 	mr2 = 0;
 
 	if (new->c_cflag & CSTOPB)
@@ -276,7 +274,7 @@ mpc52xx_uart_set_termios(struct uart_por
 	baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
 	quot = uart_get_divisor(port, baud);
 	ctr = quot & 0xffff;
-	
+
 	/* Get the lock */
 	spin_lock_irqsave(&port->lock, flags);
 
@@ -290,14 +288,14 @@ mpc52xx_uart_set_termios(struct uart_por
 	 * boot for the console, all stuff is not yet ready to receive at that
 	 * time and that just makes the kernel oops */
 	/* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
-	while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && 
+	while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
 	       --j)
 		udelay(1);
 
 	if (!j)
 		printk(	KERN_ERR "mpc52xx_uart.c: "
 			"Unable to flush RX & TX fifos in-time in set_termios."
-			"Some chars may have been lost.\n" ); 
+			"Some chars may have been lost.\n" );
 
 	/* Reset the TX & RX */
 	out_8(&psc->command,MPC52xx_PSC_RST_RX);
@@ -309,7 +307,7 @@ mpc52xx_uart_set_termios(struct uart_por
 	out_8(&psc->mode,mr2);
 	out_8(&psc->ctur,ctr >> 8);
 	out_8(&psc->ctlr,ctr & 0xff);
-	
+
 	/* Reenable TX & RX */
 	out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
 	out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
@@ -373,7 +371,7 @@ mpc52xx_uart_verify_port(struct uart_por
 
 	if ( (ser->irq != port->irq) ||
 	     (ser->io_type != SERIAL_IO_MEM) ||
-	     (ser->baud_base != port->uartclk)  || 
+	     (ser->baud_base != port->uartclk)  ||
 	     (ser->iomem_base != (void*)port->mapbase) ||
 	     (ser->hub6 != 0 ) )
 		return -EINVAL;
@@ -404,11 +402,11 @@ static struct uart_ops mpc52xx_uart_ops 
 	.verify_port	= mpc52xx_uart_verify_port
 };
 
-	
+
 /* ======================================================================== */
 /* Interrupt handling                                                       */
 /* ======================================================================== */
-	
+
 static inline int
 mpc52xx_uart_int_rx_chars(struct uart_port *port)
 {
@@ -435,11 +433,11 @@ #endif
 
 		flag = TTY_NORMAL;
 		port->icount.rx++;
-	
+
 		if ( status & (MPC52xx_PSC_SR_PE |
 		               MPC52xx_PSC_SR_FE |
 		               MPC52xx_PSC_SR_RB) ) {
-			
+
 			if (status & MPC52xx_PSC_SR_RB) {
 				flag = TTY_BREAK;
 				uart_handle_break(port);
@@ -464,7 +462,7 @@ #endif
 	}
 
 	tty_flip_buffer_push(tty);
-	
+
 	return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
 }
 
@@ -509,25 +507,25 @@ mpc52xx_uart_int_tx_chars(struct uart_po
 	return 1;
 }
 
-static irqreturn_t 
+static irqreturn_t
 mpc52xx_uart_int(int irq, void *dev_id)
 {
 	struct uart_port *port = dev_id;
 	unsigned long pass = ISR_PASS_LIMIT;
 	unsigned int keepgoing;
 	unsigned short status;
-	
+
 	spin_lock(&port->lock);
-	
+
 	/* While we have stuff to do, we continue */
 	do {
 		/* If we don't find anything to do, we stop */
-		keepgoing = 0; 
-		
+		keepgoing = 0;
+
 		/* Read status */
 		status = in_be16(&PSC(port)->mpc52xx_psc_isr);
 		status &= port->read_status_mask;
-			
+
 		/* Do we need to receive chars ? */
 		/* For this RX interrupts must be on and some chars waiting */
 		if ( status & MPC52xx_PSC_IMR_RXRDY )
@@ -537,15 +535,15 @@ mpc52xx_uart_int(int irq, void *dev_id)
 		/* For this, TX must be ready and TX interrupt enabled */
 		if ( status & MPC52xx_PSC_IMR_TXRDY )
 			keepgoing |= mpc52xx_uart_int_tx_chars(port);
-		
+
 		/* Limit number of iteration */
 		if ( !(--pass) )
 			keepgoing = 0;
 
 	} while (keepgoing);
-	
+
 	spin_unlock(&port->lock);
-	
+
 	return IRQ_HANDLED;
 }
 
@@ -566,7 +564,7 @@ mpc52xx_console_get_options(struct uart_
 	/* Read the mode registers */
 	out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
 	mr1 = in_8(&psc->mode);
-	
+
 	/* CT{U,L}R are write-only ! */
 	*baud = __res.bi_baudrate ?
 		__res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
@@ -579,26 +577,26 @@ mpc52xx_console_get_options(struct uart_
 		case MPC52xx_PSC_MODE_8_BITS:
 		default:			*bits = 8;
 	}
-	
+
 	if (mr1 & MPC52xx_PSC_MODE_PARNONE)
 		*parity = 'n';
 	else
 		*parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
 }
 
-static void  
+static void
 mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
 {
 	struct uart_port *port = &mpc52xx_uart_ports[co->index];
 	struct mpc52xx_psc __iomem *psc = PSC(port);
 	unsigned int i, j;
-	
+
 	/* Disable interrupts */
 	out_be16(&psc->mpc52xx_psc_imr, 0);
 
 	/* Wait the TX buffer to be empty */
-	j = 5000000;	/* Maximum wait */	
-	while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) && 
+	j = 5000000;	/* Maximum wait */
+	while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
 	       --j)
 		udelay(1);
 
@@ -607,13 +605,13 @@ mpc52xx_console_write(struct console *co
 		/* Line return handling */
 		if (*s == '\n')
 			out_8(&psc->mpc52xx_psc_buffer_8, '\r');
-		
+
 		/* Send the char */
 		out_8(&psc->mpc52xx_psc_buffer_8, *s);
 
 		/* Wait the TX buffer to be empty */
-		j = 20000;	/* Maximum wait */	
-		while (!(in_be16(&psc->mpc52xx_psc_status) & 
+		j = 20000;	/* Maximum wait */
+		while (!(in_be16(&psc->mpc52xx_psc_status) &
 		         MPC52xx_PSC_SR_TXEMP) && --j)
 			udelay(1);
 	}
@@ -634,7 +632,7 @@ mpc52xx_console_setup(struct console *co
 
 	if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
 		return -EINVAL;
-	
+
 	/* Basic port init. Needed since we use some uart_??? func before
 	 * real init for early access */
 	spin_lock_init(&port->lock);
@@ -669,8 +667,8 @@ static struct console mpc52xx_console = 
 	.data	= &mpc52xx_uart_driver,
 };
 
-	
-static int __init 
+
+static int __init
 mpc52xx_console_init(void)
 {
 	register_console(&mpc52xx_console);
-- 
1.4.3.rc2.g0503

[PATCH] [POWERPC] Move mpc52xx-psc uart driver to of_device from platform_device

[Grant Likely]

As part of the transition to arch/powerpc, this patch moves the mpc5200 PSC
driver over to the OF platform bus infrastructure.

This patch is not acceptable for mainline as-is because it breaks arch/ppc
support for the mpc52xx.  More rework is needed to allow it to compile for
either arch (or alternately, fork the driver)

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 drivers/serial/mpc52xx_uart.c |  146 +++++++++++++++++++++++++++++------------
 1 files changed, 105 insertions(+), 41 deletions(-)

diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 29c9300..09bf8e0 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -42,7 +42,8 @@
  * will be mapped to.
  */
 
-#include <linux/platform_device.h>
+#define DEBUG
+
 #include <linux/module.h>
 #include <linux/tty.h>
 #include <linux/serial.h>
@@ -51,6 +52,7 @@ #include <linux/console.h>
 
 #include <asm/delay.h>
 #include <asm/io.h>
+#include <asm/of_device.h>
 
 #include <asm/mpc52xx.h>
 #include <asm/mpc52xx_psc.h>
@@ -371,7 +373,7 @@ mpc52xx_uart_verify_port(struct uart_por
 
 	if ( (ser->irq != port->irq) ||
 	     (ser->io_type != SERIAL_IO_MEM) ||
-	     (ser->baud_base != port->uartclk)  ||
+	     (ser->baud_base != port->uartclk) ||
 	     (ser->iomem_base != (void*)port->mapbase) ||
 	     (ser->hub6 != 0 ) )
 		return -EINVAL;
@@ -561,13 +563,13 @@ mpc52xx_console_get_options(struct uart_
 	struct mpc52xx_psc __iomem *psc = PSC(port);
 	unsigned char mr1;
 
+	pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
 	/* Read the mode registers */
 	out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
 	mr1 = in_8(&psc->mode);
 
 	/* CT{U,L}R are write-only ! */
-	*baud = __res.bi_baudrate ?
-		__res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
+	*baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
 
 	/* Parse them */
 	switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
@@ -604,10 +606,10 @@ mpc52xx_console_write(struct console *co
 	for (i = 0; i < count; i++, s++) {
 		/* Line return handling */
 		if (*s == '\n')
-			out_8(&psc->mpc52xx_psc_buffer_8, '\r');
+			out_8(&psc->buffer.buffer_8, '\r');
 
 		/* Send the char */
-		out_8(&psc->mpc52xx_psc_buffer_8, *s);
+		out_8(&psc->buffer.buffer_8, *s);
 
 		/* Wait the TX buffer to be empty */
 		j = 20000;	/* Maximum wait */
@@ -624,33 +626,74 @@ static int __init
 mpc52xx_console_setup(struct console *co, char *options)
 {
 	struct uart_port *port = &mpc52xx_uart_ports[co->index];
+	struct device_node *np = NULL;
+	struct device_node *np_idx;
+	const void *pp = NULL;
+	struct resource res;
+	int index = 0;
+	int ret;
 
 	int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
 	int bits = 8;
 	int parity = 'n';
 	int flow = 'n';
 
-	if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
+	pr_debug("mpc52xx_console_setup co=%p, options=%s, index=%i\n",
+		 co, options, co->index);
+
+	while ((np = of_find_compatible_node(np, "serial", "mpc52xx-psc"))) {
+		if (index == co->index)
+			break;
+		index++;
+	}
+
+	if (!np) {
+		pr_debug("PSC%x not found in device tree\n", co->index);
+		return -EINVAL;
+	}
+
+	/* Fetch register locations */
+	if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
+		pr_debug("Could not get resources for PSC%x\n", index);
+		return ret;
+	}
+
+	/* Search for bus-frequency property in this node or a parent */
+	np_idx = np;
+	while (np_idx) {
+		if ((pp = get_property(np_idx, "bus-frequency", NULL)) != NULL)
+			break;
+		np_idx = of_get_parent(np_idx);
+	}
+	if (!pp) {
+		pr_debug("Could not find bus-frequency property!\n");
 		return -EINVAL;
+	}
 
 	/* Basic port init. Needed since we use some uart_??? func before
 	 * real init for early access */
 	spin_lock_init(&port->lock);
-	port->uartclk	= __res.bi_ipbfreq / 2; /* Look at CTLR doc */
+	port->uartclk	= *(const u32*)pp / 2;
 	port->ops	= &mpc52xx_uart_ops;
-	port->mapbase	= MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
+	port->mapbase = res.start;
+	port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
+	port->irq = irq_of_parse_and_map(np, 0);
 
-	/* We ioremap ourself */
-	port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
 	if (port->membase == NULL)
 		return -EINVAL;
 
+	pr_debug("mpc52xx_psc at %lx mapped to %p; irq=%x freq=%i\n",
+	         port->mapbase, port->membase, port->irq, port->uartclk);
+
 	/* Setup the port parameters accoding to options */
 	if (options)
 		uart_parse_options(options, &baud, &parity, &bits, &flow);
 	else
 		mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
 
+	pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
+	         baud, bits, parity, flow);
+
 	return uart_set_options(port, co, baud, parity, bits, flow);
 }
 
@@ -703,28 +746,26 @@ static struct uart_driver mpc52xx_uart_d
 /* ======================================================================== */
 
 static int __devinit
-mpc52xx_uart_probe(struct platform_device *dev)
+mpc52xx_uart_probe(struct of_device *op, const struct of_device_id *match)
 {
-	struct resource *res = dev->resource;
-
+	static int idx = 0;
 	struct uart_port *port = NULL;
-	int i, idx, ret;
+	struct resource res;
+	int ret;
+
+	printk("Got here!\n");
+	dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
 
 	/* Check validity & presence */
-	idx = dev->id;
-	if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
+	if (idx >= MPC52xx_PSC_MAXNUM)
 		return -EINVAL;
 
-	if (!mpc52xx_match_psc_function(idx,"uart"))
-		return -ENODEV;
-
 	/* Init the port structure */
 	port = &mpc52xx_uart_ports[idx];
 
 	memset(port, 0x00, sizeof(struct uart_port));
 
 	spin_lock_init(&port->lock);
-	port->uartclk	= __res.bi_ipbfreq / 2; /* Look at CTLR doc */
 	port->fifosize	= 512;
 	port->iotype	= UPIO_MEM;
 	port->flags	= UPF_BOOT_AUTOCONF |
@@ -733,29 +774,36 @@ mpc52xx_uart_probe(struct platform_devic
 	port->ops	= &mpc52xx_uart_ops;
 
 	/* Search for IRQ and mapbase */
-	for (i=0 ; i<dev->num_resources ; i++, res++) {
-		if (res->flags & IORESOURCE_MEM)
-			port->mapbase = res->start;
-		else if (res->flags & IORESOURCE_IRQ)
-			port->irq = res->start;
-	}
-	if (!port->irq || !port->mapbase)
+	if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
+		return ret;
+
+	port->mapbase = res.start;
+	port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
+	port->irq = irq_of_parse_and_map(op->node, 0);
+
+	dev_dbg(&op->dev, "mpc52xx-psc UART at %lx. mapped to %p, irq %x\n",
+	         port->mapbase, port->membase, port->irq);
+
+	//if (!port->irq || !port->mapbase) {
+	if (!port->mapbase) {
+		printk(KERN_ERR "Could not allocate resources for PSC\n");
 		return -EINVAL;
+	}
 
 	/* Add the port to the uart sub-system */
 	ret = uart_add_one_port(&mpc52xx_uart_driver, port);
 	if (!ret)
-		platform_set_drvdata(dev, (void*)port);
+		dev_set_drvdata(&op->dev, (void*)port);
 
+	idx++;
 	return ret;
 }
 
 static int
-mpc52xx_uart_remove(struct platform_device *dev)
+mpc52xx_uart_remove(struct of_device *op)
 {
-	struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
-
-	platform_set_drvdata(dev, NULL);
+	struct uart_port *port = dev_get_drvdata(&op->dev);
+	dev_set_drvdata(&op->dev, NULL);
 
 	if (port)
 		uart_remove_one_port(&mpc52xx_uart_driver, port);
@@ -787,7 +835,19 @@ mpc52xx_uart_resume(struct platform_devi
 }
 #endif
 
-static struct platform_driver mpc52xx_uart_platform_driver = {
+static struct of_device_id mpc52xx_uart_match[] = {
+	{
+		.name = "serial",
+		.compatible = "mpc52xx-psc",
+	},
+	{},
+};
+MODULE_DEVICE_TABLE(of, mpc52xx_uart_match);
+
+static struct of_platform_driver mpc52xx_uart_of_driver = {
+	.owner		= THIS_MODULE,
+	.name		= "mpc52xx-uart",
+	.match_table	= mpc52xx_uart_match,
 	.probe		= mpc52xx_uart_probe,
 	.remove		= mpc52xx_uart_remove,
 #ifdef CONFIG_PM
@@ -811,20 +871,24 @@ mpc52xx_uart_init(void)
 
 	printk(KERN_INFO "Serial: MPC52xx PSC driver\n");
 
-	ret = uart_register_driver(&mpc52xx_uart_driver);
-	if (ret == 0) {
-		ret = platform_driver_register(&mpc52xx_uart_platform_driver);
-		if (ret)
-			uart_unregister_driver(&mpc52xx_uart_driver);
+	if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
+		printk(KERN_ERR "Could not register mpc52xx uart driver\n");
+		return ret;
 	}
 
-	return ret;
+	if ((ret = of_register_driver(&mpc52xx_uart_of_driver)) != 0) {
+		printk(KERN_ERR "Could not register mpc52xx of driver\n");
+		uart_unregister_driver(&mpc52xx_uart_driver);
+		return ret;
+	}
+
+	return 0;
 }
 
 static void __exit
 mpc52xx_uart_exit(void)
 {
-	platform_driver_unregister(&mpc52xx_uart_platform_driver);
+	of_unregister_driver(&mpc52xx_uart_of_driver);
 	uart_unregister_driver(&mpc52xx_uart_driver);
 }
 
-- 
1.4.3.rc2.g0503

[PATCH] [POWERPC] Remove unneeded memset from mpc52xx_psc_uart probe function

[Grant Likely]

This allows the console to continue to work after initializing the port
for full serial access.  However, this is not a proper fix.  The init
behaviour between console and serial driver access must be reengineered

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 drivers/serial/mpc52xx_uart.c |    3 ---
 1 files changed, 0 insertions(+), 3 deletions(-)

diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 09bf8e0..f194010 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -753,7 +753,6 @@ mpc52xx_uart_probe(struct of_device *op,
 	struct resource res;
 	int ret;
 
-	printk("Got here!\n");
 	dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
 
 	/* Check validity & presence */
@@ -763,8 +762,6 @@ mpc52xx_uart_probe(struct of_device *op,
 	/* Init the port structure */
 	port = &mpc52xx_uart_ports[idx];
 
-	memset(port, 0x00, sizeof(struct uart_port));
-
 	spin_lock_init(&port->lock);
 	port->fifosize	= 512;
 	port->iotype	= UPIO_MEM;
-- 
1.4.3.rc2.g0503

[PATCH] [POWERPC] Add support for lite5200b to arch/powerpc

[Grant Likely]

Here is an inital attempt at porting the lite5200b to arch/powerpc.  Many
things are probably missing/broken

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/powerpc/platforms/embedded6xx/Makefile   |    1 +
 arch/powerpc/platforms/embedded6xx/lite5200.c |  156 +++++++++++++++++++++++++
 2 files changed, 157 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index fa499fe..a33f34d 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -2,3 +2,4 @@ #
 # Makefile for the 6xx/7xx/7xxxx linux kernel.
 #
 obj-$(CONFIG_MPC7448HPC2)	+= mpc7448_hpc2.o
+obj-$(CONFIG_LITE5200)		+= lite5200.o
diff --git a/arch/powerpc/platforms/embedded6xx/lite5200.c b/arch/powerpc/platforms/embedded6xx/lite5200.c
new file mode 100644
index 0000000..fd14dec
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/lite5200.c
@@ -0,0 +1,156 @@
+/*
+ * Freescale Lite5200 board support
+ *
+ * Written by: Grant Likely <grant.likely@secretlab.ca>
+ *
+ * Copyright (C) Secret Lab Technologies Ltd. 2006. All rights reserved.
+ * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
+ *
+ * Description:
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#define DEBUG
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+#include <asm/of_device.h>
+
+#include <asm/mpc52xx.h>
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+
+static int __init mpc52xx_declare_of_platform_devices(void)
+{
+	struct device_node *np;
+	struct device_node *cnp = NULL;
+	const u32 *base;
+	char *name;
+
+	/* Find every child of the SOC node and add it to of_platform */
+	np = of_find_node_by_name(NULL, "soc5200");
+	if (np) {
+		while ((cnp = of_get_next_child(np, cnp))) {
+			name = kmalloc(BUS_ID_SIZE, GFP_KERNEL);
+			strcpy(name, cnp->name);
+
+			base = get_property(cnp, "reg", NULL);
+			if (base)
+				sprintf(name+strlen(name), "@%x", *base);
+
+			of_platform_device_create(cnp, name, NULL);
+		}
+	}
+
+	return 0;
+}
+
+device_initcall(mpc52xx_declare_of_platform_devices);
+
+static void __init lite5200_setup_arch(void)
+{
+	struct device_node *np;
+
+	if (ppc_md.progress)
+		ppc_md.progress("lite5200_setup_arch()", 0);
+
+	np = of_find_node_by_type(NULL, "cpu");
+	if (np) {
+		unsigned int *fp =
+		    (int *)get_property(np, "clock-frequency", NULL);
+		if (fp != 0)
+			loops_per_jiffy = *fp / HZ;
+		else
+			loops_per_jiffy = 50000000 / HZ;
+		of_node_put(np);
+	}
+
+#ifdef CONFIG_PCI
+	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+		add_bridge(np);
+
+	ppc_md.pci_swizzle = common_swizzle;
+	ppc_md.pci_exclude_device = mpc52xx_exclude_device;
+#endif
+
+#ifdef CONFIG_BLK_DEV_INITRD
+	if (initrd_start)
+		ROOT_DEV = Root_RAM0;
+	else
+#endif
+#ifdef  CONFIG_ROOT_NFS
+		ROOT_DEV = Root_NFS;
+#else
+		ROOT_DEV = Root_HDA1;
+#endif
+}
+
+void lite5200_show_cpuinfo(struct seq_file *m)
+{
+	seq_printf(m, "vendor\t\t:	Freescale Semiconductor\n");
+	seq_printf(m, "machine\t\t:	Lite5200\n");
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init lite5200_probe(void)
+{
+	char *compatible = of_get_flat_dt_prop(of_get_flat_dt_root(),
+	                                       "compatible", NULL);
+
+	if (compatible == NULL)
+		return 0;
+	if (strcmp(compatible, "mpc5200"))
+		return 0;
+
+	pr_debug("%s-based board found\n", compatible);
+
+	return 1;
+}
+
+define_machine(mpc52xx) {
+	.name 		= "mpc52xx",
+	.probe 		= lite5200_probe,
+	.setup_arch 	= lite5200_setup_arch,
+	.init_IRQ 	= mpc52xx_init_irq,
+	.show_cpuinfo	= lite5200_show_cpuinfo,
+	.calibrate_decr	= generic_calibrate_decr,
+};
-- 
1.4.3.rc2.g0503

Re: [RFC] Current Lite5200b patchset

[Jon Loeliger]

On Wed, 2006-11-01 at 02:39, Grant Likely wrote:

> You'll also need to get the lite5200 device tree patch for u-boot off the
> u-boot-users mailing list, and the device tree compiler from www.jdl.com.
> 
> Device tree is compiled w/:
> $ dtc -V 0x10 -f -O dtb arch/powerpc/boot/dts/lite5200b.dts > lite5200b.dtb

And note that I just made -V 0x10 the default!

jdl

Re: [PATCH] [POWERPC] Move mpc52xx-psc uart driver to of_device from platform_device

[Nicolas DET]

[-- Attachment #1: Type: text/plain, Size: 925 bytes --]

Grant Likely wrote:
> As part of the transition to arch/powerpc, this patch moves the mpc5200 PSC
> driver over to the OF platform bus infrastructure.
> 
> This patch is not acceptable for mainline as-is because it breaks arch/ppc
> support for the mpc52xx.  More rework is needed to allow it to compile for
> either arch (or alternately, fork the driver)
> 

It has been hard to apply on 2.6.19-rc4 but it seems to perform well.
I add to add some entries in mpc52xx_uart_match[]

In now looks like this:
static struct of_device_id mpc52xx_uart_match[] = {
	{
		.name = "serial",
		.compatible = "mpc52xx-psc",
	},
	{
		.name = "serial",
		.compatible = "mpc52xx-serial",
	},
	{
		.name = "serial",
		.compatible = "mpc5200-psc",
	},
	{
		.name = "serial",
		.compatible = "mpc5200-serial",
	},
	{},
};


By the way, why not using mpc52xx_uart_match[] to also in 
mpc52xx_console_setup() to track down any devices?

Regards,

[-- Attachment #2: nd.vcf --]
[-- Type: text/x-vcard, Size: 249 bytes --]

begin:vcard
fn:Nicolas DET ( bplan GmbH )
n:DET;Nicolas
org:bplan GmbH
adr:;;;;;;Germany
email;internet:nd@bplan-gmbh.de
title:Software Entwicklung
tel;work:+49 6171 9187 - 31
x-mozilla-html:FALSE
url:http://www.bplan-gmbh.de
version:2.1
end:vcard

Re: [PATCH] [POWERPC] Move mpc52xx-psc uart driver to of_device from platform_device

[Grant Likely]

On 11/1/06, Nicolas DET <nd@bplan-gmbh.de> wrote:
> Grant Likely wrote:
> > As part of the transition to arch/powerpc, this patch moves the mpc5200 PSC
> > driver over to the OF platform bus infrastructure.
> >
> > This patch is not acceptable for mainline as-is because it breaks arch/ppc
> > support for the mpc52xx.  More rework is needed to allow it to compile for
> > either arch (or alternately, fork the driver)
> >
>
> It has been hard to apply on 2.6.19-rc4 but it seems to perform well.
> I add to add some entries in mpc52xx_uart_match[]

Good news, thanks for the feedback. I take it you are able to use the
serial port with this driver?

>
> In now looks like this:
> static struct of_device_id mpc52xx_uart_match[] = {
>         {
>                 .name = "serial",
>                 .compatible = "mpc52xx-psc",
>         },
>         {
>                 .name = "serial",
>                 .compatible = "mpc52xx-serial",
>         },
>         {
>                 .name = "serial",
>                 .compatible = "mpc5200-psc",
>         },
>         {
>                 .name = "serial",
>                 .compatible = "mpc5200-serial",
>         },
>         {},
> };

I'd rather not do this for the mainline code.  I'd rather define a
naming convention and all of us use it.  We're early enough in this
process that we can do that since there are only two major boards
(lite5200 & Efika) on track to be supported in mainline ATM.

Having 4 compatibility blocks to support 2 boards is over-engineering.  :)

>
> By the way, why not using mpc52xx_uart_match[] to also in
> mpc52xx_console_setup() to track down any devices?

Because I hadn't thought of that, and therefore have not decided if
that's a good idea!  :)  I'll take a look.

g.

-- 
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195

Re: [PATCH] [POWERPC] Move mpc52xx-psc uart driver to of_device from platform_device

[Nicolas DET]

[-- Attachment #1: Type: text/plain, Size: 1706 bytes --]

Grant Likely wrote:
> On 11/1/06, Nicolas DET <nd@bplan-gmbh.de> wrote:
>> Grant Likely wrote:
>> > As part of the transition to arch/powerpc, this patch moves the 
>> mpc5200 PSC
>> > driver over to the OF platform bus infrastructure.
>> >
>> > This patch is not acceptable for mainline as-is because it breaks 
>> arch/ppc
>> > support for the mpc52xx.  More rework is needed to allow it to 
>> compile for
>> > either arch (or alternately, fork the driver)
>> >
>>
>> It has been hard to apply on 2.6.19-rc4 but it seems to perform well.
>> I add to add some entries in mpc52xx_uart_match[]
> 
> Good news, thanks for the feedback. I take it you are able to use the
> serial port with this driver?

Yes.

>>
>> In now looks like this:
>> static struct of_device_id mpc52xx_uart_match[] = {
>>         {
>>                 .name = "serial",
>>                 .compatible = "mpc52xx-psc",
>>         },
>>         {
>>                 .name = "serial",
>>                 .compatible = "mpc52xx-serial",
>>         },
>>         {
>>                 .name = "serial",
>>                 .compatible = "mpc5200-psc",
>>         },
>>         {
>>                 .name = "serial",
>>                 .compatible = "mpc5200-serial",
>>         },
>>         {},
>> };
> 
> I'd rather not do this for the mainline code.  I'd rather define a
> naming convention and all of us use it.  We're early enough in this
> process that we can do that since there are only two major boards
> (lite5200 & Efika) on track to be supported in mainline ATM.
> 
> Having 4 compatibility blocks to support 2 boards is over-engineering.  :)

Ok. Efika will have "mpc5200-serial' inside the "compatible" property.

Regards,




[-- Attachment #2: nd.vcf --]
[-- Type: text/x-vcard, Size: 249 bytes --]

begin:vcard
fn:Nicolas DET ( bplan GmbH )
n:DET;Nicolas
org:bplan GmbH
adr:;;;;;;Germany
email;internet:nd@bplan-gmbh.de
title:Software Entwicklung
tel;work:+49 6171 9187 - 31
x-mozilla-html:FALSE
url:http://www.bplan-gmbh.de
version:2.1
end:vcard