From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Randy Dunlap <randy.dunlap@oracle.com>
Cc: scsi <linux-scsi@vger.kernel.org>,
Matthew Wilcox <matthew@wil.cx>, gregkh <greg@kroah.com>,
David Somayajulu <david.somayajulu@qlogic.com>,
linuxppc-dev@ozlabs.org,
Andrew Vasquez <andrew.vasquez@qlogic.com>,
linux-driver@qlogic.com, PCI <linux-pci@atrey.karlin.mff.cuni.cz>
Subject: Re: qla_wxyz pci_set_mwi question
Date: Fri, 13 Apr 2007 12:43:43 +1000 [thread overview]
Message-ID: <1176432224.5764.59.camel@localhost.localdomain> (raw)
In-Reply-To: <461EEDAA.7090503@oracle.com>
> Willy was referring to this from include/asm-powerpc/pci.h:
>
> #ifdef CONFIG_PPC64
>
> /*
> * We want to avoid touching the cacheline size or MWI bit.
> * pSeries firmware sets the cacheline size (which is not the cpu cacheline
> * size in all cases) and hardware treats MWI the same as memory write.
> */
> #define PCI_DISABLE_MWI
>
>
> which makes pci_set_mwi() do nothing other than return 0;
Interesting... I think I missed that we had that bit for some time :-)
Well, I suppose that on pSeries and probably pmac too, the firmware will
set the MWI bit for us anyway, but that's a bit dodgy to apply that to
all ppc64... they aren't all pSeries.
I'll have to look into that again one of these days.
Cheers,
Ben.
next prev parent reply other threads:[~2007-04-13 2:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20070411221507.69c97257.randy.dunlap@oracle.com>
[not found] ` <20070412172038.GG10124@andrew-vasquezs-computer.local>
[not found] ` <20070412185347.GL26692@parisc-linux.org>
[not found] ` <20070412193713.GB14510@andrew-vasquezs-computer.local>
2007-04-12 20:04 ` qla_wxyz pci_set_mwi question Matthew Wilcox
2007-04-13 2:34 ` Benjamin Herrenschmidt
2007-04-13 2:40 ` Randy Dunlap
2007-04-13 2:43 ` Benjamin Herrenschmidt [this message]
2007-05-03 17:44 ` Andrew Vasquez
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