ML403 and PPC4xx_DMA ?

ML403 and PPC4xx_DMA ?

[Joachim Förster]

Hi all,

I have a question regarding the PowerPC 405 Core on the Xilinx ML403
board and DMA . The Linux kernel has an option called CONFIG_PPC4xx_DMA.
Do all/some PowerPC 4xx Cores have an integrated DMA Controller? I tried
to find some documentation about this DMA Controller in several Xilinx
and IBM manuals which cover the PowerPC 405 Core - but I didn't find
anything.
So, my question is: Does the Virtex-4 FX12 PowerPC 405 Core on the ML403
have such DMA Controller? If yes, is it usable within Linux to transfer
data from RAM to a device's hardware buffers (typical task of a DMA
controller)?

Thanks,
 Joachim

PS: I tried to compile a kernel image with CONFIG_PPC4xx_DMA enabled,
but gcc complains about missing definitions in ppc4xx_dma.c ... e.g.
DCRN_DMASR (defined in ibm405.h). Well I guess I have to have
DCRN_MASR_BASE defined in xparameters_ml403.h .... but defined to what?

Re: ML403 and PPC4xx_DMA ?

[rvk]

The core itself for 405 will not have DCR: Device control registers - becau=
se
no device control bus. Have to look at board spec for whether there is a
replacement and what that is. Based on other comments you are on uncertain
ground, likely defining a few things yourself. Interesting that the base
header has a dep for DCRN based on that config.  I assume you have UG011 do=
c
from the Xilinx website.=20

Joachim F=C3=B6rster wrote:
>=20
> Hi all,
>=20
> PS: I tried to compile a kernel image with CONFIG_PPC4xx_DMA enabled,
> but gcc complains about missing definitions in ppc4xx_dma.c ... e.g.
> DCRN_DMASR (defined in ibm405.h). Well I guess I have to have
> DCRN_MASR_BASE defined in xparameters_ml403.h .... but defined to what?
>=20
>=20
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>=20
>=20

--=20
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RE: ML403 and PPC4xx_DMA ?

[Rick Moleres]

Joachim,

The Xilinx PPC405 core does not have an integrated DMA controller.

-----Original Message-----
From: linuxppc-embedded-bounces+moleres=3Dxilinx.com@ozlabs.org =
[mailto:linuxppc-embedded-bounces+moleres=3Dxilinx.com@ozlabs.org] On =
Behalf Of Joachim F=F6rster
Sent: Thursday, April 26, 2007 10:06 AM
To: linuxppc-embedded@ozlabs.org
Subject: ML403 and PPC4xx_DMA ?

Hi all,

I have a question regarding the PowerPC 405 Core on the Xilinx ML403
board and DMA . The Linux kernel has an option called CONFIG_PPC4xx_DMA.
Do all/some PowerPC 4xx Cores have an integrated DMA Controller? I tried
to find some documentation about this DMA Controller in several Xilinx
and IBM manuals which cover the PowerPC 405 Core - but I didn't find
anything.
So, my question is: Does the Virtex-4 FX12 PowerPC 405 Core on the ML403
have such DMA Controller? If yes, is it usable within Linux to transfer
data from RAM to a device's hardware buffers (typical task of a DMA
controller)?

Thanks,
 Joachim

PS: I tried to compile a kernel image with CONFIG_PPC4xx_DMA enabled,
but gcc complains about missing definitions in ppc4xx_dma.c ... e.g.
DCRN_DMASR (defined in ibm405.h). Well I guess I have to have
DCRN_MASR_BASE defined in xparameters_ml403.h .... but defined to what?


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