From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from kuber.nabble.com (kuber.nabble.com [216.139.236.158]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id 42236DDEB6 for ; Wed, 25 Jul 2007 14:44:58 +1000 (EST) Received: from isper.nabble.com ([192.168.236.156]) by kuber.nabble.com with esmtp (Exim 4.63) (envelope-from ) id 1IDYk3-00049q-58 for linuxppc-embedded@ozlabs.org; Tue, 24 Jul 2007 21:44:55 -0700 Message-ID: <11776097.post@talk.nabble.com> Date: Tue, 24 Jul 2007 21:44:55 -0700 (PDT) From: Misbah khan To: linuxppc-embedded@ozlabs.org Subject: Re: Interrupts on xilinx ml403 In-Reply-To: <11765540.post@talk.nabble.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii References: <11708607.post@talk.nabble.com> <11758237.post@talk.nabble.com> <11765540.post@talk.nabble.com> List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , hi ... Well you are always welcome to contact me . Just look at the configuration of registers are proper or not and you have followed Bigendian format or not. more than 90 % of the problem comes when you dont configure the controler registers properly. ----Misbah Mirek23 wrote: > > I will try to go further with that after trying Grant's suggestion. When I > still have a problem I will contact you. > > Best Regards > > Mirek > > Misbah khan wrote: >> >> hi .. >> >> If you could send me the code and the config related doc . I could then >> be able to suggest you something. As per the understanding of the problem >> i guess you are not congiguring the interrupt controller properly. you >> have to use correct IRQ no for that ports then other configuration such >> as interrupt type, and whenever you service the interrupt you have to >> clear the interrupt etc are to be taken care ....Please see the interrupt >> controller register and do your settings correctly . If the same persists >> then you please send me the code and the documents then only i could give >> the exact explaination on this >> >> ----misbah >> >> Mirek23 wrote: >>> >>> Dear All, >>> >>> I use linux kernel 2.6 on ppc405 of my Avnet (xilinx like ml403) >>> evaluation board. >>> >>> I have setup the virtex-4 FPGA to deal with Themac and Serial >>> interfaces. As input/output devices I have chosen 8 LEDs and DIP >>> Switches. >>> >>> With such a configuration I am able to control from Linux user >>> applications via GPIO driver the LEDs and DIP Switches. >>> >>> Right now I just wanted to make use of the interrupts. I have configured >>> the Dip switches to use interrupt. The interrupt accoures when the DIP >>> Switches state has changed. >>> >>> In the BSP generated by EDK 9.1 I see that macro : >>> >>> #define XPAR_DIP_SWITCHES_8BIT_INTERRUPT_PRESENT 1 >>> >>> has changed from zero to one. >>> The macro XPAR_INTC_MAX_NUM_INTR_INPUTS is set to 1 as it was before. >>> This is due to the fact that >>> TEMAC uses one interrupt line. >>> >>> Does it mean that DIP Switches do not use INTC interrupt controller? >>> How to handle the DIP Switches interrupt? >>> Does the Interrupt handler routine have to acknowledge the interrupt >>> from Dip Switches? >>> >>> Many thanks in advance for any hint on that. >>> >>> Best Regards >>> >>> Mirek >>> >>> >>> >>> >>> >>> >> >> > > -- View this message in context: http://www.nabble.com/Interrupts-on-xilinx-ml403-tf4117226.html#a11776097 Sent from the linuxppc-embedded mailing list archive at Nabble.com.