[PATCH 0/7] Revised Xilinx virtex establish sanity patchset

[PATCH 0/7] Revised Xilinx virtex establish sanity patchset

[Grant Likely]

Based on received comments, I posting this revised patchset for Virtex
cleanup in arch/ppc.  Changes from the last set include Kconfig tweaks,
support for more than 4 serial ports, xparams fixups pulled from Xilinx
code.  Biggest change is the move to use ppcboot.h for bd_t definition
which makes u-boot work correctly with the in-tree virtex ports.

Paul, I believe this patch set is ready for merging.  You can also pull
it from the 'virtex-forupstream' branch of my git tree if you prefer:

git://git.secretlab.ca/git/linux-2.6.git virtex-forupstream

Cheers,
g.

--- original description:

The Virtex support in Linus' tree is a mess.  When I ported the common
devices over to using the platform bus I tried the use the ppc_sys
infrastructure.  ppc_sys is intended for SoCs that have a fixed set of
devices.  It is the *wrong* approach for FPGA support, and I made a
royal mess of things.  This patch set fixes that problem and makes
a number of other changes that make supporting Virtex boards easier.

I do know that changes to arch/ppc are frowned upon at the moment.  However,
4xx support in arch/powerpc is not merged yet, and Virtex support needs
additional work beyond that.  I suspect that arch/ppc support for the
4xx parts is going to need to stay alive for the next 2-3 kernel releases
anyway while arch/powerpc support stablizes.  Getting these patches in
will make it easier to support the Virtex ports while I hack on getting
arch/powerpc stuff figured out.

[PATCH 0/7] Revised Xilinx virtex establish sanity patchset

[Grant Likely]

Paul, I believe this patch set is ready for merging.  You can also pull
it from the 'virtex-forupstream' branch of my git tree if you prefer:

git://git.secretlab.ca/git/linux-2.6.git virtex-forupstream

Cheers,
g.

--- original description:

The Virtex support in Linus' tree is a mess.  When I ported the common
devices over to using the platform bus I tried the use the ppc_sys
infrastructure.  ppc_sys is intended for SoCs that have a fixed set of
devices.  It is the *wrong* approach for FPGA support, and I made a
royal mess of things.  This patch set fixes that problem and makes
a number of other changes that make supporting Virtex boards easier.

I do know that changes to arch/ppc are frowned upon at the moment.  However,
4xx support in arch/powerpc is not merged yet, and Virtex support needs
additional work beyond that.  I suspect that arch/ppc support for the
4xx parts is going to need to stay alive for the next 2-3 kernel releases
anyway while arch/powerpc support stablizes.  Getting these patches in
will make it easier to support the Virtex ports while I hack on getting
arch/powerpc stuff figured out.

[PATCH 1/7] [PPC] Rework Kconfig dependancies for Xilinx Virtex ppc405 platform

[Grant Likely]

Reverse dependency order for Xilinx Virtex parts.  For these parts, It
makes more sense for boards/chips to specify which features they
provide instead of the features listing the parts they are implemented
in.  I think it also makes adding new board ports simpler.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
 arch/ppc/platforms/4xx/Kconfig |   15 +++++++--------
 1 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
index 705ae56..76551b6 100644
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -29,6 +29,7 @@ config CPCI405
 
 config EP405
 	bool "EP405/EP405PC"
+	select EMBEDDEDBOOT
 	help
 	  This option enables support for the EP405/EP405PC boards.
 
@@ -54,11 +55,15 @@ config WALNUT
 
 config XILINX_ML300
 	bool "Xilinx-ML300"
+	select XILINX_VIRTEX_II_PRO
+	select EMBEDDEDBOOT
 	help
 	  This option enables support for the Xilinx ML300 evaluation board.
 
 config XILINX_ML403
 	bool "Xilinx-ML403"
+	select XILINX_VIRTEX_4_FX
+	select EMBEDDEDBOOT
 	help
 	  This option enables support for the Xilinx ML403 evaluation board.
 endchoice
@@ -215,18 +220,14 @@ config 405GPR
 
 config XILINX_VIRTEX_II_PRO
 	bool
-	depends on XILINX_ML300
-	default y
+	select XILINX_VIRTEX
 
 config XILINX_VIRTEX_4_FX
 	bool
-	depends on XILINX_ML403
-	default y
+	select XILINX_VIRTEX
 
 config XILINX_VIRTEX
 	bool
-	depends on XILINX_VIRTEX_II_PRO || XILINX_VIRTEX_4_FX
-	default y
 
 config STB03xxx
 	bool
@@ -235,8 +236,6 @@ config STB03xxx
 
 config EMBEDDEDBOOT
 	bool
-	depends on EP405 || XILINX_ML300 || XILINX_ML403
-	default y
 
 config IBM_OPENBIOS
 	bool
-- 
1.5.1

[PATCH 2/7] [PPC] Merge common virtex header files

[Grant Likely]

The header files for the ml403 and ml300 are virtually identical, merge
them into a single file.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/ppc/platforms/4xx/virtex.h       |   40 +++++++++++++++++++-------
 arch/ppc/platforms/4xx/xilinx_ml300.c |    1 +
 arch/ppc/platforms/4xx/xilinx_ml300.h |   45 ------------------------------
 arch/ppc/platforms/4xx/xilinx_ml403.c |    1 +
 arch/ppc/platforms/4xx/xilinx_ml403.h |   49 ---------------------------------
 include/asm-ppc/ibm4xx.h              |    8 +----
 6 files changed, 33 insertions(+), 111 deletions(-)
 delete mode 100644 arch/ppc/platforms/4xx/xilinx_ml300.h
 delete mode 100644 arch/ppc/platforms/4xx/xilinx_ml403.h

diff --git a/arch/ppc/platforms/4xx/virtex.h b/arch/ppc/platforms/4xx/virtex.h
index c14325d..e9f58a7 100644
--- a/arch/ppc/platforms/4xx/virtex.h
+++ b/arch/ppc/platforms/4xx/virtex.h
@@ -1,22 +1,18 @@
 /*
- * arch/ppc/platforms/4xx/virtex.h
+ * Basic Virtex platform defines, included by <asm/ibm4xx.h>
  *
- * Include file that defines the Xilinx Virtex-II Pro processor
+ * 2005-2007 (c) Secret Lab Technologies Ltd.
+ * 2002-2004 (c) MontaVista Software, Inc.
  *
- * Author: MontaVista Software, Inc.
- *         source@mvista.com
- *
- * 2002-2004 (c) MontaVista Software, Inc.  This file is licensed under the
- * terms of the GNU General Public License version 2.  This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
  */
 
 #ifdef __KERNEL__
 #ifndef __ASM_VIRTEX_H__
 #define __ASM_VIRTEX_H__
 
-/* serial defines */
-
 #include <asm/ibm405.h>
 
 /* Ugly, ugly, ugly! BASE_BAUD defined here to keep 8250.c happy. */
@@ -29,7 +25,29 @@
 enum ppc_sys_devices {
 	VIRTEX_UART, NUM_PPC_SYS_DEVS,
 };
-#endif
   
+typedef struct board_info {
+	unsigned int	 bi_memsize;		/* DRAM installed, in bytes */
+	unsigned char	 bi_enetaddr[6];	/* Local Ethernet MAC address */
+	unsigned int	 bi_intfreq;		/* Processor speed, in Hz */
+	unsigned int	 bi_busfreq;		/* PLB Bus speed, in Hz */
+	unsigned int	 bi_pci_busfreq;	/* PCI Bus speed, in Hz */
+} bd_t;
+
+/* Some 4xx parts use a different timebase frequency from the internal clock.
+ * the Virtex 405 does not, so just use a macro to make tbfreq match intfreq
+*/
+#define bi_tbfreq bi_intfreq
+
+extern const char* virtex_machine_name;
+#define PPC4xx_MACHINE_NAME (virtex_machine_name)
+
+#endif /* !__ASSEMBLY__ */
+
+/* We don't need anything mapped.  Size of zero will accomplish that. */
+#define PPC4xx_ONB_IO_PADDR	0u
+#define PPC4xx_ONB_IO_VADDR	0u
+#define PPC4xx_ONB_IO_SIZE	0u
+
 #endif				/* __ASM_VIRTEX_H__ */
 #endif				/* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.c b/arch/ppc/platforms/4xx/xilinx_ml300.c
index fb5f0b5..4e4aca4 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml300.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml300.c
@@ -68,6 +68,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
 		},
 	},
 };
+const char* virtex_machine_name = "ML300 Reference Design";
 
 #if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
 
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.h b/arch/ppc/platforms/4xx/xilinx_ml300.h
deleted file mode 100644
index 3d57332..0000000
--- a/arch/ppc/platforms/4xx/xilinx_ml300.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * Include file that defines the Xilinx ML300 evaluation board
- *
- * Author: MontaVista Software, Inc.
- *         source@mvista.com
- *
- * 2002-2004 (c) MontaVista Software, Inc.  This file is licensed under the
- * terms of the GNU General Public License version 2.  This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_XILINX_ML300_H__
-#define __ASM_XILINX_ML300_H__
-
-/* ML300 has a Xilinx Virtex-II Pro processor */
-#include <platforms/4xx/virtex.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-typedef struct board_info {
-	unsigned int	 bi_memsize;		/* DRAM installed, in bytes */
-	unsigned char	 bi_enetaddr[6];	/* Local Ethernet MAC address */
-	unsigned int	 bi_intfreq;		/* Processor speed, in Hz */
-	unsigned int	 bi_busfreq;		/* PLB Bus speed, in Hz */
-	unsigned int	 bi_pci_busfreq;	/* PCI Bus speed, in Hz */
-} bd_t;
-
-/* Some 4xx parts use a different timebase frequency from the internal clock.
-*/
-#define bi_tbfreq bi_intfreq
-
-#endif /* !__ASSEMBLY__ */
-
-/* We don't need anything mapped.  Size of zero will accomplish that. */
-#define PPC4xx_ONB_IO_PADDR	0u
-#define PPC4xx_ONB_IO_VADDR	0u
-#define PPC4xx_ONB_IO_SIZE	0u
-
-#define PPC4xx_MACHINE_NAME "Xilinx ML300 Reference System"
-
-#endif /* __ASM_XILINX_ML300_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.c b/arch/ppc/platforms/4xx/xilinx_ml403.c
index cb3bf7a..c98e40a 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml403.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml403.c
@@ -72,6 +72,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
 		},
 	},
 };
+const char* virtex_machine_name = "ML403 Reference Design";
 
 #if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
 
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.h b/arch/ppc/platforms/4xx/xilinx_ml403.h
deleted file mode 100644
index 4735969..0000000
--- a/arch/ppc/platforms/4xx/xilinx_ml403.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * arch/ppc/platforms/4xx/xilinx_ml403.h
- *
- * Include file that defines the Xilinx ML403 reference design
- *
- * Author: Grant Likely <grant.likely@secretlab.ca>
- *
- * 2005 (c) Secret Lab Technologies Ltd.
- * 2002-2004 (c) MontaVista Software, Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2.  This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_XILINX_ML403_H__
-#define __ASM_XILINX_ML403_H__
-
-/* ML403 has a Xilinx Virtex-4 FPGA with a PPC405 hard core */
-#include <platforms/4xx/virtex.h>
-
-#ifndef __ASSEMBLY__
-
-#include <linux/types.h>
-
-typedef struct board_info {
-	unsigned int	 bi_memsize;		/* DRAM installed, in bytes */
-	unsigned char	 bi_enetaddr[6];	/* Local Ethernet MAC address */
-	unsigned int	 bi_intfreq;		/* Processor speed, in Hz */
-	unsigned int	 bi_busfreq;		/* PLB Bus speed, in Hz */
-	unsigned int	 bi_pci_busfreq;	/* PCI Bus speed, in Hz */
-} bd_t;
-
-/* Some 4xx parts use a different timebase frequency from the internal clock.
-*/
-#define bi_tbfreq bi_intfreq
-
-#endif /* !__ASSEMBLY__ */
-
-/* We don't need anything mapped.  Size of zero will accomplish that. */
-#define PPC4xx_ONB_IO_PADDR	0u
-#define PPC4xx_ONB_IO_VADDR	0u
-#define PPC4xx_ONB_IO_SIZE	0u
-
-#define PPC4xx_MACHINE_NAME "Xilinx ML403 Reference Design"
-
-#endif /* __ASM_XILINX_ML403_H__ */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h
index 92fd02d..ed6891a 100644
--- a/include/asm-ppc/ibm4xx.h
+++ b/include/asm-ppc/ibm4xx.h
@@ -47,12 +47,8 @@
 #include <platforms/4xx/walnut.h>
 #endif
 
-#if defined(CONFIG_XILINX_ML300)
-#include <platforms/4xx/xilinx_ml300.h>
-#endif
-
-#if defined(CONFIG_XILINX_ML403)
-#include <platforms/4xx/xilinx_ml403.h>
+#if defined(CONFIG_XILINX_VIRTEX)
+#include <platforms/4xx/virtex.h>
 #endif
 
 #ifndef __ASSEMBLY__
-- 
1.5.1

[PATCH 3/7] [PPC] New registration for common Xilinx Virtex ppc405 platform devices

[Grant Likely]

Currently virtex support in mainline make use of the infrastructure in
arch/ppc/syslib/ppc_sys.c for registering common devices on virtex ppc405
platforms.  The ppc_sys.c code is not well suited to the dynamic nature of
FPGA designs and makes adding new board ports more complex.  This patch
adds a new listing of common devices which does not depend on the ppc_sys.c
infrastructure.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/ppc/syslib/virtex_devices.c |  233 ++++++++++++++++++++++++++++++++++++++
 arch/ppc/syslib/virtex_devices.h |   27 +++++
 2 files changed, 260 insertions(+), 0 deletions(-)
 create mode 100644 arch/ppc/syslib/virtex_devices.c
 create mode 100644 arch/ppc/syslib/virtex_devices.h

diff --git a/arch/ppc/syslib/virtex_devices.c b/arch/ppc/syslib/virtex_devices.c
new file mode 100644
index 0000000..1654678
--- /dev/null
+++ b/arch/ppc/syslib/virtex_devices.c
@@ -0,0 +1,233 @@
+/*
+ * Virtex hard ppc405 core common device listing
+ *
+ * Copyright 2005-2007 Secret Lab Technologies Ltd.
+ * Copyright 2005 Freescale Semiconductor Inc.
+ * Copyright 2002-2004 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/serial_8250.h>
+#include <syslib/virtex_devices.h>
+#include <platforms/4xx/xparameters/xparameters.h>
+#include <asm/io.h>
+
+/*
+ * UARTLITE: shortcut macro for single instance
+ */
+#define XPAR_UARTLITE(num) { \
+	.name = "uartlite", \
+	.id = num, \
+	.num_resources = 2, \
+	.resource = (struct resource[]) { \
+		{ \
+			.start = XPAR_UARTLITE_##num##_BASEADDR + 3, \
+			.end = XPAR_UARTLITE_##num##_HIGHADDR, \
+			.flags = IORESOURCE_MEM, \
+		}, \
+		{ \
+			.start = XPAR_INTC_0_UARTLITE_##num##_VEC_ID, \
+			.flags = IORESOURCE_IRQ, \
+		}, \
+	}, \
+}
+
+/*
+ * Full UART: shortcut macro for single instance + platform data structure
+ */
+#define XPAR_UART(num) { \
+	.mapbase = XPAR_UARTNS550_##num##_BASEADDR + 3, \
+	.irq = XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \
+	.iotype = UPIO_MEM, \
+	.uartclk = XPAR_UARTNS550_##num##_CLOCK_FREQ_HZ, \
+	.flags = UPF_BOOT_AUTOCONF, \
+	.regshift = 2, \
+}
+
+/*
+ * SystemACE: shortcut macro for single instance
+ */
+#define XPAR_SYSACE(num) { \
+	.name		= "xsysace", \
+	.id		= XPAR_SYSACE_##num##_DEVICE_ID, \
+	.num_resources	= 2, \
+	.resource = (struct resource[]) { \
+		{ \
+			.start	= XPAR_SYSACE_##num##_BASEADDR, \
+			.end	= XPAR_SYSACE_##num##_HIGHADDR, \
+			.flags	= IORESOURCE_MEM, \
+		}, \
+		{ \
+			.start	= XPAR_INTC_0_SYSACE_##num##_VEC_ID, \
+			.flags	= IORESOURCE_IRQ, \
+		}, \
+	}, \
+}
+
+
+/* UART 8250 driver platform data table */
+struct plat_serial8250_port virtex_serial_platform_data[] = {
+#if defined(XPAR_UARTNS550_0_BASEADDR)
+	XPAR_UART(0),
+#endif
+#if defined(XPAR_UARTNS550_1_BASEADDR)
+	XPAR_UART(1),
+#endif
+#if defined(XPAR_UARTNS550_2_BASEADDR)
+	XPAR_UART(2),
+#endif
+#if defined(XPAR_UARTNS550_3_BASEADDR)
+	XPAR_UART(3),
+#endif
+#if defined(XPAR_UARTNS550_4_BASEADDR)
+	XPAR_UART(4),
+#endif
+#if defined(XPAR_UARTNS550_5_BASEADDR)
+	XPAR_UART(5),
+#endif
+#if defined(XPAR_UARTNS550_6_BASEADDR)
+	XPAR_UART(6),
+#endif
+#if defined(XPAR_UARTNS550_7_BASEADDR)
+	XPAR_UART(7),
+#endif
+	{ }, /* terminated by empty record */
+};
+
+
+struct platform_device virtex_platform_devices[] = {
+	/* UARTLITE instances */
+#if defined(XPAR_UARTLITE_0_BASEADDR)
+	XPAR_UARTLITE(0),
+#endif
+#if defined(XPAR_UARTLITE_1_BASEADDR)
+	XPAR_UARTLITE(1),
+#endif
+#if defined(XPAR_UARTLITE_2_BASEADDR)
+	XPAR_UARTLITE(2),
+#endif
+#if defined(XPAR_UARTLITE_3_BASEADDR)
+	XPAR_UARTLITE(3),
+#endif
+#if defined(XPAR_UARTLITE_4_BASEADDR)
+	XPAR_UARTLITE(4),
+#endif
+#if defined(XPAR_UARTLITE_5_BASEADDR)
+	XPAR_UARTLITE(5),
+#endif
+#if defined(XPAR_UARTLITE_6_BASEADDR)
+	XPAR_UARTLITE(6),
+#endif
+#if defined(XPAR_UARTLITE_7_BASEADDR)
+	XPAR_UARTLITE(7),
+#endif
+
+	/* Full UART instances */
+#if defined(XPAR_UARTNS550_0_BASEADDR)
+	{
+		.name		= "serial8250",
+		.id		= 0,
+		.dev.platform_data = virtex_serial_platform_data,
+	},
+#endif
+
+	/* SystemACE instances */
+#if defined(XPAR_SYSACE_0_BASEADDR)
+	XPAR_SYSACE(0),
+#endif
+#if defined(XPAR_SYSACE_1_BASEADDR)
+	XPAR_SYSACE(1),
+#endif
+
+	/* ML300/403 reference design framebuffer */
+#if defined(XPAR_TFT_0_BASEADDR)
+	{
+		.name		= "xilinxfb",
+		.id		= 0,
+		.num_resources	= 1,
+		.resource = (struct resource[]) {
+			{
+				.start	= XPAR_TFT_0_BASEADDR,
+				.end	= XPAR_TFT_0_BASEADDR+7,
+				.flags	= IORESOURCE_IO,
+			},
+		},
+	},
+#endif
+};
+
+/* Early serial support functions */
+static void __init
+virtex_early_serial_init(int num, struct plat_serial8250_port *pdata)
+{
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+	struct uart_port serial_req;
+
+	memset(&serial_req, 0, sizeof(serial_req));
+	serial_req.mapbase	= pdata->mapbase;
+	serial_req.membase	= pdata->membase;
+	serial_req.irq		= pdata->irq;
+	serial_req.uartclk	= pdata->uartclk;
+	serial_req.regshift	= pdata->regshift;
+	serial_req.iotype	= pdata->iotype;
+	serial_req.flags	= pdata->flags;
+	gen550_init(num, &serial_req);
+#endif
+}
+
+void __init
+virtex_early_serial_map(void)
+{
+#ifdef CONFIG_SERIAL_8250
+	struct plat_serial8250_port *pdata;
+	int i = 0;
+
+	pdata = virtex_serial_platform_data;
+	while(pdata && pdata->flags) {
+		pdata->membase = ioremap(pdata->mapbase, 0x100);
+		virtex_early_serial_init(i, pdata);
+		pdata++;
+		i++;
+	}
+#endif /* CONFIG_SERIAL_8250 */
+}
+
+/*
+ * default fixup routine; do nothing and return success.
+ *
+ * Reimplement this routine in your custom board support file to
+ * override the default behaviour
+ */
+int __attribute__ ((weak))
+virtex_device_fixup(struct platform_device *dev)
+{
+	return 0;
+}
+
+static int __init virtex_init(void)
+{
+	struct platform_device *index = virtex_platform_devices;
+	unsigned int ret = 0;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(virtex_platform_devices); i++, index++) {
+		if (virtex_device_fixup(index) != 0)
+			continue;
+
+		if (platform_device_register(index)) {
+			ret = 1;
+			printk(KERN_ERR "cannot register dev %s:%d\n",
+			       index->name, index->id);
+		}
+	}
+	return ret;
+}
+
+subsys_initcall(virtex_init);
diff --git a/arch/ppc/syslib/virtex_devices.h b/arch/ppc/syslib/virtex_devices.h
new file mode 100644
index 0000000..4a17dd3
--- /dev/null
+++ b/arch/ppc/syslib/virtex_devices.h
@@ -0,0 +1,27 @@
+/*
+ * Common support header for virtex ppc405 platforms
+ *
+ * Copyright 2007 Secret Lab Technologies Ltd.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifndef __ASM_VIRTEX_DEVICES_H__
+#define __ASM_VIRTEX_DEVICES_H__
+
+#include <linux/platform_device.h>
+
+void __init virtex_early_serial_map(void);
+
+/* Prototype for device fixup routine.  Implement this routine in the
+ * board specific fixup code and the generic setup code will call it for
+ * each device is the platform device list.
+ *
+ * If the hook returns a non-zero value, then the device will not get
+ * registered with the platform bus
+ */
+int virtex_device_fixup(struct platform_device *dev);
+
+#endif  /* __ASM_VIRTEX_DEVICES_H__ */
-- 
1.5.1

[PATCH 4/7] [PPC] Stop using ppc_sys for Xilinx Virtex boards

[Grant Likely]

The arch/ppc/syslib/ppc_sys.c infrastructure does not work well for the
virtex ports.  Move the ml300 and ml403 board ports over to use the new
virtex_devices infrastructure.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
 arch/ppc/platforms/4xx/Makefile       |    1 -
 arch/ppc/platforms/4xx/virtex.c       |   56 ----------------------------
 arch/ppc/platforms/4xx/virtex.h       |    7 +---
 arch/ppc/platforms/4xx/xilinx_ml300.c |   64 ++------------------------------
 arch/ppc/platforms/4xx/xilinx_ml403.c |   65 ++-------------------------------
 arch/ppc/syslib/Makefile              |    3 +-
 include/asm-ppc/ppc_sys.h             |    2 -
 7 files changed, 11 insertions(+), 187 deletions(-)
 delete mode 100644 arch/ppc/platforms/4xx/virtex.c

diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
index fa6610b..723ad79 100644
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -28,5 +28,4 @@ obj-$(CONFIG_440SP)		+= ibm440sp.o
 obj-$(CONFIG_440SPE)		+= ppc440spe.o
 obj-$(CONFIG_405EP)		+= ibm405ep.o
 obj-$(CONFIG_405GPR)		+= ibm405gpr.o
-obj-$(CONFIG_XILINX_VIRTEX)	+= virtex.o
 
diff --git a/arch/ppc/platforms/4xx/virtex.c b/arch/ppc/platforms/4xx/virtex.c
deleted file mode 100644
index 133a831..0000000
--- a/arch/ppc/platforms/4xx/virtex.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Virtex-II Pro & Virtex-4 FX common infrastructure
- *
- * Maintainer: Grant Likely <grant.likely@secretlab.ca>
- *
- * Copyright 2005 Secret Lab Technologies Ltd.
- * Copyright 2005 General Dynamics Canada Ltd.
- * Copyright 2005 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/serial_8250.h>
-#include <asm/ppc_sys.h>
-#include <platforms/4xx/virtex.h>
-#include <platforms/4xx/xparameters/xparameters.h>
-
-#define XPAR_UART(num) { \
-		.mapbase  = XPAR_UARTNS550_##num##_BASEADDR + 3, \
-		.irq	  = XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \
-		.iotype	  = UPIO_MEM, \
-		.uartclk  = XPAR_UARTNS550_##num##_CLOCK_FREQ_HZ, \
-		.flags	  = UPF_BOOT_AUTOCONF, \
-		.regshift = 2, \
-	}
-
-struct plat_serial8250_port serial_platform_data[] = {
-#ifdef XPAR_UARTNS550_0_BASEADDR
-	XPAR_UART(0),
-#endif
-#ifdef XPAR_UARTNS550_1_BASEADDR
-	XPAR_UART(1),
-#endif
-#ifdef XPAR_UARTNS550_2_BASEADDR
-	XPAR_UART(2),
-#endif
-#ifdef XPAR_UARTNS550_3_BASEADDR
-	XPAR_UART(3),
-#endif
-	{ }, /* terminated by empty record */
-};
-
-struct platform_device ppc_sys_platform_devices[] = {
-	[VIRTEX_UART] = {
-		.name		= "serial8250",
-		.id		= 0,
-		.dev.platform_data = serial_platform_data,
-	},
-};
-
diff --git a/arch/ppc/platforms/4xx/virtex.h b/arch/ppc/platforms/4xx/virtex.h
index e9f58a7..4fc76da 100644
--- a/arch/ppc/platforms/4xx/virtex.h
+++ b/arch/ppc/platforms/4xx/virtex.h
@@ -19,13 +19,8 @@
 #if !defined(BASE_BAUD)
  #define BASE_BAUD		(0) /* dummy value; not used */
 #endif
-  
-/* Device type enumeration for platform bus definitions */
+
 #ifndef __ASSEMBLY__
-enum ppc_sys_devices {
-	VIRTEX_UART, NUM_PPC_SYS_DEVS,
-};
-  
 typedef struct board_info {
 	unsigned int	 bi_memsize;		/* DRAM installed, in bytes */
 	unsigned char	 bi_enetaddr[6];	/* Local Ethernet MAC address */
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.c b/arch/ppc/platforms/4xx/xilinx_ml300.c
index 4e4aca4..6e522fe 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml300.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml300.c
@@ -18,9 +18,9 @@
 #include <linux/serialP.h>
 #include <asm/io.h>
 #include <asm/machdep.h>
-#include <asm/ppc_sys.h>
 
 #include <syslib/gen550.h>
+#include <syslib/virtex_devices.h>
 #include <platforms/4xx/xparameters/xparameters.h>
 
 /*
@@ -53,25 +53,9 @@
  *          ppc4xx_pic_init			arch/ppc/syslib/xilinx_pic.c
  */
 
-/* Board specifications structures */
-struct ppc_sys_spec *cur_ppc_sys_spec;
-struct ppc_sys_spec ppc_sys_specs[] = {
-	{
-		/* Only one entry, always assume the same design */
-		.ppc_sys_name	= "Xilinx ML300 Reference Design",
-		.mask 		= 0x00000000,
-		.value 		= 0x00000000,
-		.num_devices	= 1,
-		.device_list	= (enum ppc_sys_devices[])
-		{
-			VIRTEX_UART,
-		},
-	},
-};
 const char* virtex_machine_name = "ML300 Reference Design";
 
 #if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
-
 static volatile unsigned *powerdown_base =
     (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
 
@@ -96,52 +80,14 @@ ml300_map_io(void)
 #endif
 }
 
-/* Early serial support functions */
-static void __init
-ml300_early_serial_init(int num, struct plat_serial8250_port *pdata)
-{
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
-	struct uart_port serial_req;
-
-	memset(&serial_req, 0, sizeof(serial_req));
-	serial_req.mapbase	= pdata->mapbase;
-	serial_req.membase	= pdata->membase;
-	serial_req.irq		= pdata->irq;
-	serial_req.uartclk	= pdata->uartclk;
-	serial_req.regshift	= pdata->regshift;
-	serial_req.iotype	= pdata->iotype;
-	serial_req.flags	= pdata->flags;
-	gen550_init(num, &serial_req);
-#endif
-}
-
-void __init
-ml300_early_serial_map(void)
-{
-#ifdef CONFIG_SERIAL_8250
-	struct plat_serial8250_port *pdata;
-	int i = 0;
-
-	pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
-	while(pdata && pdata->flags)
-	{
-		pdata->membase = ioremap(pdata->mapbase, 0x100);
-		ml300_early_serial_init(i, pdata);
-		pdata++;
-		i++;
-	}
-#endif /* CONFIG_SERIAL_8250 */
-}
-
 void __init
 ml300_setup_arch(void)
 {
-	ml300_early_serial_map();
+	virtex_early_serial_map();
 	ppc4xx_setup_arch();	/* calls ppc4xx_find_bridges() */
 
 	/* Identify the system */
-	printk(KERN_INFO "Xilinx Virtex-II Pro port\n");
-	printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
+	printk(KERN_INFO "Xilinx ML300 Reference System (Virtex-II Pro)\n");
 }
 
 /* Called after board_setup_irq from ppc4xx_init_IRQ(). */
@@ -157,8 +103,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 {
 	ppc4xx_init(r3, r4, r5, r6, r7);
 
-	identify_ppc_sys_by_id(mfspr(SPRN_PVR));
-
 	ppc_md.setup_arch = ml300_setup_arch;
 	ppc_md.setup_io_mappings = ml300_map_io;
 	ppc_md.init_IRQ = ml300_init_irq;
@@ -168,7 +112,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #endif
 
 #ifdef CONFIG_KGDB
-	ppc_md.early_serial_map = ml300_early_serial_map;
+	ppc_md.early_serial_map = virtex_early_serial_map;
 #endif
 }
 
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.c b/arch/ppc/platforms/4xx/xilinx_ml403.c
index c98e40a..bc3ace3 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml403.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml403.c
@@ -1,11 +1,9 @@
 /*
- * arch/ppc/platforms/4xx/xilinx_ml403.c
- *
  * Xilinx ML403 evaluation board initialization
  *
  * Author: Grant Likely <grant.likely@secretlab.ca>
  *
- * 2005 (c) Secret Lab Technologies Ltd.
+ * 2005-2007 (c) Secret Lab Technologies Ltd.
  * 2002-2004 (c) MontaVista Software, Inc.
  *
  * This file is licensed under the terms of the GNU General Public License
@@ -22,9 +20,9 @@
 #include <linux/serialP.h>
 #include <asm/io.h>
 #include <asm/machdep.h>
-#include <asm/ppc_sys.h>
 
 #include <syslib/gen550.h>
+#include <syslib/virtex_devices.h>
 #include <platforms/4xx/xparameters/xparameters.h>
 
 /*
@@ -57,25 +55,9 @@
  *          ppc4xx_pic_init			arch/ppc/syslib/xilinx_pic.c
  */
 
-/* Board specifications structures */
-struct ppc_sys_spec *cur_ppc_sys_spec;
-struct ppc_sys_spec ppc_sys_specs[] = {
-	{
-		/* Only one entry, always assume the same design */
-		.ppc_sys_name	= "Xilinx ML403 Reference Design",
-		.mask 		= 0x00000000,
-		.value 		= 0x00000000,
-		.num_devices	= 1,
-		.device_list	= (enum ppc_sys_devices[])
-		{
-			VIRTEX_UART,
-		},
-	},
-};
 const char* virtex_machine_name = "ML403 Reference Design";
 
 #if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
-
 static volatile unsigned *powerdown_base =
     (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
 
@@ -100,47 +82,10 @@ ml403_map_io(void)
 #endif
 }
 
-/* Early serial support functions */
-static void __init
-ml403_early_serial_init(int num, struct plat_serial8250_port *pdata)
-{
-#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
-	struct uart_port serial_req;
-
-	memset(&serial_req, 0, sizeof(serial_req));
-	serial_req.mapbase	= pdata->mapbase;
-	serial_req.membase	= pdata->membase;
-	serial_req.irq		= pdata->irq;
-	serial_req.uartclk	= pdata->uartclk;
-	serial_req.regshift	= pdata->regshift;
-	serial_req.iotype	= pdata->iotype;
-	serial_req.flags	= pdata->flags;
-	gen550_init(num, &serial_req);
-#endif
-}
-
-void __init
-ml403_early_serial_map(void)
-{
-#ifdef CONFIG_SERIAL_8250
-	struct plat_serial8250_port *pdata;
-	int i = 0;
-
-	pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
-	while(pdata && pdata->flags)
-	{
-		pdata->membase = ioremap(pdata->mapbase, 0x100);
-		ml403_early_serial_init(i, pdata);
-		pdata++;
-		i++;
-	}
-#endif /* CONFIG_SERIAL_8250 */
-}
-
 void __init
 ml403_setup_arch(void)
 {
-	ml403_early_serial_map();
+	virtex_early_serial_map();
 	ppc4xx_setup_arch();	/* calls ppc4xx_find_bridges() */
 
 	/* Identify the system */
@@ -160,8 +105,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 {
 	ppc4xx_init(r3, r4, r5, r6, r7);
 
-	identify_ppc_sys_by_id(mfspr(SPRN_PVR));
-
 	ppc_md.setup_arch = ml403_setup_arch;
 	ppc_md.setup_io_mappings = ml403_map_io;
 	ppc_md.init_IRQ = ml403_init_irq;
@@ -171,7 +114,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 #endif
 
 #ifdef CONFIG_KGDB
-	ppc_md.early_serial_map = ml403_early_serial_map;
+	ppc_md.early_serial_map = virtex_early_serial_map;
 #endif
 }
 
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 0991111..9569415 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -18,7 +18,8 @@ obj-$(CONFIG_440SP)		+= ibm440gx_common.o ibm440sp_common.o
 obj-$(CONFIG_440SPE)		+= ibm440gx_common.o ibm440sp_common.o ppc440spe_pcie.o
 ifeq ($(CONFIG_4xx),y)
 ifeq ($(CONFIG_XILINX_VIRTEX),y)
-obj-$(CONFIG_40x)		+= xilinx_pic.o ppc_sys.o
+obj-$(CONFIG_40x)		+= xilinx_pic.o
+obj-y				+= virtex_devices.o
 else
 ifeq ($(CONFIG_403),y)
 obj-$(CONFIG_40x)		+= ppc403_pic.o
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index 40f197a..de99e92 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -33,8 +33,6 @@
 #include <asm/mpc52xx.h>
 #elif defined(CONFIG_MPC10X_BRIDGE)
 #include <asm/mpc10x.h>
-#elif defined(CONFIG_XILINX_VIRTEX)
-#include <platforms/4xx/virtex.h>
 #else
 #error "need definition of ppc_sys_devices"
 #endif
-- 
1.5.1

[PATCH 5/7] [PPC] Add uartlite boot console driver for the zImage wrapper

[Grant Likely]

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
---
 arch/ppc/boot/common/misc-common.c  |   15 +++++++++----
 arch/ppc/boot/simple/Makefile       |    1 +
 arch/ppc/boot/simple/uartlite_tty.c |   37 +++++++++++++++++++++++++++++++++++
 3 files changed, 48 insertions(+), 5 deletions(-)
 create mode 100644 arch/ppc/boot/simple/uartlite_tty.c

diff --git a/arch/ppc/boot/common/misc-common.c b/arch/ppc/boot/common/misc-common.c
index 8e1fccd..9589969 100644
--- a/arch/ppc/boot/common/misc-common.c
+++ b/arch/ppc/boot/common/misc-common.c
@@ -57,7 +57,8 @@ unsigned char *ISA_io = NULL;
 
 #if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
 	|| defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
-	|| defined(CONFIG_SERIAL_MPSC_CONSOLE)
+	|| defined(CONFIG_SERIAL_MPSC_CONSOLE) \
+	|| defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
 extern unsigned long com_port;
 
 extern int serial_tstc(unsigned long com_port);
@@ -80,7 +81,8 @@ int tstc(void)
 {
 #if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
 	|| defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
-	|| defined(CONFIG_SERIAL_MPSC_CONSOLE)
+	|| defined(CONFIG_SERIAL_MPSC_CONSOLE) \
+	|| defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
 	if(keyb_present)
 		return (CRT_tstc() || serial_tstc(com_port));
 	else
@@ -95,7 +97,8 @@ int getc(void)
 	while (1) {
 #if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
 	|| defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
-	|| defined(CONFIG_SERIAL_MPSC_CONSOLE)
+	|| defined(CONFIG_SERIAL_MPSC_CONSOLE) \
+	|| defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
 		if (serial_tstc(com_port))
 			return (serial_getc(com_port));
 #endif /* serial console */
@@ -112,7 +115,8 @@ putc(const char c)
 
 #if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
 	|| defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
-	|| defined(CONFIG_SERIAL_MPSC_CONSOLE)
+	|| defined(CONFIG_SERIAL_MPSC_CONSOLE) \
+	|| defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
 	serial_putc(com_port, c);
 	if ( c == '\n' )
 		serial_putc(com_port, '\r');
@@ -161,7 +165,8 @@ void puts(const char *s)
 	while ( ( c = *s++ ) != '\0' ) {
 #if defined(CONFIG_SERIAL_CPM_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) \
 	|| defined(CONFIG_SERIAL_MPC52xx_CONSOLE) \
-	|| defined(CONFIG_SERIAL_MPSC_CONSOLE)
+	|| defined(CONFIG_SERIAL_MPSC_CONSOLE) \
+	|| defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
 	        serial_putc(com_port, c);
 	        if ( c == '\n' ) serial_putc(com_port, '\r');
 #endif /* serial console */
diff --git a/arch/ppc/boot/simple/Makefile b/arch/ppc/boot/simple/Makefile
index bcfb6cd..5b87779 100644
--- a/arch/ppc/boot/simple/Makefile
+++ b/arch/ppc/boot/simple/Makefile
@@ -201,6 +201,7 @@ boot-$(CONFIG_8260)		+= m8260_tty.o
 endif
 boot-$(CONFIG_SERIAL_MPC52xx_CONSOLE)	+= mpc52xx_tty.o
 boot-$(CONFIG_SERIAL_MPSC_CONSOLE)	+= mv64x60_tty.o
+boot-$(CONFIG_SERIAL_UARTLITE_CONSOLE)	+= uartlite_tty.o
 
 LIBS				:= $(common)/lib.a $(bootlib)/lib.a
 ifeq ($(CONFIG_PPC_PREP),y)
diff --git a/arch/ppc/boot/simple/uartlite_tty.c b/arch/ppc/boot/simple/uartlite_tty.c
new file mode 100644
index 0000000..0eae1ea
--- /dev/null
+++ b/arch/ppc/boot/simple/uartlite_tty.c
@@ -0,0 +1,37 @@
+/*
+ * Xilinx UARTLITE bootloader driver
+ *
+ * Copyright (c) 2007 Secret Lab Technologies Ltd.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/types.h>
+#include <asm/serial.h>
+#include <asm/io.h>
+#include <platforms/4xx/xparameters/xparameters.h>
+
+#define UARTLITE_BASEADDR ((void*)(XPAR_UARTLITE_0_BASEADDR))
+
+void
+serial_putc(unsigned long com_port, unsigned char c)
+{
+	while ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x08) != 0); /* spin */
+	out_be32(UARTLITE_BASEADDR + 0x4, c);
+}
+
+unsigned char
+serial_getc(unsigned long com_port)
+{
+	while ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x01) == 0); /* spin */
+	return in_be32(UARTLITE_BASEADDR);
+}
+
+int
+serial_tstc(unsigned long com_port)
+{
+	return ((in_be32(UARTLITE_BASEADDR + 0x8) & 0x01) != 0);
+}
-- 
1.5.1

[PATCH 6/7] [PPC] Add sane defaults for Xilinx EDK generated xparameters files

[Grant Likely]

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/ppc/platforms/4xx/xparameters/xparameters.h |   60 ++++++++++++++++++++++
 1 files changed, 60 insertions(+), 0 deletions(-)

diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters.h b/arch/ppc/platforms/4xx/xparameters/xparameters.h
index 66ec5f3..01aa043 100644
--- a/arch/ppc/platforms/4xx/xparameters/xparameters.h
+++ b/arch/ppc/platforms/4xx/xparameters/xparameters.h
@@ -34,3 +34,63 @@
 	.io_type	 = SERIAL_IO_MEM,				\
   },
 #endif
+
+/*
+ * A few reasonable defaults for the #defines which could be missing depending
+ * on the IP version or variant (e.g. OPB vs PLB)
+ */
+
+#ifndef XPAR_EMAC_0_CAM_EXIST
+#define XPAR_EMAC_0_CAM_EXIST 0
+#endif
+#ifndef XPAR_EMAC_0_JUMBO_EXIST
+#define XPAR_EMAC_0_JUMBO_EXIST 0
+#endif
+#ifndef XPAR_EMAC_0_TX_DRE_TYPE
+#define XPAR_EMAC_0_TX_DRE_TYPE 0
+#endif
+#ifndef XPAR_EMAC_0_RX_DRE_TYPE
+#define XPAR_EMAC_0_RX_DRE_TYPE 0
+#endif
+#ifndef XPAR_EMAC_0_TX_INCLUDE_CSUM
+#define XPAR_EMAC_0_TX_INCLUDE_CSUM 0
+#endif
+#ifndef XPAR_EMAC_0_RX_INCLUDE_CSUM
+#define XPAR_EMAC_0_RX_INCLUDE_CSUM 0
+#endif
+
+#ifndef XPAR_EMAC_1_CAM_EXIST
+#define XPAR_EMAC_1_CAM_EXIST 0
+#endif
+#ifndef XPAR_EMAC_1_JUMBO_EXIST
+#define XPAR_EMAC_1_JUMBO_EXIST 0
+#endif
+#ifndef XPAR_EMAC_1_TX_DRE_TYPE
+#define XPAR_EMAC_1_TX_DRE_TYPE 0
+#endif
+#ifndef XPAR_EMAC_1_RX_DRE_TYPE
+#define XPAR_EMAC_1_RX_DRE_TYPE 0
+#endif
+#ifndef XPAR_EMAC_1_TX_INCLUDE_CSUM
+#define XPAR_EMAC_1_TX_INCLUDE_CSUM 0
+#endif
+#ifndef XPAR_EMAC_1_RX_INCLUDE_CSUM
+#define XPAR_EMAC_1_RX_INCLUDE_CSUM 0
+#endif
+
+#ifndef XPAR_GPIO_0_IS_DUAL
+#define XPAR_GPIO_0_IS_DUAL 0
+#endif
+#ifndef XPAR_GPIO_1_IS_DUAL
+#define XPAR_GPIO_1_IS_DUAL 0
+#endif
+#ifndef XPAR_GPIO_2_IS_DUAL
+#define XPAR_GPIO_2_IS_DUAL 0
+#endif
+#ifndef XPAR_GPIO_3_IS_DUAL
+#define XPAR_GPIO_3_IS_DUAL 0
+#endif
+#ifndef XPAR_GPIO_4_IS_DUAL
+#define XPAR_GPIO_4_IS_DUAL 0
+#endif
+
-- 
1.5.1

[PATCH 7/7] [PPC] Don't define a custom bd_t for Xilixn Virtex based boards.

[Grant Likely]

Why create a platform specific board_info structure that is hacked
together, ugly, and dangerous, when we've got a perfectly fine common
board_info structure that is hacked-together, ugly and dangerous.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
 arch/ppc/platforms/4xx/virtex.h |   15 +--------------
 1 files changed, 1 insertions(+), 14 deletions(-)

diff --git a/arch/ppc/platforms/4xx/virtex.h b/arch/ppc/platforms/4xx/virtex.h
index 4fc76da..7382804 100644
--- a/arch/ppc/platforms/4xx/virtex.h
+++ b/arch/ppc/platforms/4xx/virtex.h
@@ -14,6 +14,7 @@
 #define __ASM_VIRTEX_H__
 
 #include <asm/ibm405.h>
+#include <asm/ppcboot.h>
 
 /* Ugly, ugly, ugly! BASE_BAUD defined here to keep 8250.c happy. */
 #if !defined(BASE_BAUD)
@@ -21,22 +22,8 @@
 #endif
 
 #ifndef __ASSEMBLY__
-typedef struct board_info {
-	unsigned int	 bi_memsize;		/* DRAM installed, in bytes */
-	unsigned char	 bi_enetaddr[6];	/* Local Ethernet MAC address */
-	unsigned int	 bi_intfreq;		/* Processor speed, in Hz */
-	unsigned int	 bi_busfreq;		/* PLB Bus speed, in Hz */
-	unsigned int	 bi_pci_busfreq;	/* PCI Bus speed, in Hz */
-} bd_t;
-
-/* Some 4xx parts use a different timebase frequency from the internal clock.
- * the Virtex 405 does not, so just use a macro to make tbfreq match intfreq
-*/
-#define bi_tbfreq bi_intfreq
-
 extern const char* virtex_machine_name;
 #define PPC4xx_MACHINE_NAME (virtex_machine_name)
-
 #endif /* !__ASSEMBLY__ */
 
 /* We don't need anything mapped.  Size of zero will accomplish that. */
-- 
1.5.1

XILINX SPI IP core with INTC IP core.

[Leonid]

Hi,

I'm trying to use SPI and INTC IP cores together. Does somebody have
adapter.c for SPI core, using interrupts?

Thanks,

Leonid.

RE: XILINX SPI IP core with INTC IP core.

[Rick Moleres]

[-- Attachment #1: Type: text/plain, Size: 487 bytes --]


Leonid,

Here's one that we've used (tested with Wind River's 2.6.14 and MV's
2.6.10 distributions).

-Rick


-----Original Message-----
From: Leonid [mailto:Leonid@a-k-a.net] 
Sent: Friday, April 27, 2007 7:54 PM
To: Grant Likely; linuxppc-embedded@ozlabs.org
Cc: Rick Moleres
Subject: XILINX SPI IP core with INTC IP core.

Hi,

I'm trying to use SPI and INTC IP cores together. Does somebody have
adapter.c for SPI core, using interrupts?

Thanks,

Leonid.


[-- Attachment #2: xspi_adapter.c --]
[-- Type: application/octet-stream, Size: 18284 bytes --]

/*
 * xspi_adapter.c
 *
 * Xilinx Adapter component to interface SPI component to Linux
 *
 * Only master mode is supported. One or more slaves can be served.
 *
 * Author: MontaVista Software, Inc.
 *         akonovalov@ru.mvista.com, or source@mvista.com
 *
 * 2004-2006 (c) MontaVista, Software, Inc.  This file is licensed under the
 * terms of the GNU General Public License version 2.  This program is licensed
 * "as is" without any warranty of any kind, whether express or implied.
 */

#include <linux/module.h>
#include <linux/version.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/fs.h>
#include <linux/cdev.h>
#include <linux/sched.h>	/* wait_event_interruptible */
#include <linux/bitops.h>	/* ffs() */
#include <linux/slab.h>		/* kmalloc() etc. */
#include <linux/moduleparam.h>
#include <linux/xilinx_devices.h>
#include <linux/device.h>

#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/page.h>		/* PAGE_SIZE */

#include "xspi.h"
#include "xspi_i.h"
#include "xspi_ioctl.h"

#define XSPI_DEFAULT_MAJOR	123
#define XSPI_DEFAULT_MINOR	0	/* The minors start from this value */
#define XSPI_MINORS		4	/* Allocate 4 minors for this driver */

static int xspi_major = XSPI_DEFAULT_MAJOR;
static int xspi_minor = XSPI_DEFAULT_MINOR;
static int xspi_no_minors = XSPI_MINORS;
module_param(xspi_major, int, S_IRUGO);
module_param(xspi_minor, int, S_IRUGO);

#define XSPI_NAME "xilinx_spi"

/*
 * Debugging macros
 */

#define DEBUG_FLOW   0x0001
#define DEBUG_STAT   0x0002

#define DEBUG_MASK   0x0000

#if (DEBUG_MASK != 0)
#define d_printk(str...)  printk(str)
#else
#define d_printk(str...)	/* nothing */
#endif

#if ((DEBUG_MASK & DEBUG_FLOW) != 0)
#define func_enter()      printk("xspi: enter %s\n", __FUNCTION__)
#define func_exit()       printk("xspi: exit  %s\n", __FUNCTION__)
#else
#define func_enter()
#define func_exit()
#endif

/* These options are always set by the driver. */
#define XSPI_DEFAULT_OPTIONS	(XSP_MASTER_OPTION | XSP_MANUAL_SSELECT_OPTION)
/* These options can be changed by the user. */
#define XSPI_CHANGEABLE_OPTIONS	(XSP_CLK_ACTIVE_LOW_OPTION | XSP_CLK_PHASE_1_OPTION \
				| XSP_LOOPBACK_OPTION)

/* Our private per interface data. */
struct xspi_instance {
	u32 phys_addr;			/* Saved physical base address */
	ulong remap_size;
	u32 device_id;
	unsigned int irq;		/* device IRQ number */
	wait_queue_head_t waitq;	/* For those waiting until SPI is busy */
	struct semaphore sem;
	int use_count;

	struct cdev cdev;		/* Char device structure */

	/* The flag ISR uses to tell the transfer completion status
	 * (the values are defined in "xstatus.h"; set to 0 before the transfer) */
	int completion_status;
	/* The actual number of bytes transferred */
	int tx_count;

	/* The object used by Xilinx OS independent code */
	XSpi Spi;
};

/*******************************************************************************
 * This configuration stuff should become unnecessary after EDK version 8.x is
 * released.
 ******************************************************************************/

static DECLARE_MUTEX(cfg_sem);

static int convert_status(XStatus status)
{
	switch (status) {
	case XST_SUCCESS:
		return 0;
	case XST_DEVICE_NOT_FOUND:
		return -ENODEV;
	case XST_DEVICE_BUSY:
		return -EBUSY;
	default:
		return -EIO;
	}
}

/*
 * Simple function that hands an interrupt to the Xilinx code.
 * dev_id contains a pointer to proper XSpi instance.
 */
static irqreturn_t xspi_isr(int irq, void *dev_id, struct pt_regs *regs)
{
	XSpi_InterruptHandler((XSpi *) dev_id);
	return IRQ_HANDLED;
}

/*
 * This function is called back from the XSpi interrupt handler
 * when one of the following status events occures:
 * 	XST_SPI_TRANSFER_DONE - the requested data transfer is done,
 * 	XST_SPI_RECEIVE_OVERRUN - Rx FIFO overrun, transmission continues,
 * 	XST_SPI_MODE_FAULT - should not happen: the driver doesn't support multiple masters,
 * 	XST_SPI_TRANSMIT_UNDERRUN,
 * 	XST_SPI_SLAVE_MODE_FAULT - should not happen: the driver doesn't support slave mode.
 */
static void xspi_status_handler(void *CallBackRef, u32 StatusEvent,
				unsigned int ByteCount)
{
	struct xspi_instance *dev = (struct xspi_instance *) CallBackRef;

	dev->completion_status = StatusEvent;

	if (StatusEvent == XST_SPI_TRANSFER_DONE) {
		dev->tx_count = (int) ByteCount;
		wake_up_interruptible(&dev->waitq);
	} else if (StatusEvent == XST_SPI_RECEIVE_OVERRUN) {
		/* As both Rx and Tx FIFO have the same sizes
		   this should not happen in master mode.
		   That is why we consider Rx overrun as severe error
		   and abort the transfer */
		dev->tx_count = (int) ByteCount;
		XSpi_Abort(&dev->Spi);
		wake_up_interruptible(&dev->waitq);
		printk(KERN_ERR XSPI_NAME " %d: Rx overrun!!!.\n",
		       dev->device_id);
	} else if (StatusEvent == XST_SPI_MODE_FAULT) {
		wake_up_interruptible(&dev->waitq);
	} else {
		printk(KERN_ERR XSPI_NAME " %d: Invalid status event %u.\n",
		       dev->device_id, StatusEvent);
	}
}

/*
 * To be called from xspi_ioctl(), xspi_read(), and xspi_write().
 *
 * xspi_ioctl() uses both wr_buf and rd_buf.
 * xspi_read() doesn't care of what is sent, and sets wr_buf to NULL.
 * xspi_write() doesn't care of what it receives, and sets rd_buf to NULL.
 *
 * Set slave_ind to negative value if the currently selected SPI slave
 * device is to be used.
 *
 * Returns the number of bytes transferred (0 or positive value)
 * or error code (negative value).
 */
static int xspi_transfer(struct xspi_instance *dev, const char *wr_buf,
			 char *rd_buf, int count, int slave_ind)
{
	int retval;
	unsigned char *tmp_buf;

	if (count <= 0)
		return 0;

	/* Limit the count value to the small enough one.
	   This prevents a denial-of-service attack by using huge count values
	   thus making everything to be swapped out to free the space
	   for this huge buffer */
	if (count > 8192)
		count = 8192;

	/* Allocate buffer in the kernel space (it is first filled with
	   the data to send, then these data are overwritten with the
	   received data) */
	tmp_buf = kmalloc(count, GFP_KERNEL);
	if (tmp_buf == NULL)
		return -ENOMEM;

	/* Fill the buffer with data to send */
	if (wr_buf == NULL) {
		/* zero the buffer not to expose the kernel data */
		memset(tmp_buf, 0, count);
	} else {
		if (copy_from_user(tmp_buf, wr_buf, count) != 0) {
			kfree(tmp_buf);
			return -EFAULT;
		}
	}

	/* Lock the device */
	if (down_interruptible(&dev->sem)) {
		kfree(tmp_buf);
		return -ERESTARTSYS;
	}

	/* The while cycle below never loops - this is just a convenient
	   way to handle the errors */
	while (TRUE) {
		/* Select the proper slave if requested to do so */
		if (slave_ind >= 0) {
			retval =
			    convert_status(XSpi_SetSlaveSelect
					   (&dev->Spi,
					    0x00000001 << slave_ind));
			if (retval != 0)
				break;
		}

		/* Initiate transfer */
		dev->completion_status = 0;
		retval = convert_status(XSpi_Transfer(&dev->Spi, tmp_buf,
						      (rd_buf ==
						       NULL) ? NULL : tmp_buf,
						      count));
		if (retval != 0)
			break;

		/* Put the process to sleep */
		if (wait_event_interruptible(dev->waitq,
					     dev->completion_status != 0) !=
		    0) {
			/* ... woken up by the signal */
			retval = -ERESTARTSYS;
			break;
		}
		/* ... woken up by the transfer completed interrupt */
		if (dev->completion_status != XST_SPI_TRANSFER_DONE) {
			retval = -EIO;
			break;
		}

		/* Copy the received data to user if rd_buf != NULL */
		if (rd_buf != NULL &&
		    copy_to_user(rd_buf, tmp_buf, dev->tx_count) != 0) {
			retval = -EFAULT;
			break;
		}

		retval = dev->tx_count;
		break;
	}			/* while(TRUE) */

	/* Unlock the device, free the buffer and return */
	up(&dev->sem);
	kfree(tmp_buf);
	return retval;
}

static int
xspi_ioctl(struct inode *inode, struct file *filp,
	   unsigned int cmd, unsigned long arg)
{
	struct xspi_instance *dev = filp->private_data;

	/* paranoia check */
	if (!dev)
		return -ENODEV;

	switch (cmd) {
	case XSPI_IOC_GETSLAVESELECT:
		{
			int i;

			i = ffs(XSpi_GetSlaveSelect(&dev->Spi)) - 1;
			return put_user(i, (int *) arg);	/* -1 means nothing selected */
		}
		break;
	case XSPI_IOC_SETSLAVESELECT:
		{
			int i;
			int retval;

			if (get_user(i, (int *) arg) != 0)
				return -EFAULT;

			if (i < -1 || i > 31)
				return -EINVAL;

			/* Lock the device. */
			if (down_interruptible(&dev->sem))
				return -ERESTARTSYS;

			if (i == -1)
				retval =
				    convert_status(XSpi_SetSlaveSelect
						   (&dev->Spi, 0));
			else
				retval =
				    convert_status(XSpi_SetSlaveSelect
						   (&dev->Spi, (u32) 1 << i));

			/* Unlock the device. */
			up(&dev->sem);

			return retval;
		}
		break;
	case XSPI_IOC_GETOPTS:
		{
			struct xspi_ioc_options xspi_opts;
			u32 xspi_options;

			xspi_options = XSpi_GetOptions(&dev->Spi);

			memset(&xspi_opts, 0, sizeof (xspi_opts));
			if (dev->Spi.HasFifos)
				xspi_opts.has_fifo = 1;
			if (xspi_options & XSP_CLK_ACTIVE_LOW_OPTION)
				xspi_opts.clk_level = 1;
			if (xspi_options & XSP_CLK_PHASE_1_OPTION)
				xspi_opts.clk_phase = 1;
			if (xspi_options & XSP_LOOPBACK_OPTION)
				xspi_opts.loopback = 1;
			xspi_opts.slave_selects = dev->Spi.NumSlaveBits;

			return put_user(xspi_opts,
					(struct xspi_ioc_options *) arg);
		}
		break;
	case XSPI_IOC_SETOPTS:
		{
			struct xspi_ioc_options xspi_opts;
			u32 xspi_options;
			int retval;

			if (copy_from_user(&xspi_opts,
					   (struct xspi_ioc_options *) arg,
					   sizeof (struct xspi_ioc_options)) !=
			    0)
				return -EFAULT;

			/* Lock the device. */
			if (down_interruptible(&dev->sem))
				return -ERESTARTSYS;

			/* Read current settings and set the changeable ones. */
			xspi_options = XSpi_GetOptions(&dev->Spi)
			    & ~XSPI_CHANGEABLE_OPTIONS;
			if (xspi_opts.clk_level != 0)
				xspi_options |= XSP_CLK_ACTIVE_LOW_OPTION;
			if (xspi_opts.clk_phase != 0)
				xspi_options |= XSP_CLK_PHASE_1_OPTION;
			if (xspi_opts.loopback != 0)
				xspi_options |= XSP_LOOPBACK_OPTION;

			retval =
			    convert_status(XSpi_SetOptions
					   (&dev->Spi, xspi_options));

			/* Unlock the device. */
			up(&dev->sem);

			return retval;
		}
		break;
	case XSPI_IOC_TRANSFER:
		{
			struct xspi_ioc_transfer_data trans_data;
			int retval;

			if (copy_from_user(&trans_data,
					   (struct xspi_ioc_transfer_data *)
					   arg,
					   sizeof (struct
						   xspi_ioc_transfer_data)) !=
			    0)
				return -EFAULT;

			/* Transfer the data. */
			retval = xspi_transfer(dev, trans_data.write_buf,
					       trans_data.read_buf,
					       trans_data.count,
					       trans_data.slave_index);
			if (retval > 0)
				return 0;
			else
				return retval;
		}
		break;
	default:
		return -ENOTTY;	/* redundant */
	}			/* switch(cmd) */

	return -ENOTTY;
}

static ssize_t
xspi_read(struct file *filp, char *buf, size_t count, loff_t * not_used)
{
	struct xspi_instance *dev = filp->private_data;

	/* Set the 2nd arg to NULL to indicate we don't care what to send;
	   set the last arg to -1 to talk to the currently selected SPI
	   slave */
	return xspi_transfer(dev, NULL, buf, count, -1);
}

static ssize_t
xspi_write(struct file *filp, const char *buf, size_t count, loff_t * not_used)
{
	struct xspi_instance *dev = filp->private_data;

	/* Set the 3d arg to NULL to indicate we are not interested in
	   the data read; set the last arg to -1 to talk to the currently
	   selected SPI slave */
	return xspi_transfer(dev, buf, NULL, count, -1);
}

static int
xspi_open(struct inode *inode, struct file *filp)
{
	int retval = 0;
	struct xspi_instance *dev;

	func_enter();

	dev = container_of(inode->i_cdev, struct xspi_instance, cdev);
	filp->private_data = dev; /* for other methods */

	if (dev == NULL)
		return -ENODEV;

	if (down_interruptible(&dev->sem))
		return -EINTR;

	while (dev->use_count++ == 0) {
		/*
		 * This was the first opener; we need  to get the IRQ,
		 * and to setup the device as master.
		 */
		retval = request_irq(dev->irq, xspi_isr, 0, XSPI_NAME,
				     &dev->Spi);
		if (retval != 0) {
			printk(KERN_ERR XSPI_NAME
			       "%d: Could not allocate interrupt %d.\n",
			       dev->device_id, dev->irq);
			break;
		}

		if (XSpi_SetOptions(&dev->Spi, XSPI_DEFAULT_OPTIONS) !=
		    XST_SUCCESS) {
			printk(KERN_ERR XSPI_NAME
			       "%d: Could not set device options.\n",
			       dev->device_id);
			free_irq(dev->irq, &dev->Spi);
			retval = -EIO;
			break;
		}

		if (XSpi_Start(&dev->Spi) != XST_SUCCESS) {
			printk(KERN_ERR XSPI_NAME
			       "%d: Could not start the device.\n",
			       dev->device_id);
			free_irq(dev->irq, &dev->Spi);
			retval = -EIO;
			break;
		}

		break;
	}

	if (retval != 0)
		--dev->use_count;

	up(&dev->sem);
	return retval;
}

static int
xspi_release(struct inode *inode, struct file *filp)
{
	struct xspi_instance *dev = filp->private_data;

	func_enter();

	if (down_interruptible(&dev->sem))
		return -EINTR;

	if (--dev->use_count == 0) {
		/* This was the last closer: stop the device and free the IRQ */
		if (wait_event_interruptible(dev->waitq,
					     XSpi_Stop(&dev->Spi) !=
					     XST_DEVICE_BUSY) != 0) {
			/* Abort transfer by brute force */
			XSpi_Abort(&dev->Spi);
		}
		disable_irq(dev->irq);
		free_irq(dev->irq, &dev->Spi);
	}

	up(&dev->sem);
	return 0;
}

struct file_operations xspi_fops = {
      .open	= xspi_open,
      .release	= xspi_release,
      .read	= xspi_read,
      .write	= xspi_write,
      .ioctl	= xspi_ioctl,
};

static int __init check_spi_config(XSpi_Config * cfg)
{
	if (cfg->SlaveOnly || cfg->NumSlaveBits == 0)
		return -1;
	else
		return 0;	/* the configuration is supported by this driver */
}

/******************************
 * The platform device driver *
 ******************************/

static int xspi_probe(struct device *dev)
{
	dev_t devt;
	XSpi_Config xspi_cfg;
	struct platform_device *pdev = to_platform_device(dev);
	struct xspi_platform_data *pdata;
	struct xspi_instance *inst;
	struct resource *irq_res, *regs_res;
	unsigned long remap_size;
	u32 virtaddr;
	int retval;

	if (!dev)
		return -EINVAL;

	pdata = (struct xspi_platform_data *) pdev->dev.platform_data;
	if (!pdata) {
		printk(KERN_ERR XSPI_NAME " %d: Couldn't find platform data.\n",
		       pdev->id);

		return -ENODEV;
	}

	devt = MKDEV(xspi_major, xspi_minor + pdev->id);

	inst = kmalloc(sizeof(struct xspi_instance), GFP_KERNEL);
	memset(inst, 0, sizeof(*inst));

	if (!inst) {
		printk(KERN_ERR XSPI_NAME " #%d: Could not allocate device.\n",
		       pdev->id);
		return -ENOMEM;
	}
	dev_set_drvdata(dev, (void *)inst);
	init_MUTEX(&inst->sem);
	init_waitqueue_head(&inst->waitq);

	/* Find irq number, map the control registers in */

	irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
	regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs_res || !irq_res) {
		printk(KERN_ERR XSPI_NAME" #%d: IO resource(s) not found\n",
		       pdev->id);
		retval = -EFAULT;
		goto failed1;
	}
	inst->irq = irq_res->start;

	remap_size = regs_res->end - regs_res->start + 1;
	if (!request_mem_region(regs_res->start, remap_size, XSPI_NAME)) {
		printk(KERN_ERR XSPI_NAME
		       " #%d: Couldn't lock memory region at 0x%08lX\n",
		       pdev->id, regs_res->start);
		retval = -EBUSY;
		goto failed1;
	}
	inst->remap_size = remap_size;
	inst->phys_addr = regs_res->start;
	inst->device_id = pdev->id;
	xspi_cfg.DeviceId = pdev->id;
	xspi_cfg.HasFifos = (pdata->device_flags & XSPI_HAS_FIFOS) ? 1 : 0;
	xspi_cfg.SlaveOnly = (pdata->device_flags & XSPI_SLAVE_ONLY) ? 1 : 0;
	xspi_cfg.NumSlaveBits = pdata->num_slave_bits;

	if(check_spi_config(&xspi_cfg)) {
		printk(KERN_ERR XSPI_NAME
		       " #%d: Unsupported hardware configuration\n", pdev->id);
		retval = -ENODEV;
		goto failed1;
	}

	virtaddr = (u32) ioremap(regs_res->start, remap_size);
	if (virtaddr == 0) {
		printk(KERN_ERR XSPI_NAME
		       " #%d: Couldn't ioremap memory at 0x%08lX\n",
		       pdev->id, regs_res->start);
		retval = -EFAULT;
		goto failed2;
	}

	/* Tell the Xilinx code to bring this SPI interface up. */
	if (XSpi_CfgInitialize(&inst->Spi, &xspi_cfg, virtaddr) != XST_SUCCESS) {
		printk(KERN_ERR XSPI_NAME " #%d: Could not initialize device.\n",
		       pdev->id);
		retval = -ENODEV;
		goto failed3;
	}

	/* Set interrupt callback */
	XSpi_SetStatusHandler(&inst->Spi, inst, xspi_status_handler);
	/* request_irq() is done in open() */

	cdev_init(&inst->cdev, &xspi_fops);
	inst->cdev.owner = THIS_MODULE;
	retval = cdev_add(&inst->cdev, devt, 1);
	if (retval) {
		printk(KERN_ERR XSPI_NAME " #%d: cdev_add() failed\n",
		       pdev->id);
		goto failed3;
	}

	printk(KERN_INFO XSPI_NAME
	       " %d: at 0x%08X mapped to 0x%08X, irq=%d\n",
	       pdev->id, inst->phys_addr, inst->Spi.BaseAddr, inst->irq);

	return 0;	/* success */

failed3:
	iounmap((void *) (xspi_cfg.BaseAddress));

failed2:
	release_mem_region(regs_res->start, remap_size);

failed1:
	kfree(inst);

	return retval;
}

static int xspi_remove(struct device *dev)
{
	struct xspi_instance *inst;

	if (!dev)
		return -EINVAL;

	inst = (struct xspi_instance *) dev_get_drvdata(dev);

	cdev_del(&inst->cdev);
	iounmap((void *) (inst->Spi.BaseAddr));
	release_mem_region(inst->phys_addr, inst->remap_size);
	kfree(inst);
	dev_set_drvdata(dev, NULL);

	return 0;	/* success */
}

static struct device_driver xspi_driver = {
	.name		= XSPI_NAME,
	.bus		= &platform_bus_type,
	.probe		= xspi_probe,
	.remove		= xspi_remove
};

static int __init xspi_init(void)
{
	dev_t devt;
	int retval;

	if (xspi_major) {
		devt = MKDEV(xspi_major, xspi_minor);
		retval = register_chrdev_region(devt, xspi_no_minors,
						XSPI_NAME);
	} else {
		retval = alloc_chrdev_region(&devt, xspi_minor, xspi_no_minors,
					     XSPI_NAME);
		xspi_major = MAJOR(devt);
	}
	if (retval < 0) {
		xspi_major = 0;
		return retval;
	}

	retval = driver_register(&xspi_driver);
	if (retval) {
		unregister_chrdev_region(devt, xspi_no_minors);
	}

	return retval;
}

static void __exit xspi_cleanup(void)
{
	dev_t devt = MKDEV(xspi_major, xspi_minor);

	driver_unregister(&xspi_driver);
	unregister_chrdev_region(devt, xspi_no_minors);
}

module_init(xspi_init);
module_exit(xspi_cleanup);

MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
MODULE_DESCRIPTION("Xilinx SPI driver");
MODULE_LICENSE("GPL");

RE: XILINX SPI IP core with INTC IP core.

[Leonid]

Thanks a lot, Rick.

Do you happen to have also reference EDK design for Spartan-3e Starter
kit which has SPI core in it?

Thanks,

Leonid.

-----Original Message-----
From: Rick Moleres [mailto:Rick.Moleres@xilinx.com]=20
Sent: Monday, April 30, 2007 8:32 AM
To: Leonid; Grant Likely; linuxppc-embedded@ozlabs.org
Subject: RE: XILINX SPI IP core with INTC IP core.


Leonid,

Here's one that we've used (tested with Wind River's 2.6.14 and MV's
2.6.10 distributions).

-Rick


-----Original Message-----
From: Leonid [mailto:Leonid@a-k-a.net]=20
Sent: Friday, April 27, 2007 7:54 PM
To: Grant Likely; linuxppc-embedded@ozlabs.org
Cc: Rick Moleres
Subject: XILINX SPI IP core with INTC IP core.

Hi,

I'm trying to use SPI and INTC IP cores together. Does somebody have
adapter.c for SPI core, using interrupts?

Thanks,

Leonid.