From: Adrian Cox <adrian@humboldt.co.uk>
To: Jon Loeliger <jdl@freescale.com>
Cc: "linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>
Subject: Re: [PATCH] Remove CPU_FTR_NEED_COHERENT for 7448.
Date: Thu, 03 May 2007 10:17:20 +0000 [thread overview]
Message-ID: <1178187440.20944.12.camel@localhost.localdomain> (raw)
In-Reply-To: <1178141683.32136.46.camel@ld0161-tx32>
On Wed, 2007-05-02 at 16:34 -0500, Jon Loeliger wrote:
> From: James.Yang <James.Yang@freescale.com>
>
> Remove CPU_FTR_NEED_COHERENT for MPC7448 (and single-core MPC86xx).
> This prevents needlessly setting M=1 when not SMP.
There may be side effects to removing this. Most of the 74xx processors
had this flag added because of the L2 prefetch bug (erratum #16 on the
7447A). I see that bug is missing from the 7448 errata.
The problem is that many 32-bit PowerPC machines needed
CPU_FTR_NEED_COHERENT set for a second reason: compatibility with the
cache in the MPC107. This was handled by CPU_FTR_COMMON in cputable.h
before the L2 prefetch bug was known. There may be other host bridges
that cache, but nobody will have noticed because all the CPUs had
CPU_FTR_NEED_COHERENT set already.
--
Adrian Cox <adrian@humboldt.co.uk>
next prev parent reply other threads:[~2007-05-03 10:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-05-02 21:34 [PATCH] Remove CPU_FTR_NEED_COHERENT for 7448 Jon Loeliger
2007-05-03 10:17 ` Adrian Cox [this message]
2007-05-03 10:53 ` Benjamin Herrenschmidt
2007-05-03 16:13 ` Jon Loeliger
2007-05-03 17:07 ` Adrian Cox
2007-05-03 17:38 ` Jon Loeliger
2007-05-03 21:36 ` Benjamin Herrenschmidt
2007-05-04 15:16 ` Jon Loeliger
2007-05-04 22:25 ` Benjamin Herrenschmidt
2007-05-05 13:25 ` Adrian Cox
2007-05-07 17:31 ` Loeliger Jon-LOELIGER
2007-05-04 20:19 ` Kumar Gala
2007-05-03 11:02 ` Paul Mackerras
2007-05-03 16:04 ` Jon Loeliger
2007-05-03 23:34 ` Paul Mackerras
2007-05-04 15:13 ` Jon Loeliger
2007-05-10 16:17 ` Kumar Gala
2007-05-10 16:44 ` Jon Loeliger
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