Re: [PATCH] Remove CPU_FTR_NEED_COHERENT for 7448.

[Adrian Cox <adrian@humboldt.co.uk>]

On Sat, 2007-05-05 at 08:25 +1000, Benjamin Herrenschmidt wrote:
> On Fri, 2007-05-04 at 10:16 -0500, Jon Loeliger wrote:
> > So, could you comment on my proposed solution doing
> > things exactly this way?  Speifically, would folks
> > prefer the dynamic 
> > 
> >     number_of_cpus() == 1 
> 
> Sorry I don't remember the actual patch, must have missed it... I
> suppose we could have generic code in early_init_devtree set the default
> for this based on cpu_possible_map() containing more than one bit and
> have platforms using one of those broken bridges force the bit in from
> their probe routine.

Having looked into it further, the MPC106/7 are probably unique in
containing an internal cache which must be coherent with the CPU.
Presumably the designers intended it as a performance enhancement for
other PCI bus masters accessing PowerPC memory, but for most
applications the cost of turning on coherent memory would have
outweighed it.

So I'm now happy about removing CPU_FTR_NEED_COHERENT from the 7448. I
also agree that platforms with this quirk should turn it on during
probing, but there aren't any boards in arch/powerpc that need this. The
static method based on CONFIG_MPC10X_BRIDGE is probably good enough for
arch/ppc. 

-- 
Adrian Cox <adrian@humboldt.co.uk>