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Subject: Re: [PATCH 5/5] PCI fixes for the MPC8641 Rev 2.0 silicon and Rev
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From: Wade Farnsworth <wfarnsworth@mvista.com>
To: Jon Loeliger <jdl@freescale.com>
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Date: Wed, 16 May 2007 11:06:34 -0700
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On Wed, 2007-05-16 at 11:44 -0500, Jon Loeliger wrote:
> On Tue, 2007-05-15 at 11:50, Wade Farnsworth wrote:
> > +static void __devinit early_mpc86xx_pcie(struct pci_dev *dev)
> > +{
> > +	   dev->class = PCI_CLASS_BRIDGE_PCI << 8 | 0x1;
> > +}
> 
> What'd we decide on that 0x1 in there?
> 
> Thanks,
> jdl
> 
> 

I originally thought that it the 0x1 was necessary, but it was pointed
out to me that it should not be.

If I remove the 0x1 I get some I/O resource allocation failures on the
P2P bridge and its child devices.  I'm currently investigating what the
cause of this is.

--Wade