From: Zang Roy-r61911 <tie-fei.zang@freescale.com>
To: linuxppc-dev list <linuxppc-dev@ozlabs.org>
Cc: Paul Mackerras <paulus@samba.org>
Subject: [PATCH]: Add 8548 pcie bus number workaround
Date: 07 Jun 2007 11:13:21 +0800 [thread overview]
Message-ID: <1181186000.10296.35.camel@localhost.localdomain> (raw)
From: Zang Roy-r61911 <tie-fei.zang@freescale.com>
Remove legacy pcie support for 8641 chip.
General PCI code can fully support 8641 Rev2.0 chip.
For 8548 PEX controller, PCIE host controller configure
space can only be accessed as "bus->number = 0" in
the PCI architecture. So "bus->number == hose->bus_offset"
judgment is added.
Some minor space indentation clean up.
---
arch/powerpc/sysdev/fsl_pcie.c | 28 ++++++++++++++--------------
1 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pcie.c b/arch/powerpc/sysdev/fsl_pcie.c
index 041c07e..79e9546 100644
--- a/arch/powerpc/sysdev/fsl_pcie.c
+++ b/arch/powerpc/sysdev/fsl_pcie.c
@@ -47,16 +47,16 @@ indirect_read_config_pcie(struct pci_bus *bus, unsigned int devfn, int offset,
return PCIBIOS_DEVICE_NOT_FOUND;
PCIE_FIX;
- if (bus->number == 0xff) {
+ if (bus->number == hose->bus_offset) {
PCI_CFG_OUT(hose->cfg_addr,
- (0x80000000 | ((offset & 0xf00) << 16) |
- ((bus->number - hose->bus_offset) << 16)
- | (devfn << 8) | ((offset & 0xfc) )));
+ (0x80000000 | ((offset & 0xf00) << 16) |
+ ((bus->number - hose->bus_offset) << 16)
+ | (devfn << 8) | ((offset & 0xfc) )));
} else {
PCI_CFG_OUT(hose->cfg_addr,
- (0x80000001 | ((offset & 0xf00) << 16) |
- ((bus->number - hose->bus_offset) << 16)
- | (devfn << 8) | ((offset & 0xfc) )));
+ (0x80000000 | ((offset & 0xf00) << 16) |
+ (bus->number << 16)
+ | (devfn << 8) | ((offset & 0xfc) )));
}
/*
@@ -98,16 +98,16 @@ indirect_write_config_pcie(struct pci_bus *bus, unsigned int devfn, int offset,
return PCIBIOS_DEVICE_NOT_FOUND;
PCIE_FIX;
- if (bus->number == 0xff) {
+ if (bus->number == hose->bus_offset) {
PCI_CFG_OUT(hose->cfg_addr,
- (0x80000000 | ((offset & 0xf00) << 16) |
- ((bus->number - hose->bus_offset) << 16)
- | (devfn << 8) | ((offset & 0xfc) )));
+ (0x80000000 | ((offset & 0xf00) << 16) |
+ ((bus->number - hose->bus_offset) << 16)
+ | (devfn << 8) | ((offset & 0xfc) )));
} else {
PCI_CFG_OUT(hose->cfg_addr,
- (0x80000001 | ((offset & 0xf00) << 16) |
- ((bus->number - hose->bus_offset) << 16)
- | (devfn << 8) | ((offset & 0xfc) )));
+ (0x80000000 | ((offset & 0xf00) << 16) |
+ (bus->number << 16)
+ | (devfn << 8) | ((offset & 0xfc) )));
}
/*
--
1.5.1
next reply other threads:[~2007-06-07 3:13 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-07 3:13 Zang Roy-r61911 [this message]
-- strict thread matches above, loose matches on Subject: below --
2007-06-07 3:19 [PATCH]: Add 8548 pcie bus number workaround Zang Roy-r61911
2007-06-07 6:48 ` Kumar Gala
2007-06-07 8:54 ` Zhang Wei-r63237
2007-06-07 9:04 ` Zang Roy-r61911
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