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* [PATCH] Fix I8042 IRQs on MPC8641 HPCN
@ 2007-06-20  0:15 Wade Farnsworth
  2007-06-20 10:03 ` Segher Boessenkool
  0 siblings, 1 reply; 7+ messages in thread
From: Wade Farnsworth @ 2007-06-20  0:15 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev

The I8042 mouse on the MPC8641 HPCN needs to use IRQ 12, which is
currently in use by some PCI devices.  This moves those devices to IRQ
11 and reserves IRQ 12 for the mouse.

Also, set IRQ 1 and IRQ 12 as legacy IRQs in the ULI 1575 legacy bridge
in order to make the I8042 devices functional.

Signed-off-by: Wade Farnsworth <wfarnsworth@mvista.com>

---

Note that the previous version of this patch also set up the Super I/O
registers.  I have removed that setup code, as there was some
reservations about doing such low-level setup in the kernel.

 arch/powerpc/boot/dts/mpc8641_hpcn.dts     |    4 ++--
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |   14 +++++++-------


Index: linux-2.6-powerpc-8641/arch/powerpc/boot/dts/mpc8641_hpcn.dts
===================================================================
--- linux-2.6-powerpc-8641.orig/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ linux-2.6-powerpc-8641/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -268,7 +268,7 @@
 				/* IDSEL 0x1c */
 				e000 0 0 1 &i8259 9 2
 				e000 0 0 2 &i8259 a 2
-				e000 0 0 3 &i8259 c 2
+				e000 0 0 3 &i8259 b 2
 				e000 0 0 4 &i8259 7 2
 
 				/* IDSEL 0x1d */
@@ -278,7 +278,7 @@
 				e800 0 0 4 &i8259 0 0
 
 				/* IDSEL 0x1e */
-				f000 0 0 1 &i8259 c 2
+				f000 0 0 1 &i8259 b 2
 				f000 0 0 2 &i8259 0 0
 				f000 0 0 3 &i8259 0 0
 				f000 0 0 4 &i8259 0 0
Index: linux-2.6-powerpc-8641/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
===================================================================
--- linux-2.6-powerpc-8641.orig/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ linux-2.6-powerpc-8641/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -141,7 +141,7 @@ const unsigned char uli1575_irq_route_ta
 	0x1,	/* 9: 0b0001 */
 	0x3,	/* 10: 0b0011 */
 	0x9,	/* 11: 0b1001 */
-	0xb,	/* 12: 0b1011 */
+	0,	/* 12: Reserved */
 	0, 	/* 13: Reserved */
 	0xd,	/* 14, 0b1101 */
 	0xf,	/* 15, 0b1111 */
@@ -211,7 +211,7 @@ static void __devinit quirk_uli1575(stru
 			pirq_map_word |= (uli1575_irq_route_table[i] & 0xf)
 				<< ((irq2pin[i] - PIRQA) * 4);
 
-	/* ULI1575 IRQ mapping conf register default value is 0xb9317542 */
+	/* ULI1575 IRQ mapping conf register default value is 0x09317542 */
 	DBG("Setup ULI1575 IRQ mapping configuration register value = 0x%x\n",
 			pirq_map_word);
 	pci_write_config_dword(dev, 0x48, pirq_map_word);
@@ -266,9 +266,9 @@ static void __devinit quirk_uli1575(stru
 	pci_write_config_byte(dev, 0x44, 0x30 | uli1575_irq_route_table[14]);
 	pci_write_config_byte(dev, 0x75, uli1575_irq_route_table[15]);
 
-	/* Set IRQ14 and IRQ15 to legacy IRQs */
+	/* Set IRQ1, IRQ12, IRQ14 and IRQ15 to legacy IRQs */
 	pci_read_config_word(dev, 0x46, &temp);
-	temp |= 0xc000;
+	temp |= 0xd002;
 	pci_write_config_word(dev, 0x46, temp);
 
 	/* Set i8259 interrupt trigger
@@ -280,12 +280,12 @@ static void __devinit quirk_uli1575(stru
 	 * IRQ 9:  Level
 	 * IRQ 10: Level
 	 * IRQ 11: Level
-	 * IRQ 12: Level
+	 * IRQ 12: Edge
 	 * IRQ 14: Edge
 	 * IRQ 15: Edge
 	 */
-	outb(0xfa, 0x4d0);
-	outb(0x1e, 0x4d1);
+	outb(0xf8, 0x4d0);
+	outb(0x0e, 0x4d1);
 
 #undef ULI1575_SET_DEV_IRQ
 

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2007-06-20 16:27 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-06-20  0:15 [PATCH] Fix I8042 IRQs on MPC8641 HPCN Wade Farnsworth
2007-06-20 10:03 ` Segher Boessenkool
2007-06-20 16:04   ` Sergei Shtylyov
2007-06-20 16:07     ` Segher Boessenkool
2007-06-20 16:16       ` Wade Farnsworth
2007-06-20 16:22         ` Wade Farnsworth
2007-06-20 16:27         ` Segher Boessenkool

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