From: Kumar Gala <galak@kernel.crashing.org>
To: linuxppc-dev@ozlabs.org
Subject: [PATCH 06/15] [POWERPC] Added self_busno to indicate which bus number the PHB is
Date: Tue, 26 Jun 2007 20:16:36 -0500 [thread overview]
Message-ID: <1182907013252-git-send-email-galak@kernel.crashing.org> (raw)
In-Reply-To: <11829070111239-git-send-email-galak@kernel.crashing.org>
Added self_busno to pci_controller and indirect PCI ops to be set by
board code to indicate which bus number to use when talking to the PHB.
By default we use zero since the majority of controllers that have
implicit mechanisms to talk to the PHBs use a bus number of zero.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/sysdev/indirect_pci.c | 12 ++++++++++--
include/asm-ppc/pci-bridge.h | 1 +
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index 3dedf8f..d490e71 100644
--- a/arch/powerpc/sysdev/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
@@ -33,6 +33,7 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
struct pci_controller *hose = bus->sysdata;
volatile void __iomem *cfg_data;
u8 cfg_type = 0;
+ u32 bus_no;
if (ppc_md.pci_exclude_device)
if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
@@ -42,8 +43,11 @@ indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
if (bus->number != hose->first_busno)
cfg_type = 1;
+ bus_no = (bus->number == hose->first_busno) ?
+ hose->self_busno : bus->number - hose->bus_offset;
+
PCI_CFG_OUT(hose->cfg_addr,
- (0x80000000 | ((bus->number - hose->bus_offset) << 16)
+ (0x80000000 | (bus_no << 16)
| (devfn << 8) | ((offset & 0xfc) | cfg_type)));
/*
@@ -72,6 +76,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
struct pci_controller *hose = bus->sysdata;
volatile void __iomem *cfg_data;
u8 cfg_type = 0;
+ u32 bus_no;
if (ppc_md.pci_exclude_device)
if (ppc_md.pci_exclude_device(hose, bus->number, devfn))
@@ -81,8 +86,11 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
if (bus->number != hose->first_busno)
cfg_type = 1;
+ bus_no = (bus->number == hose->first_busno) ?
+ hose->self_busno : bus->number - hose->bus_offset;
+
PCI_CFG_OUT(hose->cfg_addr,
- (0x80000000 | ((bus->number - hose->bus_offset) << 16)
+ (0x80000000 | (bus_no << 16)
| (devfn << 8) | ((offset & 0xfc) | cfg_type)));
/*
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h
index 4d35b84..2c2abda 100644
--- a/include/asm-ppc/pci-bridge.h
+++ b/include/asm-ppc/pci-bridge.h
@@ -47,6 +47,7 @@ struct pci_controller {
int first_busno;
int last_busno;
+ int self_busno;
int bus_offset;
void __iomem *io_base_virt;
--
1.5.2.1
next prev parent reply other threads:[~2007-06-27 1:16 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-27 1:16 [PATCH 00/15] [POWERPC] PCI/PCIe cleanups and fixups for 8641 Kumar Gala
2007-06-27 1:16 ` [PATCH 01/15] [POWERPC] Remove set_cfg_type for PCI indirect users that don't need it Kumar Gala
2007-06-27 1:16 ` [PATCH 02/15] [POWERPC] 52xx: Remove support for PCI bus_offset Kumar Gala
2007-06-27 1:16 ` [PATCH 03/15] [POWERPC] Pass the pci_controller into pci_exclude_device Kumar Gala
2007-06-27 1:16 ` [PATCH 04/15] [POWERPC] Remove hack to determine the 2nd PHBs bus number Kumar Gala
2007-06-27 1:16 ` [PATCH 05/15] [POWERPC] Remove bus_offset in places its not really used Kumar Gala
2007-06-27 1:16 ` Kumar Gala [this message]
2007-06-27 1:16 ` [PATCH 07/15] [POWERPC] Removed remnants of bus_offset Kumar Gala
2007-06-27 1:16 ` [PATCH 08/15] [POWERPC] Remove PCI-e errata for MPC8641 silicon ver 1.0 Kumar Gala
2007-06-27 1:16 ` [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file Kumar Gala
2007-06-27 1:16 ` [PATCH 10/15] [POWERPC] Added indirect_type to handle variants of PCI ops Kumar Gala
2007-06-27 1:16 ` [PATCH 11/15] [POWERPC] 86xx: Avoid system halt if link training isn't at least L0 Kumar Gala
2007-06-27 1:16 ` [PATCH 12/15] [POWERPC] 86xx: Workaround PCI_PRIMARY_BUS usage Kumar Gala
2007-06-27 1:16 ` [PATCH 13/15] [POWERPC] MPC8641HPCN: Set IDE in ULI1575 to not native mode Kumar Gala
2007-06-27 1:16 ` [PATCH 14/15] [POWERPC] Let subordinate transparent bridges be transparent Kumar Gala
2007-06-27 1:16 ` [PATCH 15/15] [POWERPC] 86xx: Created quirk_fsl_pcie_transparent() to initialize bridge resources Kumar Gala
2007-06-27 19:57 ` [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file Andy Fleming
2007-06-27 20:39 ` Segher Boessenkool
2007-06-27 20:43 ` Kumar Gala
2007-06-27 20:57 ` Segher Boessenkool
2007-06-27 21:08 ` Kumar Gala
2007-06-27 21:21 ` Segher Boessenkool
2007-06-27 22:51 ` Kumar Gala
2007-06-28 9:14 ` Segher Boessenkool
2007-06-30 0:09 ` Andy Fleming
2007-06-28 0:23 ` David Gibson
2007-06-28 9:18 ` Segher Boessenkool
2007-06-27 1:22 ` [PATCH 07/15] [POWERPC] Removed remnants of bus_offset David Gibson
2007-06-27 4:27 ` Kumar Gala
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1182907013252-git-send-email-galak@kernel.crashing.org \
--to=galak@kernel.crashing.org \
--cc=linuxppc-dev@ozlabs.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).